>'BOOK1E - trs80 aRCHITECTURE
 
    aLL COMPUTER SYSTEMS CONSIST OF THREE GENERAL PARTS.  tHE CENTRAL PROCESSING UNIT (cpu), THE MEMORY (ram AND rom), AND THE INPUT OUTPUT (i/o) DEVICES.  iN THE trs80, THE cpu IS THE z80 MICROPROCESSOR FROM zILOG cORPORATION.  tHIS IS A VERY ADVANCED PROCESSOR AND IS CAPABLE OF A RICH VARIETY OF INSTRUCTIONS.  tHE mOD i MEMORY CONSISTS OF 12k OF READ ONLY MEMORY (rom), 4k OF MEMORY MAPPED DEVICES (KEYBOARD, VIDEO, DISK, PRINTER), AND EITHER 4k, 16k, 32k OR 48k OF READ-WRITE MEMORY, OR RANDOM ACCESS MEMORY (ram).  tHE mOD iii HAS 14k OF rom, 2k OF MEMORY MAPPED DEVICES, AND EITHER 4k, 16k, 32k OR 48k OF ram.  tHIS CHAPTER WILL MAKE AN ATTEMPT AT DESCRIBING THE MEMORY AND DEVICES OF THE trs80 mODELS i AND iii.
 
                   * rEAD oNLY mEMORY *
    tHE LOWEST 12k (14k mOD iii) OF THE ADDRESSABLE MEMORY CONTAINS READ ONLY MEMORY.  tHIS IS ABSOLUTE ADRESSES 0000h TO 2fffh IN THE mOD i, AND 0000h TO 37ffh IN THE mOD iii.  tHIS MEANS THAT THE MEMORY IN THIS AREA CAN ONLY BE read, BUT NOT written TO.  tHEREFORE THE MEMORY IN THIS AREA CANNOT BE CHANGED BY SOFTWARE WRITES.  iN THIS AREA IS A VERY SOPHISTICATED MACHINE LANGUAGE PROGRAM CALLED THE lEVEL ii bASIC iNTERPRETER.  tHIS IS THE INHERENT HIGH LEVEL LANGUAGE SUPPORTED BY THE trs80.
     iN THIS PROGRAM IS CONTAINED THE CODE TO OPERATE A BASIC PROGRAM, INCLUDING CREATING, EDITING, EXECUTING, DEBUGGING, LOADING, SAVING, AND READING/WRITING DATA TO CASSETTE MEDIA.  iT IS LIMITED, HOWEVER, TO CASSETTE INPUT/OUTPUT ONLY (rs232 i/o ON THE mOD iii TOO).  bECAUSE THE CODE NEEDED TO OPERATE ON DISK DRIVES ALONG WITH ALL THE FILE HANDLING WOULD BE VERY LENGTHY, IT IS NOT INCLUDED IN THE rom BASIC INTERPRETER.  iT DOES, HOWEVER, HAVE THE VERY LIMITED ABILITY TO DO A SINGLE OPERATION ON A DISK DRIVE.  tHE rom IS CAPABLE OF READING A SINGLE SECTOR FROM A FLOPPY DISKETTE INTO MEMORY AND JUMPING TO IT (EXECUTING THE PROGRAM THAT IS CONTAINED ON THAT SECTOR).
     wHEN THE trs80 IS FIRST TURNED ON, THE PROGRAM COUNTER (LOCATION OF THE CURRENT INSTRUCTION TO BE EXECTUED) IS LOADED WITH 0000h.  tHIS MEANS THAT THE cpu WILL BEGIN EXECUTING INSTRUCTIONS BEGINNING AT ABSOLUTE 0000h, THE FIRST MEMORY LOCATION IN THE MACHINE (rom).  hERE IS WHERE THE "INITIALIZATION" CODE IS EXECUTED TO SETUP CERTAIN POINTERS AND RESTART VECTORS THAT WILL BE USED BY THE PROGRAM LATER.  iF THE <break> KEY IS DEPRESSED, OR NO INTERFACE IS ATTACHED TO A mOD i, THEN rom BASIC IS IMMEDIATELY EXECUTED, AND THE PROGRAM WILL COME UP WITH THE FAMILIAR PROMPT OF "mEMORY sIZE" OR "cASS".  iF DISK DRIVES ARE ATTACHED TO THE SYSTEM, AN ATTEMPT IS MADE AT READING A SINGLE SECTOR INTO MEMORY, AND THEN PASSING CONTROL TO THAT CODE.  iN THE mOD i, tRACK 0, sECTOR 0 IN SINGLE DENSITY IS READ INTO MEMORY FROM 4200h TO 42ffh, AND A BRANCH IS MADE TO 4200h.  iN THE mOD iii, tRACK 0, sECTOR 1 IN DOUBLE DENSITY IS READ INTO MEMORY FROM 4300h TO 43ffh, AND A BRANCH IS MADE TO 4300h.  iT IS UP TO THIS SHORT PROGRAM TO LOAD IN THE REST OF THE PROGRAM NEEDED FROM THE DISKETTE.  tHE FIRST SECTOR LOADED INTO THE COMPUTER IS TERMED THE "boot" SECTOR OF THE DISKETTE.  iT IS TERMED THIS BECAUSE THE COMPUTER IS ESSENTIALLY PULLING ITSELF UP BY ITS OWN BOOTSTRAPS.  tHIS "BOOT" SECTOR THEN TAKES OVER, AND LOADS IN REMAINING NEEDED CODE.  iN trsdos, THE "BOOT" WILL LOAD IN THE RESIDENT OPERATING SYSTEM MODULE sys0/sys.  tHIS IS THE "HEART" OF THE OPERATING SYSTEM, AND CONTAINS ALL THE CODE NECESSARY FOR THE COMPLETE OPERATION OF dos, INCLUDING LOADING ADDITIONAL PARTS OF THE SYSTEM IF IT IS NEEDED.  mORE WILL BE DISCUSSED ON THE OPERATION OF dos IN A LATER CHAPTER.
 
                   * mEMORY mAPPING *
    sOME OF THE DEVICES THAT ARE ATTACHED TO THE trs80 USE RESERVED AREAS OF THE MEMORY IN THE COMPUTER.  tHIS IS SPECIAL READ/WRITE MEMORY, AND MAY OR MAY NOT NECESSARILY BE USED TO STORE DATA OR CODE.  iN THE mOD i, THIS INCLUDES THE kEYBOARD, vIDEO, pRINTER, AND dISK dRIVES.  iN THE mOD iii, THE pRINTER AND dISK dRIVES ARE ATTACHED TO ports, AND DO NOT REQUIRE ANY MEMORY LOCATIONS FOR THEIR OPERATION.  iN THE mOD iii, THE rom EXTENDS ALL THE WAY FROM 0000h TO 37ffh.  tHIS LEAVES ONLY ONLY 2k OF AREA, WHICH IS USED BY THE KEYBOARD STARTING AT 3800h AND VIDEO STARTING AT 3c00h IN BOTH THE mOD i AND iii.  iN THE mOD i, THE rom EXTENDS ONLY FROM 0000h TO 2fffh.  tHE MEMORY FROM 3000h TO 37dfh IS UNUSED (THERE IS NOTHING HERE).  sTARTING AT 37e0h:
37e0h - INTERRUPT CONTROL LATCH (ALTERNATE DRIVE SELECT ADDRESS)
37e1h - DISK DRIVE SELECT ADDRESS
37e4h - CASSETTE DRIVE SELECT ADDRESS
37e8h - LINEPRINTER DATA/STATUS ADDRESS
37ech - FLOPPY DISK CONTROLLER COMMAND/STATUS REGISTER
37edh - FLOPPY DISK CONTROLLER TRACK REGISTER
37eeh - FLOPPY DISK CONTROLLER SECTOR REGISTER
37efh - FLOPPY DISK CONTROLLER STATUS REGISTER
aDDRESSES FROM 37f0h TO 37ffh ARE DUPLICATES OF THE 37e0h ADDRESSES AND MAY BE USED INTERCHANGEABLY.
 
                   * pORTS *
    iN ADDITION TO THE NORMAL MEMORY IN THE trs80, THERE EXISTS 256 "PORTS" NUMBERED FROM 0 TO 255.  tHESE ARE VERY SIMILAR TO MEMORY LOCATIONS, BUT DO NOT ACTUALLY OCCUPY ANY MEMORY.  tHEY MAY BE THOUGHT OF AS A "CONNECTION" BETWEEN TWO DEVICES THAT ALLOW COMMUNICATION, BUT MAY NOT NECESSARILY BE ABLE TO "STORE" DATA.  tHESE PORTS ARE "ADDRESSED" USING z80 INSTUCTIONS FOR THIS PURPOSE.  a BYTE MAY BE input (READ) OR output (WRITTEN) TO ANY OF THE PORTS.  tHE PORTS USED BY THE STANDARD trs80 ARE:
  mOD i:
e8h - rs232
e9h - rs232
eah - rs232
ebh - rs232
ffh - VIDEO, CASSETTE
 
  mOD iii:
e0h - MASKABLE INTERRUPTS
e4h - NON MASKABLE INTERRUPTS
e8h - rs232
e9h - rs232
eah - rs232
ebh - rs232
ech - VIDEO, CASSETTE, i/o BUS
f0h - DISK DRIVE
f1h - DISK DRIVE
f2h - DISK DRIVE
f3h - DISK DRIVE
f4h - DISK DRIVE
f8h - PRINTER
ffh - CASSETTE
 
                   * ram mEMORY *
    bEGINNING AT ABSOLUTE ADDRESS 4000h IN BOTH THE mOD i AND iii IS THE READ/WRITE, OR RANDOM ACCESS MEMORY.  dEPENDING UPON THE AMOUNT OF MEMORY INSTALLED IN YOUR MACHINE, THE ram WILL EXTEND TO:
4fffh - 4k
7fffh - 16k
bfffh - 32k
ffffh - 48k
    iT IS THIS AREA IN THE trs80 WHERE USER PROGRAMS AND DATA MAY BE STORED AND EXECUTED.  sOME OF THIS MEMORY IS NEEDED BY rom AND dos FOR GENERAL "HOUSEKEEPING" PURPOSES AND THE RESTART VECTOR INTERCEPTS.  a DETAIL OF THE LOWEST MEMORY THAT A USERS PROGRAM MAY OCCUPY IS DISCUSSED IN A LATER CHAPTER.
 
                    * kEYBOARD *
    tHE KEYBOARD IN THE trs80 IS A MATRIX OF SWITCHES CONNECTED TO BITS AT MEMORY LOCATIONS 3800h TO 3bffh.  tHIS ALSO IS READ-ONLY MEMORY, IT MAY NOT BE WRITTEN TO.  tHERE ARE MANY CONNECTIONS FOR EACH KEY DUE TO THE MATRIX CONNECTIONS, BUT ALL THE KEYS MAY BE READ FROM 8 SEPARATE ADDRESSES AS FOLLOWS:
aDDRESS:   bIT:  0    1    2    3    4    5    6    7
3801h            @    a    b    c    d    e    f    g
3802h            h    i    j    k    l    m    n    o
3804h            p    q    r    s    t    u    v    w
3808h            x    y    z
3810h            0    1    2    3    4    5    6    7
3820h            8    9    :    ;    ,    -    .    /
3840h           ent  clr  brk  up   dwn  lft  rht  spc
3880h          shift
iN THE mOD iii, AT 3880h, THE left SHIFT KEY IS bIT 0, AND THE right SHIFT KEY IS bIT 1.  iN THE mOD i, both SHIFT KEYS ARE CONNECTED TO bIT 0, AND CANNOT BE DISTINGUISHED APART.  yOU WILL NOTICE THAT ALL THE KEYS HAVE BEEN REPRESENTED BY A BIT OF MEMORY, AND THE OTHER CHARACTERS (!,",#,ETC.) ARE OBTAINED BY THE CONDITION OF THE shift KEY.  mORE WILL BE EXPLAINED ON HOW TO DECODE THIS MATRIX IN A FOLLOWING CHAPTER.
 
                   * vIDEO *
    tHE VIDEO IN THE trs80 IS ANOTHER MEMORY MAPPED DEVICE.  iT OCCUPIES ADDRESSES FROM 3c00h TO 3fffh.  aNY BYTES THAT ARE PLACED INTO THIS AREA OF MEMORY WILL AUTOMATICALLY BE DISPLAYED TO THE MONITOR BY THE ASSOCIATED HARDWARE.  dEPENDING ON ITS LOCATION IN MEMORY WILL DETERMINE ITS LOCATION ON THE VIDEO.  tHERE ARE 400h (64X16=1024) VIDEO ADDRESSES REPRESENTING THE 64 CHARACTERS BY 16 LINES ON THE MONITOR IN A SEQUENTIAL MANNER.  tHIS MEMORY IS SIMILAR TO OTHER ram MEMORY, IN THAT IT IS BOTH READ AND WRITE.  iN THE STOCK mOD i'S, THERE IS A SINGLE BIT (bIT 6) MISSING FROM THIS MEMORY.  tHIS IS THE REASON FOR THE UPPER CASE ONLY CHARACTERS THAT ARE DISPLAYED IN THIS MACHINE.  tHERE IS A MODIFICATION AVAILABLE FROM rADIO sHACK THAT REPLACES THIS VIDEO MEMORY WITH TRUE 8 BIT MEMORY, AND THE RESULT IS UPPER AND LOWER CASE CHARACTERS.  tHE mOD iii COMES STANDARD WITH THIS FORM OF MEMORY WITH ALL EIGHT BITS INTACT.
    a PART OF THE CIRCUITRY ASSOCIATED WITH THE VIDEO GENERATION IS CALLED THE "CHARACTER GENERATOR".  tHIS IS A CHIP THAT DEFINES WHAT EACH BYTE PLACED INTO THE VIDEO MEMORY WILL LOOK LIKE ON THE MONITOR.  tHERE ARE 256 POSSIBLE COMBINATIONS OF BYTES THAT MAY BE LOADED INTO THE VIDEO MEMORY, AND EACH HAS IT'S OWN "DEFINITION CODE" DESIGNED INTO THE CHARACTER GENERATOR.  tHE mOD i AND iii BOTH HAVE DIFFERENT CHARACTER GENERATORS, AND THEREFORE WILL DISPLAY SOME CHARACTERS DIFFERENTLY IN EACH MACHINE.  tHE mOD iii HAS A MUCH MORE COMPLETE SET OF CHARACTERS THAN THE mOD i, AND ALSO HAS ANOTHER "ALTERNATE" SET OF CHARACTERS THAT MAY BE DISPLAYED.  tHE LAST 64 CHARACTERS (b0h TO ffh) MAY BE "SWITCHED" FROM ONE SET TO THE OTHER BY TOGGLING BIT 3 AT PORT ech.  sETTING THIS BIT "ENABLES" THE ALTERNATE CHARACTER SET, AND RESETTING THIS BIT "DISABLES" THE ALTERNATE SET.
    iN ADDITION TO THE NORMAL ascii CHARACTERS, THE trs80 IS CAPABLE OF DISPLAYING VARIOUS "GRAPHIC" CHARACTERS (80h TO bfh mOD iii, 80h TO ffh mOD i).  eACH CHARACTER POSITION MAY BE BROKEN DOWN INTO 6 RECTANGULAR BLOCKS TERMED "PIXELS".  eACH OF THE PIXELS MAY BE TURN ON OR OFF INDEPENDENTLY.  eACH OF THE PIXELS ARE TIED TO A SPECIFIC BIT OF VIDEO MEMORY AS FOLLOWS:
bIT 0 = TOP LEFT
bIT 1 = TOP RIGHT
bIT 2 = MIDDLE LEFT
bIT 3 = MIDDLE RIGHT
bIT 4 = BOTTOM LEFT
bIT 5 = BOTTOM RIGHT
    bIT 7 must BE SET, WHICH INDICATES A GRAPHIC CHARACTER.  bIT 6 IN AN UPPERCASE ONLY mOD i IS NON-EXISTANT, AND ITS SETTING IS IRRELEVANT.  iN A LOWERCASE mOD i, bIT 6 EXISTS, BUT ITS SETTING IS IRRELEVANT AND THE SAME CHARACTER WILL BE DISPLAYED IF IT IS SET OR NOT.  iN THE mOD iii, IF THIS BIT IS not SET, IT INDICATES A graphic CHARACTER AT THIS POSITION.  iF set, IT INDICATES AN ascii CHARACTER IN THE EXTENDED CHARACTER RANGE.
    iN ADDITION TO THE NORMAL DISPLAY OF 64 CHARACTERS ACROSS BY 16 LINES DOWN, THE trs80 IS ALSO CAPABLE OF A "DOUBLE-WIDE" MODE IN WHICH THERE ARE 32 CHARACTERS BY 16 LINES.  iN THIS MODE EACH CHARACTER DISPLAYED IS TWICE AS WIDE AS IT IS IN THE 64 CHARACTER MODE, BUT STILL THE SAME HEIGHT.  wHEN THE 32 CHARACTER MODE IS SET, THE VIDEO MEMORY IS DISPLAYED SLIGHTLY DIFFERENTLY.  oNLY EVERY OTHER MEMORY LOCATION (EVEN ADDRESSES) ARE DISPLAYED TO THE VIDEO.  aLL OF THE ODD ADDRESS ARE PASSED OVER AND NOT DISPLAYED.  tHE MODE IS CONTROLLED BY A SINGLE BIT BEING EITHER ON OR OFF.  iN THE mOD i, SETTING BIT 3 OF pORT ffh WILL ACTIVATE THE 32 CHARACTER MODE, AND RESETTING BIT 3 WILL ACTIVATE THE 64 CHARACTER MODE.  iN THE mOD iii, SETTING BIT 2 OF pORT ech WILL ACTIVATE THE 32 CHARACTER MODE, AND RESETTING BIT 2 WILL ACTIVATE THE 64 CHARACTER MODE.  tHE SAME MEMORY IS USED FOR EACH MODE, ONLY THE NUMBER AND APPEARANCE OF THE CHARACTERS ON THE MONITOR WILL BE DIFFERENT.
 
                   * cASSETTE *
    tHE CASSETTE IS A STORAGE DEVICE THAT MAY BE USED BY THE trs80 FOR PROGRAMS OR DATA.  iT MAY BE READ/WRITTEN USING A SERIAL TECHNIQUE CALLED A "BIT STREAM".  tHE BITS ARE WRITTEN TO THE CASSETTE USING "CLOCK" AND "DATA" PULSES.  tHIS IS ACCOMPLISHED BY TOGGLING THE LOWER 2 BITS (0 AND 1) OF pORT ffh IN BOTH THE mOD i AND iii.  sETTING BIT 0 WILL SEND A POSITIVE "SPIKE" TO THE TAPE, AND SETTING BIT 1 WILL SEND A NEGATIVE SPIKE.  nORMALLY THE TAPE IS RECORDED AT 0 VOLTAGE (THE "SILENCE" ON THE TAPE).  iF BIT 0 IS SET, THEN BIT 1 IS SET, THEN BOTH BITS RESET, A "SINE WAVE" FORM WILL BE WRITTEN TO THE TAPE.  tHIS IS A "PULSE" ON THE TAPE.  a CLOCK PULSE IS WRITTEN TO THE TAPE, FOLLOWED BY A TIMED GAP OF "SILENCE".  aT THE END OF THE GAP WILL EITHER BE ANOTHER PULSE INDICATING AN on BIT, OR THE ABSENCE OF ANOTHER PULSE INDICATES AN off BIT.  tHIS IS REPEATED EIGHT TIMES FOR EACH BYTE.  tHE TIMING BETWEEN EACH BIT IS VERY CRITICAL, AND ESTABLISHES WHETHER THE BIT IS on OR off.  tHE TIMING BETWEEN BYTES, HOWEVER, IS NOT CRITICAL, AND THE GAP MAY BE ANY LENGTH.  tHE DETECTION OF THE NEXT "CLOCK" PULSE INDICATES THE START OF THE NEXT BYTE.  a FURTHER EXPLAINATION IS GIVEN IN THE i/o SECTION DEALING WITH THE CASSETTE.
    tHE OTHER THING THAT THE COMPUTER MAY CONTROL ON THE CASSETTE IS IF THE MOTOR IS on OR off.  tHIS IS ACCOMPLISED VIA THE remote CONNECTION ON THE CASSETTE DECK.  iN A mOD i, SETTING BIT 2 AT pORT ffh TURNS THE MOTOR on, AND RESETTING BIT 2 TURNS THE MOTOR off.  iN A mOD iii, SETTING BIT 1 AT pORT ech TURNS THE MOTOR on, AND RESETTING BIT 1 TURNS THE MOTOR off.  tHE CASSETTE MOTOR IS NORMALLY TURNED ON BEFORE ANY READ/WRITE OPERATION, AND A SPECIFIED DELAY IS WAITED TO ALLOW THE TAPE TO COME UP TO FULL SPEED.  tHE CASSETTE MOTOR IS LEFT ON UNTIL all BYTES THAT ARE TO BE WRITTEN, HAVE BEEN, AND THEN THE MOTOR IS NORMALLY TURNED off.  iF THE remote CONNECTION ON THE TAPE RECORDER IS NOT PLUGGED IN, THE CASSETTE MOTOR WILL BE IN A CONSTANT on CONDITION, AND MUST BE OPERATED MANUALLY VIA THE play, rewind, ETC. BUTTONS ON THE DECK ITSELF.
    nORMALLY THE trs80 READS AND WRITES TO THE CASSETTE AT A SPEED OF 500 "BAUD" OR "BPS" (BITS PER SECOND).  tHIS EFFECTIVELY MEANS THAT ABOUT 62 CHARACTERS PER SECOND MAY BE READ/WRITTEN.  tHE mOD iii, HOWEVER, IS ALSO CAPABLE OF READING/WRITING AT 1500 BAUD (ABOUT 187 CHARACTERS PER SECOND) TO THE CASSETTE USING THE "NON MASKABLE INTERRUPTS".  uSING THE ADDITIONAL HARDWARE, THIS INCREASE IN SPEED IS MADE VERY RELIABLY.  mORE WILL BE DISCUSSED ON THE CASSETTE IN THE i/o SECTION OF THIS BOOK.
 
                   * pRINTER *
    tHE PRINTER IS ANOTHER DEVICE THAT MAY BE ATTACHED TO THE trs80 FOR HARD COPY OUTPUT.  tHERE ARE TWO WAYS THAT A PRINTER MAY BE ATTACHED TO THE trs80, EITHER "PARALLEL" OR "SERIAL".  uSING THE PARALLEL METHOD, ALL 8 BITS OF A BYTE ARE SENT SIMULTANEOUSLY TO THE PRINTER.  uSING THE SERIAL METHOD, EACH BYTE IS BROKEN UP INTO ITS 8 BITS, AND SENT ONE AT A TIME TO THE PRINTER.
    tHE "PARALLEL" PRINTER MAY BE ATTACHED DIRECTLY TO THE trs80 USING THE CONNECTOR PROVIDED.  tHE "SERIAL" PRINTER IS NORMALLY ATTACHED TO THE rs232 BOARD OF THE COMPUTER (OPTIONAL DEVICE).  tHE rs232 IS DISCUSSED LATER.  uSING THE PARALLEL METHOD, THE DATA IS TRANSFERRED TO THE PRINTER USING A "HANDSHAKE" METHOD.  tHIS MEANS THAT THE PRINTER CAN LET THE COMPUTER KNOW WHETHER IT CAN ACCEPT A CHARACTER OR NOT.  iF IT IS NOT READY, THE PROGRAM WILL NORMALLY "WAIT" FOR THE PRINTER TO BECOME READY, OTHERWISE THE CHARACTER WOULD BE LOST.  tHERE IS A SOFTWARE TECHNIQUE CALLED "SPOOLING" (DISCUSSED IN THE i/o SECTION) WHICH WILL ALLOW THE PROGRAM TO CONTINUE PROCESSING EVEN IF THE PRINTER IS NOT CURRENTLY READY TO ACCEPT THE BYTE AT THE TIME.
    tHE "STATUS" (CONDITION) OF THE PRINTER MAY BE EXAMINED BY LOOKING AT ADDRESS 37e8h IN EITHER THE mOD i OR iii (THE mOD iii ALSO PLACES THIS STATUS IN pORT f8h AND f9h).  tHE BYTE RECEIVED FROM THIS ADDRESS CONTAINS INFORMATION ON WHETHER THE PRINTER IS SELECTED, READY, OR OUT OF PAPER.  tHE TOP 4 BITS (7-4) ARE THE ONLY ONES NORMALLY USED, THE BOTTOM 4 (3-0) ARE IGNORED OR "MASKED" OFF.  tHESE FOUR BITS ARE USED AS FOLLOWS:
bIT 7 = 1 = bUSY
bIT 6 = 1 = pAPER oUT
bIT 5 = 1 = dEVICE sELECTED
bIT 4 = 1 = nO fAULT
tHEREFORE, FOR THE PRINTER TO BE READY TO ACCEPT A CHARACTER, bITS 7 AND 6 MUST BE off, AND bIT 5 AND 4 MUST BE on.  iF THE PRINTER SIGNALS THAT IT IS READY, THE BYTE IS PRINTED BY LOADING THE BYTE INTO ADDRESS 37e8h IN THE mOD i, OR OUTPUTTING THE BYTE TO pORT f8h (OR f9h) IN THE mOD iii.
 
                   * rs232 *
    tHE rs232 IS AN OPTIONAL DEVICE THAT MAY BE ATTACHED TO THE mOD i OR iii, AND GIVES THE ABILITY TO TRANSMIT DATA TO A DEVICE THAT REQUIRES A "SERIAL" TRANSMISSION.  tHIS MEANS THAT EACH BYTE, WHICH CONSISTS OF EIGHT BITS, MUST BE SENT TO THE DEVICE ONE BIT AT A TIME AT A CERTAIN TIMED INTERVAL.  tHE TIMING IS CALLED "BAUD RATE" OR BITS PER SECOND.  sOME LINEPRINTERS AND MOST MODEMS (TELEPHONE CONNECTION DEVICE) WILL REQUIRE THAT DATA BE TRANSMITTED TO IT IN THIS FASHION.  tHE "HEART" OF THE rs232 IS A CHIP CALLED A UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER (uart).  tHIS IS A PROGRAMMABLE CHIP THAT PERFORMS ALL OF THE NECESSARY CONVERSION FROM DIGITAL TO ANALOG OUTPUT TO COMMUNICATE WITH A DEVICE.  iT MAY BE NORMALLY SET TO OPERATE AT A SPECIFIC RATE (0-19200 BAUD), ALONG WITH VARIOUS OTHER CHARACTERISTICS SUCH AS THE LENGTH OF THE BYTE IN BITS, THE PARITY CHECKING, AND NUMBER OF START/STOP BITS.
     tHE rs232 TYPICALLY REQUIRES 4 COMMUNICATION LINES, WHICH ARE PORTS e8h, e9h, eah, ebh IN BOTH THE mOD i AND iii.  e8h EQUALS 232 DECIMAL, HENCE THE NAME OF THE DEVICE.  sOME SERIAL BOARDS THAT ARE AVAILABLE FOR THE trs80 MAY BE USED AT ANY 4 CONTIGUOUS PORTS, AND THE USER NEEDS ONLY TO SPECIFY THE STARTING PORT NUMBER TO THE DEVICE.  tHE NORMAL FUNCTIONS OF THE FOUR PORTS ARE:
read only:
e8h - mODEM sTATUS
eah - uart sTATUS rEGISTER
ebh - uart rECEIVER hOLDING rEGISTER
write only:
e8h - uart mASTER rESET
e9h - bAUD rATE rEGISTER lOAD
eah - uart cONTROL rEGISTER AND mODEM cONTROL
ebh - uart tRANSMITTER hOLDING rEGISTER
    mORE WILL BE DISCUSSED ABOUT THE rs232 IN THE i/o SECTION OF THIS BOOK.
 
                   * dISK dRIVES *
    tHE DISK DRIVES ARE ANOTHER MASS STORAGE DEVICE THAT MAY BE ATTACHED TO THE trs80.  iT ALLOWS RANDOM ACCESS TO A GREAT DEAL OF INFORMATION AT A VERY RAPID RATE.  wHEN USING A CASSETTE, THE DATA IS LOCATED "SERIALLY" ON THE TAPE, WHICH MEANS THAT IF THE DATA YOU NEED IS LOCATED AT THE end OF THE TAPE, THE entire TAPE MUST BE READ TO POSITION TO THE CORRECT LOCATION.  aLSO, NO PROVISION HAS BEEN MADE TO "REWIND" THE TAPE BY THE COMPUTER, SO THAT IF THE DATA NEEDED HAS BEEN PASSED, THE OPERATOR MUST PHYSICALLY LOCATE THE CORRECT SPOT USING THE fAST fORWARD/rEWIND FEATURES OF THE CASSETTE.  a DISKETTE, ON THE OTHER HAND, IS CAPABLE OF READING/WRITING TO ANY LOCATION ON THE DISKETTE AT ANY GIVEN TIME.  tHIS ALLOWS THE SYSTEM TO GO directly TO THE DATA LOCATION IN A MINIMAL AMOUNT OF TIME.
    nORMALLY, THE trs80 USES THE 5 1/4 INCH SIZE DISK DRIVE, BUT RIGID DISK SYSTEMS ARE RAPIDLY EMERGING AT THE TIME OF THIS WRITING.  tHE "FLOPPY" DISK DRIVE WILL BE COVERED IN DETAIL IN THIS BOOK, BUT THE "RIGID" DRIVE WILL ONLY BE BRIEFLY MENTIONED.  tHERE ARE TWO MAJOR METHODS OF WRITING DATA TO A FLOPPY DISKETTE, SINGLE AND DOUBLE DENSITY.  tHE mOD i IS CAPABLE OF SINGLE DENSITY ONLY, BUT MAY BE ADAPTED TO DOUBLE DENSITY OPERATION WITH ADDITONAL HARDWARE.  tHE mOD iii IS CAPABLE OF both SINGLE AND DOUBLE DENSITY RIGHT OUT OF THE BOX.  tHE "BRAIN" BEHIND THE DISK DRIVE IS THE "FLOPPY DISK CONTROLLER" CHIP.  tHIS IS A wESTERN dIGITAL 1771 (1791 WITH THE DOUBLE DENSITY OPTION) IN THE mOD i, AND THE wd 1793 IN THE mOD iii.  tHE 1771 IS A SINGLE DENSITY ONLY CHIP, AND THE 1791 AND 1793 ARE BOTH SINGLE AND DOUBLE DENSITY.
    tHIS CONTROLLER IS CONNECTED TO THE trs80 USING MEMORY MAPPED ADDRESSES ON THE mOD i, AND pORTS ON THE mOD iii AS FOLLOWS:
mOD i ADDRESSES read only:
37ech - STATUS OF DISK OPERATION AND MOTOR
37edh - CURRENT TRACK NUMBER
37eeh - CURRENT SECTOR NUMBER
37efh - DATA TRANSFER ADDRESS
mOD i ADDRESSES write only:
37e1h - DISK DRIVE SELECT ADDRESS
37ech - COMMAND TO DISK CONTROLLER
37edh - TRACK NUMBER
37eeh - SECTOR NUMBER
37efh - TRACK NUMBER TO SEEK TO
mOD iii PORTS read only:
f0h - STATUS OF DISK OPERATION AND MOTOR
f1h - CURRENT TRACK NUMBER
f2h - CURRENT SECTOR NUMBER
f3h - DATA TRANSFER ADDRESS
mOD iii PORTS write only:
f0h - COMMAND TO DISK CONTROLLER
f1h - TRACK NUMBER
f2h - SECTOR NUMBER
f3h - tRACK NUMBER TO SEEK TO
f4h - DISK DRIVE SELECT
    dETAILED EXPLAINATIONS OF TRANSFERRING DATA TO AND FROM THE DISK DRIVES WILL BE COVERED IN THE i/o SECTION.
 
                   * iNTERRUPTS *
    tHERE ARE 2 BROAD CLASSIFICATIONS OF INTERRUPTS IN THE trs80, MASKABLE (mi) AND NON-MASKABLE (nmi).  tHE MASKABLE INTERRUPTS MAY BE TURNED ON AND OFF BY USING SOFTWARE OPCODES, BUT THE NON-MASKABLE INTERRUPTS ARE always ON, AND MAY NOT NORMALLY BE DISABLED USING SOFTWARE.  tHE nmi IS HARDWARE DEPENDENT, AND IS NORMALLY USED TO GAIN ACCESS TO SOFTARE CODE TO SERVICE A DEVICE THAT IS EVENT CRITICAL.  iN THE mOD i, THE ONLY nmi IS THE reset BUTTON.  pRESSING THIS BUTTON WILL FORCE THE cpu TO IMMEDIATELY START EXECUTING AT 0066h.  tHIS ADDRESS CONTAINS CODE THAT WILL RESET THE SOFTWARE BACK TO A POWER-UP CONDITION.  iN THE mOD iii, THE DISK DRIVES ARE ALSO ATTACHED TO THE nmi AND MAY BE ACTIVATED BY SETTING BITS 7 AND/OR 6 AT PORT e4h.  tHIS ADDITION ALLOWS ESSENTIALLY "NO-HANG" DISK OPERATIONS TO OCCUR WHERE MASKABLE INTERRUPTS MUST NORMALLY BE "DISABLED", AND INCREASES PROGRAM THROUGHPUT.
    tHERE ARE 3 TYPES OF MASKABLE INTERRUPTS AS MENTIONED IN THE SECTION ON z80 ARCHITECTURE.  tHE trs80 mOD i AND iii MAKE EXTENSIVE OF mODE 1, BUT i HAVE NO KNOWLEDGE OF ANYONE USING mODE 0 AND 2 FOR ANY APPLICATIONS.  eFFECTIVELY, IT EXECUTES A rst 38h OPCODE.  tHIS IS AN ADDRESS IN rom WITH A FIXED jp VECTOR TO 4012h IN BOTH THE mOD i AND iii.  tHE USER MAY THEN HAVE CODE OR ANOTHER VECTOR AT 4012h THAT IS TO BE EXECUTED EACH TIME THIS INTERRUPT OCCURS.
    tHE INTERRUPT HANDLER (THE CODE THAT SERVICES THIS INTERRUPT) THEN PERFORMS ITS JOB (USUALLY A VERY SHORT TASK), AND RETURNS CONTROL TO THE ORIGINAL CODE.  tHE INTERRUPTS ARE USUALLY USED TO CONTROL EVENTS WHERE TIMING IS CRITICAL.  tHE INTERRUPT SERVICE IS ESSENTIALLY A SUBROUTINE THAT IS EXECTUED AT EXACT INTERVALS.  tHIS ALLOWS THINGS LIKE THE SYSTEM CLOCK AND CALANDER TO KEEP ACCURATE TIMING.  aLSO, TYPE-AHEAD KEYBOARDS AND PRINTER SPOOLING ARE ALSO ACCOMPLISHED USING THE INTERRUPT SERVICE.  eXAMPLES OF ROUTINES THAT CAN MAKE EFFICIENT USE OF INTERUPTS IS MORE CLEARLY EXPLAINED IN THE uSEFUL sUBROUTINE SECTION.
    iN THE mOD i, ONLY THE rEAL tIME cLOCK IS CONNECTED TO THE MASKABLE INTERRUPT LINE, AND IT WILL GENERATE EVERY 25 MILLISECONDS PROVIDED INTERRUPTS ARE "ENABLED".  tHE "HEARTBEAT" OR rtc INTERRUPT IS GENERATED IN THE EXPANSION INTERFACE, AND ONLY COMPUTERS WITH THIS ATTACHMENT WILL HAVE THIS TYPE OF INTERRUPT.  tHE INTERRUPT SERVICE SUBROUTINE CAN READ ADDRESS 37e0h TO DETERMINE IF A VALID INTERRUPT HAS BEEN GENERATED.  iF bIT 7 IS SET, THEN A VALID rtc INTERRUPT HAS BEEN ISSUED.
    iN THE mOD iii, MORE EXTENSIVE USE IS MADE OF THE MASKABLE INTERRUPT HARDWARE, AND THE rs232, EXTERNAL i/o BUS, REAL TIME CLOCK, AND 1500 BAUD CASSETTE OPERATION ARE ALL CONNECTED TO THIS LINE.  tHE rtc WILL BE GENERATED EVERY 33 MILLISECONDS IN THE mOD iii.  tHE OTHER DEVICES WILL GENERATE AN INTERRUPT AS THEY NEED TO BE SERVICED.  iN INTERRUPT mODE 1, EACH OF THESE DEVICES WILL FORCE A rst 38h OPCODE TO BE EXECUTED.  tHE INTERRUPT SERVICE SUBROUTINE CAN READ pORT e0h TO DETERMINE WHICH DEVICE HAS CAUSED THE INTERRUPT AS FOLLOWS:
bIT 6 = 0 = rs232 eRROR
bIT 5 = 0 = rs232 rECEIVE
bIT 4 = 0 = rs232 tRANSMIT
bIT 3 = 0 = EXTERNAL i/o BUS
bIT 2 = 0 = REAL TIME CLOCK
bIT 1 = 0 = CASSETTE (1500 BAUD) FALLING EDGE
bIT 0 = 0 = CASSETTE (1500 BAUD) RISING EDGE
    uSEFUL INTERRUPT SUBROUTINES ARE GIVEN IN THAT SECTION.

