; The format of the input file:
; each device definition begins with a line like this:
;
;       .devicename
;
;  after it go the port definitions in this format:
;
;       portname        address
;
;  the bit definitions (optional) are represented like this:
;
;       portname.bitname  bitnumber
;
; lines beginning with a space are ignored.
; comment lines should be started with ';' character.
;
; the default device is specified at the start of the file
;
;       .default device_name
;
; all lines non conforming to the format are passed to the callback function
;
; MOTOROLA SPECIFIC LINES
;------------------------
;
; the processor definition may include the memory configuration.
; the line format is:

;       area CLASS AREA-NAME START:END
;
; where CLASS is anything, but please use one of CODE, DATA, BSS
;       START and END are addresses, the end address is not included

; Interrupt vectors are declared in the following way:

; interrupt NAME ADDRESS COMMENT

.default 68HC08AZ60


.68HC08AB16A
; MC68HC08AB16A/D  http://
; MC68HC08AB16A.pdf

; RAM=512
; ROM=16384
; EPROM=0
; EEPROM=512


; MEMORY MAP
area DATA FSR_1           0x0000:0x0050
area DATA RAM             0x0050:0x0250
area BSS  Unimplemented   0x0250:0x0500
area BSS  RESERVED        0x0500:0x0580
area BSS  Unimplemented   0x0580:0x0800
area DATA EEPROM_1        0x0800:0x0A00
area BSS  Unimplemented   0x0A00:0xBE00
area DATA ROM             0xBE00:0xFE00
area DATA FSR_2           0xFE00:0xFE20
area DATA ROM_Monitor     0xFE20:0xFF53
area BSS  Unimplemented   0xFF53:0xFFC0
area BSS  Reserved_ROM    0xFFC0:0xFFD0
area DATA USER_VEC        0xFFD0:0x10000


; Interrupt and reset vector assignments
interrupt __RESET      0xFFFE      Processor reset
interrupt SWI          0xFFFC      SWI Vector
interrupt IRQ          0xFFFA      IRQ Vector
interrupt PLL          0xFFF8      PLL Vector
interrupt PIT          0xFFF6      Programmable Interrupt Timer Vector
interrupt TIMERA_CH0   0xFFF4      Timer A Channel 0 Vector
interrupt TIMERA_CH1   0xFFF2      Timer A Channel 1 Vector
interrupt TIMERA_CH2   0xFFF0      Timer A Channel 2 Vector
interrupt TIMERA_CH3   0xFFEE      Timer A Channel 3 Vector
interrupt TIMERA_OV    0xFFEC      Timer A Overflow Vector
interrupt TIMERB_CH0   0xFFEA      Timer B Channel 0 Vector
interrupt TIMERB_CH1   0xFFE8      Timer B Channel 1 Vector
interrupt TIMERB_OV    0xFFE6      Timer B Overflow Vector
interrupt RESIVE       0xFFE4      SPI Receive Vector
interrupt TRANSMIT     0xFFE2      SPI Transmit Vector
interrupt TIMERB_CH2   0xFFE0      Timer B Channel 2 Vector
interrupt TIMERB_CH3   0xFFDE      Timer B Channel 3 Vector
interrupt RESERV_1     0xFFDC      Reserved
interrupt RESERV_2     0xFFDA      Reserved
interrupt SCI_ER       0xFFD8      SCI Error Vector
interrupt SCI_R        0xFFD6      SCI Receive Vector
interrupt SCI_T        0xFFD4      SCI Transmit Vector
interrupt KBD          0xFFD2      Keyboard Vector
interrupt CC           0xFFD0      ADC Conversion Complete Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bit 7
PTA.PTA6               6   Port A Data Bit 6
PTA.PTA5               5   Port A Data Bit 5
PTA.PTA4               4   Port A Data Bit 4
PTA.PTA3               3   Port A Data Bit 3
PTA.PTA2               2   Port A Data Bit 2
PTA.PTA1               1   Port A Data Bit 1
PTA.PTA0               0   Port A Data Bit 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bit 7
PTB.PTB6               6   Port B Data Bit 6
PTB.PTB5               5   Port B Data Bit 5
PTB.PTB4               4   Port B Data Bit 4
PTB.PTB3               3   Port B Data Bit 3
PTB.PTB2               2   Port B Data Bit 2
PTB.PTB1               1   Port B Data Bit 1
PTB.PTB0               0   Port B Data Bit 0
PTC                   0x0002     Port C Data Register
PTC.PTC5               5   Port C Data Bit 5
PTC.PTC4               4   Port C Data Bit 4
PTC.PTC3               3   Port C Data Bit 3
PTC.PTC2               2   Port C Data Bit 2
PTC.PTC1               1   Port C Data Bit 1
PTC.PTC0               0   Port C Data Bit 0
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bit 7
PTD.PTD6               6   Port D Data Bit 6
PTD.PTD5               5   Port D Data Bit 5
PTD.PTD4               4   Port D Data Bit 4
PTD.PTD3               3   Port D Data Bit 3
PTD.PTD2               2   Port D Data Bit 2
PTD.PTD1               1   Port D Data Bit 1
PTD.PTD0               0   Port D Data Bit 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bit 7
DDRA.DDRA6             6   Data Direction Register A Bit 6
DDRA.DDRA5             5   Data Direction Register A Bit 5
DDRA.DDRA4             4   Data Direction Register A Bit 4
DDRA.DDRA3             3   Data Direction Register A Bit 3
DDRA.DDRA2             2   Data Direction Register A Bit 2
DDRA.DDRA1             1   Data Direction Register A Bit 1
DDRA.DDRA0             0   Data Direction Register A Bit 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bit 7
DDRB.DDRB6             6   Data Direction Register B Bit 6
DDRB.DDRB5             5   Data Direction Register B Bit 5
DDRB.DDRB4             4   Data Direction Register B Bit 4
DDRB.DDRB3             3   Data Direction Register B Bit 3
DDRB.DDRB2             2   Data Direction Register B Bit 2
DDRB.DDRB1             1   Data Direction Register B Bit 1
DDRB.DDRB0             0   Data Direction Register B Bit 0
DDRC                  0x0006     Data Direction Register C
DDRC.MCLKEN            7   T12 System Clock Enable Bit
DDRC.DDRC5             5   Data Direction Register C Bit 5
DDRC.DDRC4             4   Data Direction Register C Bit 4
DDRC.DDRC3             3   Data Direction Register C Bit 3
DDRC.DDRC2             2   Data Direction Register C Bit 2
DDRC.DDRC1             1   Data Direction Register C Bit 1
DDRC.DDRC0             0   Data Direction Register C Bit 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bit 7
DDRD.DDRD6             6   Data Direction Register D Bit 6
DDRD.DDRD5             5   Data Direction Register D Bit 5
DDRD.DDRD4             4   Data Direction Register D Bit 4
DDRD.DDRD3             3   Data Direction Register D Bit 3
DDRD.DDRD2             2   Data Direction Register D Bit 2
DDRD.DDRD1             1   Data Direction Register D Bit 1
DDRD.DDRD0             0   Data Direction Register D Bit 0
PTE                   0x0008     Port E Data Register
PTE.PTE7               7   Port E Data Bit 7
PTE.PTE6               6   Port E Data Bit 6
PTE.PTE5               5   Port E Data Bit 5
PTE.PTE4               4   Port E Data Bit 4
PTE.PTE3               3   Port E Data Bit 3
PTE.PTE2               2   Port E Data Bit 2
PTE.PTE1               1   Port E Data Bit 1
PTE.PTE0               0   Port E Data Bit 0
PTF                   0x0009     Port F Data Register
PTF.PTF7               7   Port F Data Bit 7
PTF.PTF6               6   Port F Data Bit 6
PTF.PTF5               5   Port F Data Bit 5
PTF.PTF4               4   Port F Data Bit 4
PTF.PTF3               3   Port F Data Bit 3
PTF.PTF2               2   Port F Data Bit 2
PTF.PTF1               1   Port F Data Bit 1
PTF.PTF0               0   Port F Data Bit 0
PTG                   0x000A     Port G Data Register
PTG.PTG2               2   Port G Data Bit 2
PTG.PTG1               1   Port G Data Bit 1
PTG.PTG0               0   Port G Data Bit 0
PTH                   0x000B     Port H Data Register
PTH.PTH1               1   Port H Data Bit 1
PTH.PTH0               0   Port H Data Bit 0
DDRE                  0x000C     Data Direction Register E
DDRE.DDRE7             7   Data Direction Register E Bit 7
DDRE.DDRE6             6   Data Direction Register E Bit 6
DDRE.DDRE5             5   Data Direction Register E Bit 5
DDRE.DDRE4             4   Data Direction Register E Bit 4
DDRE.DDRE3             3   Data Direction Register E Bit 3
DDRE.DDRE2             2   Data Direction Register E Bit 2
DDRE.DDRE1             1   Data Direction Register E Bit 1
DDRE.DDRE0             0   Data Direction Register E Bit 0
DDRF                  0x000D     Data Direction Register F
DDRF.DDRF7             7   Data Direction Register F Bit 7
DDRF.DDRF6             6   Data Direction Register F Bit 6
DDRF.DDRF5             5   Data Direction Register F Bit 5
DDRF.DDRF4             4   Data Direction Register F Bit 4
DDRF.DDRF3             3   Data Direction Register F Bit 3
DDRF.DDRF2             2   Data Direction Register F Bit 2
DDRF.DDRF1             1   Data Direction Register F Bit 1
DDRF.DDRF0             0   Data Direction Register F Bit 0
DDRG                  0x000E     Data Direction Register G
DDRG.DDRG2             2   Data Direction Register G Bit 2
DDRG.DDRG1             1   Data Direction Register G Bit 1
DDRG.DDRG0             0   Data Direction Register G Bit 0
DDRH                  0x000F     Data Direction Register H
DDRH.DDRH1             1   Data Direction Register H Bit 1
DDRH.DDRH0             0   Data Direction Register H Bit 0
SPCR                  0x0010     SPI Control Register
SPCR.SPRIE             7   SPI Receiver Interrupt Enable Bit
SPCR.SPMSTR            5   SPI Master Bit
SPCR.CPOL              4   Clock Polarity Bit
SPCR.CPHA              3   Clock Phase Bit
SPCR.SPWOM             2   SPI Wired-OR Mode Bit
SPCR.SPE               1   SPI Enable
SPCR.SPTIE             0   SPI Transmit Interrupt Enable
SPSCR                 0x0011     SPI Status and Control Register
SPSCR.SPRF             7   SPI Receiver Full Bit
SPSCR.ERRIE            6   Error Interrupt Enable Bit
SPSCR.OVRF             5   Overflow Bit
SPSCR.MODF             4   Mode Fault Bit
SPSCR.SPTE             3   SPI Transmitter Empty Bit
SPSCR.MODFEN           2   Mode Fault Enable Bit
SPSCR.SPR1             1   SPI Baud Rate Select Bits 1
SPSCR.SPR0             0   SPI Baud Rate Select Bits 0
SPDR                  0x0012     SPI Data Register
SPDR.R7_T7             7   Receive/Transmit Data Bit 7
SPDR.R6_T6             6   Receive/Transmit Data Bit 6
SPDR.R5_T5             5   Receive/Transmit Data Bit 5
SPDR.R4_T4             4   Receive/Transmit Data Bit 4
SPDR.R3_T3             3   Receive/Transmit Data Bit 3
SPDR.R2_T2             2   Receive/Transmit Data Bit 2
SPDR.R1_T1             1   Receive/Transmit Data Bit 1
SPDR.R0_T0             0   Receive/Transmit Data Bit 0
SCC1                  0x0013     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit
SCC1.ENSCI             6   Enable SCI Bit
SCC1.TXINV             5   Transmit Inversion Bit
SCC1.M                 4   Mode (Character Length) Bit
SCC1.WAKE              3   Wakeup Condition Bit
SCC1.ILTY              2   Idle Line Type Bit
SCC1.PEN               1   Parity Enable Bit
SCC1.PTY               0   Parity Bit
SCC2                  0x0014     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit
SCC2.ILIE              4   Idle Line Interrupt Enable Bit
SCC2.TE                3   Transmitter Enable Bit
SCC2.RE                2   Receiver Enable Bit
SCC2.RWU               1   Receiver Wakeup Bit
SCC2.SBK               0   Send Break Bit
SCC3                  0x0015     SCI Control Register 3
SCC3.R8                7   Received Bit 8
SCC3.T8                6   Transmitted Bit 8
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit
SCS1                  0x0016     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit
SCS1.TC                6   Transmission Complete Bit
SCS1.SCRF              5   SCI Receiver Full Bit
SCS1.IDLE              4   Receiver Idle Bit
SCS1.OR                3   Receiver Overrun Bit
SCS1.NF                2   Receiver Noise Flag Bit
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit
SCS2                  0x0017     SCI Status Register 2
SCS2.BKF               1   Break Flag Bit
SCS2.RPF               0   Reception in Progress Flag Bit
SCDR                  0x0018     SCI Data Register
SCDR.R7_T7             7   Receive/Transmit Data Bit 7
SCDR.R6_T6             6   Receive/Transmit Data Bit 6
SCDR.R5_T5             5   Receive/Transmit Data Bit 5
SCDR.R4_T4             4   Receive/Transmit Data Bit 4
SCDR.R3_T3             3   Receive/Transmit Data Bit 3
SCDR.R2_T2             2   Receive/Transmit Data Bit 2
SCDR.R1_T1             1   Receive/Transmit Data Bit 1
SCDR.R0_T0             0   Receive/Transmit Data Bit 0
SCBR                  0x0019     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2
SCBR.SCR1              1   SCI Baud Rate Select Bits 1
SCBR.SCR0              0   SCI Baud Rate Select Bits 0
ISCR                  0x001A     IRQ Status and Control Register
ISCR.IRQF              3   IRQ Flag
ISCR.ACK               2   IRQ Interrupt Request Acknowledge Bit
ISCR.IMASK             1   IRQ Interrupt Mask Bit
ISCR.MODE              0   IRQ Edge/Level Select Bit
KBSCR                 0x001B     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
PCTL                  0x001C     PLL Control Register
PCTL.PLLIE             7   PLL Interrupt Enable Bit
PCTL.PLLF              6   PLL Interrupt Flag Bit
PCTL.PLLON             5   PLL On Bit
PCTL.BCS               4   Base Clock Select Bit
PBWC                  0x001D     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               5   Acquisition Mode Bit
PBWC.XLD               4   Crystal Loss Detect Bit
PPG                   0x001E     PLL Programming Register
PPG.MUL7               7   Multiplier Select Bits 7
PPG.MUL6               6   Multiplier Select Bits 6
PPG.MUL5               5   Multiplier Select Bits 5
PPG.MUL4               4   Multiplier Select Bits 4
PPG.VRS7               3   VCO Range Select Bits 7
PPG.VRS6               2   VCO Range Select Bits 6
PPG.VRS5               1   VCO Range Select Bits 5
PPG.VRS4               0   VCO Range Select Bits 4
MORA                  0x001F     Mask Option Register A
MORA.LVISTOP           7   LVI Enable in Stop Mode Bit
MORA.SEC               6   ROM Security Bit
MORA.LVIRSTD           5   LVI Reset Disable Bit
MORA.LVIPWRD           4   LVI Power Disable Bit
MORA.SSREC             3   Short Stop Recovery Bit
MORA.COPRS             2   COP Rate Select Bit
MORA.STOP              1   STOP Instruction Enable Bit
MORA.COPD              0   COP Disable Bit
TASC                  0x0020     Timer A Status and Control Register
TASC.TOF               7   TIMA Overflow Flag Bit
TASC.TOIE              6   TIMA Overflow Interrupt Enable Bit
TASC.TSTOP             5   TIMA Stop Bit
TASC.TRST              4   TIMA Reset Bit
TASC.PS2               2   Prescaler Select Bits 2
TASC.PS1               1   Prescaler Select Bits 1
TASC.PS0               0   Prescaler Select Bits 0
KBIER                 0x0021     Keyboard Interrupt Enable Register
KBIER.KBIE4            4   Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Keyboard Interrupt Enable Bits 0
TACNTH                0x0022     Timer A Counter Register High
TACNTL                0x0023     Timer A Counter Register Low
TAMODH                0x0024     Timer A Counter Modulo Register High
TAMODL                0x0025     Timer A Counter Modulo Register Low
TASC0                 0x0026     Timer A Channel 0 Status and Control Register
TASC0.CH0F             7   Channel 0 Flag Bit
TASC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TASC0.MS0B             5   Mode Select Bit B
TASC0.MS0A             4   Mode Select Bit A
TASC0.ELS0B            3   Edge/Level Select Bit B
TASC0.ELS0A            2   Edge/Level Select Bit A
TASC0.TOV0             1   Toggle-On-Overflow Bit
TASC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TACH0H                0x0027     Timer A Channel 0 Register High
TACH0L                0x0028     Timer A Channel 0 Register Low
TASC1                 0x0029     Timer A Channel 1 Status and Control Register
TASC1.CH1F             7   Channel 1 Flag Bit            
TASC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TASC1.MS1A             4   Mode Select Bit A               
TASC1.ELS1B            3   Edge/Level Select Bit B         
TASC1.ELS1A            2   Edge/Level Select Bit A         
TASC1.TOV1             1   Toggle-On-Overflow Bit          
TASC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TACH1H                0x002A     Timer A Channel 1 Register High
TACH1L                0x002B     Timer A Channel 1 Register Low
TASC2                 0x002C     Timer A Channel 2 Status and Control Register
TASC2.CH2F             7   Channel 2 Flag Bit              
TASC2.CH2IE            6   Channel 2 Interrupt Enable Bit  
TASC2.MS2B             5   Mode Select Bit B               
TASC2.MS2A             4   Mode Select Bit A               
TASC2.ELS2B            3   Edge/Level Select Bit B         
TASC2.ELS2A            2   Edge/Level Select Bit A         
TASC2.TOV2             1   Toggle-On-Overflow Bit          
TASC2.CH2MAX           0   Channel 2 Maximum Duty Cycle Bit
TACH2H                0x002D     Timer A Channel 2 Register High
TACH2L                0x002E     Timer A Channel 2 Register Low
TASC3                 0x002F     Timer A Channel 3 Status and Control Register
TASC3.CH3F             7   Channel 3 Flag Bit              
TASC3.CH3IE            6   Channel 3 Interrupt Enable Bit  
TASC3.MS3A             4   Mode Select Bit A               
TASC3.ELS3B            3   Edge/Level Select Bit B         
TASC3.ELS3A            2   Edge/Level Select Bit A         
TASC3.TOV3             1   Toggle-On-Overflow Bit          
TASC3.CH3MAX           0   Channel 3 Maximum Duty Cycle Bit
TACH3H                0x0030     Timer A Channel 3 Register High
TACH3L                0x0031     Timer A Channel 3 Register Low
TBSC2                 0x0032     Timer B Channel 2 Status and Control Register
TBSC2.CH2F             7   Channel 2 Flag Bit              
TBSC2.CH2IE            6   Channel 2 Interrupt Enable Bit  
TBSC2.MS2B             5   Mode Select Bit B               
TBSC2.MS2A             4   Mode Select Bit A               
TBSC2.ELS2B            3   Edge/Level Select Bit B         
TBSC2.ELS2A            2   Edge/Level Select Bit A         
TBSC2.TOV2             1   Toggle-On-Overflow Bit          
TBSC2.CH2MAX           0   Channel 2 Maximum Duty Cycle Bit
TBCH2H                0x0033     Timer B Channel 2 Register High
TBCH2L                0x0034     Timer B Channel 2 Register Low
TBSC3                 0x0035     Timer B Channel 3 Status and Control Register
TBSC3.CH3F             7   Channel 3 Flag Bit              
TBSC3.CH3IE            6   Channel 3 Interrupt Enable Bit  
TBSC3.MS3A             4   Mode Select Bit A               
TBSC3.ELS3B            3   Edge/Level Select Bit B         
TBSC3.ELS3A            2   Edge/Level Select Bit A         
TBSC3.TOV3             1   Toggle-On-Overflow Bit          
TBSC3.CH3MAX           0   Channel 3 Maximum Duty Cycle Bit
TACH3H                0x0036     Timer B Channel 3 Register High
TBCH3L                0x0037     Timer B Channel 3 Register Low
ADSCR                 0x0038     Analog-to-Digital Status and Control Register
ADSCR.COCO             7   Conversions Complete
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADR                   0x0039     Analog-to-Digital Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADCLK                 0x003A     Analog-to-Digital Clock Register
ADCLK.ADIV2            7   ADC Clock Prescaler Bits 2
ADCLK.ADIV1            6   ADC Clock Prescaler Bits 1
ADCLK.ADIV0            5   ADC Clock Prescaler Bits 0
ADCLK.ADICLK           4   ADC Input Clock Select Bit
Reserv003B            0x003B     Reserved
Reserv003C            0x003C     Reserved
PTDPUE                0x003D     Port D Input Pullup Enable Register
PTDPUE.PTDPUE7         7   Port D Input Pullup Enable Bit 7
PTDPUE.PTDPUE6         6   Port D Input Pullup Enable Bit 6
PTDPUE.PTDPUE5         5   Port D Input Pullup Enable Bit 5
PTDPUE.PTDPUE4         4   Port D Input Pullup Enable Bit 4
PTDPUE.PTDPUE3         3   Port D Input Pullup Enable Bit 3
PTDPUE.PTDPUE2         2   Port D Input Pullup Enable Bit 2
PTDPUE.PTDPUE1         1   Port D Input Pullup Enable Bit 1
PTDPUE.PTDPUE0         0   Port D Input Pullup Enable Bit 0
PTFPUE                0x003E     Port F Input Pullup Enable Register
PTFPUE.PTFPUE7         7   Port F Input Pullup Enable Bit 7
PTFPUE.PTFPUE6         6   Port F Input Pullup Enable Bit 6
PTFPUE.PTFPUE5         5   Port F Input Pullup Enable Bit 5
PTFPUE.PTFPUE4         4   Port F Input Pullup Enable Bit 4
PTFPUE.PTFPUE3         3   Port F Input Pullup Enable Bit 3
PTFPUE.PTFPUE2         2   Port F Input Pullup Enable Bit 2
PTFPUE.PTFPUE1         1   Port F Input Pullup Enable Bit 1
PTFPUE.PTFPUE0         0   Port F Input Pullup Enable Bit 0
MORB                  0x003F     Mask Option Register B
MORB.EEDIVCLK          6   EEPROM Timebase Divider Clock Select Bit
MORB.EESEC             5   EEPROM Security Enable Bit
MORB.EEMONSEC          4   EEPROM Security in Monitor Mode Bit
TBSC                  0x0040     Timer B Status and Control Register
TBSC.TOF               7   TIMB Overflow Flag Bit
TBSC.TOIE              6   TIMB Overflow Interrupt Enable Bit
TBSC.TSTOP             5   TIMB Stop Bit
TBSC.TRST              4   TIMB Reset Bit
TBSC.PS2               2   Prescaler Select Bits 2
TBSC.PS1               1   Prescaler Select Bits 1
TBSC.PS0               0   Prescaler Select Bits 0
TBCNTH                0x0041     Timer B Counter Register High
TBCNTL                0x0042     Timer B Counter Register Low
TBMODH                0x0043     Timer B Counter Modulo Register High
TBMODL                0x0044     Timer B Counter Modulo Register Low
TBSC0                 0x0045     Timer B Channel 0 Status and Control Register
TBSC0.CH0F             7   Channel 0 Flag Bit              
TBSC0.CH0IE            6   Channel 0 Interrupt Enable Bit  
TBSC0.MS0B             5   Mode Select Bit B               
TBSC0.MS0A             4   Mode Select Bit A               
TBSC0.ELS0B            3   Edge/Level Select Bit B         
TBSC0.ELS0A            2   Edge/Level Select Bit A         
TBSC0.TOV0             1   Toggle-On-Overflow Bit          
TBSC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TBCH0H                0x0046     Timer B Channel 0 Register High
TBCH0L                0x0047     Timer B Channel 0 Register Low
TBSC1                 0x0048     Timer B Channel 1 Status and Control Register
TBSC1.CH1F             7   Channel 1 Flag Bit              
TBSC1.CH1IE            6   Channel 1 Interrupt Enable Bit  
TBSC1.MS1A             4   Mode Select Bit A               
TBSC1.ELS1B            3   Edge/Level Select Bit B         
TBSC1.ELS1A            2   Edge/Level Select Bit A         
TBSC1.TOV1             1   Toggle-On-Overflow Bit          
TBSC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TBCH1H                0x0049     Timer B Channel 1 Register High
TBCH1L                0x004A     Timer B Channel 1 Register Low
PSC                   0x004B     PIT Status and Control Register
PSC.POF                7   PIT Overflow Flag Bit
PSC.POIE               6   PIT Overflow Interrupt Enable Bit
PSC.PSTOP              5   PIT Stop Bit
PSC.PRST               4   PIT Reset Bit
PSC.PPS2               2   PIT Prescaler Select Bits 2
PSC.PPS1               1   PIT Prescaler Select Bits 1
PSC.PPS0               0   PIT Prescaler Select Bits 0
PCNTH                 0x004C     PIT Counter Register High
PCNTL                 0x004D     PIT Counter Register Low
PMODH                 0x004E     PIT Counter Modulo Register High
PMODL                 0x004F     PIT Counter Modulo Register Low
SBSR                  0xFE00     SIM Break Status Register
SBSR.SBSW              1   SIM Break STOP/WAIT
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Bit
SRSR.PIN               6   External Reset Bit
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit (opcode fetches only)
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
ReservFE02            0xFE02     Reserved
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
ReservFE04            0xFE04     Reserved
ReservFE05            0xFE05     Reserved
ReservFE06            0xFE06     Reserved
ReservFE07            0xFE07     Reserved
UNUSEDFE08            0xFE08     UNUSED
ReservFE09            0xFE09     Reserved
ReservFE0A            0xFE0A     Reserved
ReservFE0B            0xFE0B     Reserved
BRKH                  0xFE0C     Break Address Register High
BRKL                  0xFE0D     Break Address Register Low
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
LVISR                 0xFE0F     Low-Voltage Inhibit Status Register
LVISR.LVIOUT           7   LVI Output Bit
EEDIVHMOR             0xFE10     EEDIV Mask Option Register High
EEDIVHMOR.EEDIVSECD    7   EEPROM Divider Security Disable
EEDIVHMOR.EEDIV10      2   EEPROM Timebase Prescaler 10   
EEDIVHMOR.EEDIV9       1   EEPROM Timebase Prescaler 9    
EEDIVHMOR.EEDIV8       0   EEPROM Timebase Prescaler 8    
EEDIVLMOR             0xFE11     EEDIV Mask Option Register Low
EEDIVLMOR.EEDIV7       7   EEPROM Timebase Prescaler 7
EEDIVLMOR.EEDIV6       6   EEPROM Timebase Prescaler 6
EEDIVLMOR.EEDIV5       5   EEPROM Timebase Prescaler 5
EEDIVLMOR.EEDIV4       4   EEPROM Timebase Prescaler 4
EEDIVLMOR.EEDIV3       3   EEPROM Timebase Prescaler 3
EEDIVLMOR.EEDIV2       2   EEPROM Timebase Prescaler 2
EEDIVLMOR.EEDIV1       1   EEPROM Timebase Prescaler 1
EEDIVLMOR.EEDIV0       0   EEPROM Timebase Prescaler 0
EEDIVH                0xFE1A     EE Divider Register High
EEDIVH.EEDIVSECD       7   EEPROM Divider Security Disable
EEDIVH.EEDIV10         2   EEPROM Timebase Prescaler 10
EEDIVH.EEDIV9          1   EEPROM Timebase Prescaler 9
EEDIVH.EEDIV8          0   EEPROM Timebase Prescaler 8
EEDIVL                0xFE1B     EE Divider Register Low
EEDIVL.EEDIV7          7   EEPROM Timebase Prescaler 7
EEDIVL.EEDIV6          6   EEPROM Timebase Prescaler 6
EEDIVL.EEDIV5          5   EEPROM Timebase Prescaler 5
EEDIVL.EEDIV4          4   EEPROM Timebase Prescaler 4
EEDIVL.EEDIV3          3   EEPROM Timebase Prescaler 3
EEDIVL.EEDIV2          2   EEPROM Timebase Prescaler 2
EEDIVL.EEDIV1          1   EEPROM Timebase Prescaler 1
EEDIVL.EEDIV0          0   EEPROM Timebase Prescaler 0
EENVR                 0xFE1C     EEPROM Non-volatile Register
EENVR.CON3             7
EENVR.CON2             6
EENVR.CON1             5
EENVR.EEPRTCT          4   EEPROM Protection Bit
EENVR.EEBP3            3   EEPROM Block Protection Bit 3
EENVR.EEBP2            2   EEPROM Block Protection Bit 2
EENVR.EEBP1            1   EEPROM Block Protection Bit 1
EENVR.EEBP0            0   EEPROM Block Protection Bit 0
EECR                  0xFE1D     EEPROM Control Register
EECR.EEDUM             7   Dummy Bit
EECR.EEOFF             5   EEPROM Power-Off
EECR.EERAS1            4   Erase/Program Mode Select Bits 1
EECR.EERAS0            3   Erase/Program Mode Select Bits 0
EECR.EELAT             2   EEPROM Latch Control
EECR.AUTO              1   Automatic termination of program/erase cycle
EECR.EEPGM             0   EEPROM Program/Erase Enable
ReservFE1E            0xFE1E     Reserved
EEACR                 0xFE1F     EEPROM Array Configuration Register
EEACR.CON3             7
EEACR.CON2             6
EEACR.CON1             5
EEACR.EEPRTCT          4   EEPROM Protection Bit
EEACR.EEBP3            3   EEPROM Block Protection Bits 3
EEACR.EEBP2            2   EEPROM Block Protection Bits 2
EEACR.EEBP1            1   EEPROM Block Protection Bits 1
EEACR.EEBP0            0   EEPROM Block Protection Bits 0
UNUSEDFF7E            0xFF7E     UNUSED
COPCTL                0xFFFF     COP Control Register


.68HC08AS20
; MC68HC08AS20/D  http://e-www.motorola.com/brdata/PDFDB/docs/MC68HC08AS20.pdf
; MC68HC08AS20.pdf

; RAM=640 
; ROM=20480 
; EPROM=0
; EEPROM=512 


; MEMORY MAP
area DATA FSR      	  0x0000:0x0040
area BSS  UNIMPLEMENTED	  0x0040:0x0050
area DATA RAM      	  0x0050:0x02D0
area BSS  RESERVED  	  0x02D0:0x02D2
area BSS  UNIMPLEMENTED   0x02D2:0x0800
area DATA EEPROM   	  0x0800:0x0A00
area BSS  RESERVED  	  0x0A00:0x0A02
area BSS  UNIMPLEMENTED   0x0A02:0xAE00
area DATA ROM      	  0xAE00:0xFE00
area DATA FSR_1    	  0xFE00:0xFE20
area DATA MONITOR_ROM     0xFE20:0xFF00
area BSS  UNIMPLEMENTED	  0xFF00:0xFFDC
area DATA USER_VEC        0xFFDC:0x10000


; Interrupt and reset vector assignments
interrupt __RESET           0xFFFE      Processor reset
interrupt SWI               0xFFFC      "SWI" 
interrupt IRQ               0xFFFA      "IRQ"
interrupt PLL               0xFFF8      "PLL Module"
interrupt TIMA_CH0          0xFFF6      "TIMA Channel 0"
interrupt TIMA_CH1          0xFFF4      "TIMA Channel 1"
interrupt TIMA_CH2          0xFFF2      "TIMA Channel 2"
interrupt TIMA_CH3          0xFFF0      "TIMA Channel 3"
interrupt TIMA_CH4          0xFFEE      "TIMA Channel 4"
interrupt TIMA_CH5          0xFFEC      "TIMA Channel 5"
interrupt TIM               0xFFEA      "TIM Overflow Vector"
interrupt SPI_R             0xFFE8      "SPI Receive Vector"
interrupt SPI_T             0xFFE6      "SPI Transmit Vector"
interrupt SCI_E             0xFFE4      "SCI Error Vector"
interrupt SCI_R             0xFFE2      "SCI Receive"
interrupt SCI_T             0xFFE0      "SCI Transmit"
interrupt ADC               0xFFDE      "ADC Conversion Complete"
interrupt BDLC              0xFFDC      "BDLC Vector"


; INPUT/ OUTPUT PORTS
PTA             0x0000    Port A Data Register
PTA.PTA7          7  Port A Data Bit 7
PTA.PTA6          6  Port A Data Bit 6
PTA.PTA5          5  Port A Data Bit 5
PTA.PTA4          4  Port A Data Bit 4
PTA.PTA3          3  Port A Data Bit 3
PTA.PTA2          2  Port A Data Bit 2
PTA.PTA1          1  Port A Data Bit 1
PTA.PTA0          0  Port A Data Bit 0
PTB             0x0001    Port B Data Register
PTB.PTB7          7  Port B Data Bit 7
PTB.PTB6          6  Port B Data Bit 6
PTB.PTB5          5  Port B Data Bit 5
PTB.PTB4          4  Port B Data Bit 4
PTB.PTB3          3  Port B Data Bit 3
PTB.PTB2          2  Port B Data Bit 2
PTB.PTB1          1  Port B Data Bit 1
PTB.PTB0          0  Port B Data Bit 0
PTC             0x0002    Port C Data Register
PTC.PTC4          4  Port C Data Bit 4
PTC.PTC3          3  Port C Data Bit 3
PTC.PTC2          2  Port C Data Bit 2
PTC.PTC1          1  Port C Data Bit 1
PTC.PTC0          0  Port C Data Bit 0
PTD             0x0003    Port D Data Register
PTD.PTD6          6  Port D Data Bit 6
PTD.PTD5          5  Port D Data Bit 5
PTD.PTD4          4  Port D Data Bit 4
PTD.PTD3          3  Port D Data Bit 3
PTD.PTD2          2  Port D Data Bit 2
PTD.PTD1          1  Port D Data Bit 1
PTD.PTD0          0  Port D Data Bit 0
DDRA            0x0004    Data Direction Register A
DDRA.DDRA7        7  Data Direction Register A Bit 7
DDRA.DDRA6        6  Data Direction Register A Bit 6
DDRA.DDRA5        5  Data Direction Register A Bit 5
DDRA.DDRA4        4  Data Direction Register A Bit 4
DDRA.DDRA3        3  Data Direction Register A Bit 3
DDRA.DDRA2        2  Data Direction Register A Bit 2
DDRA.DDRA1        1  Data Direction Register A Bit 1
DDRA.DDRA0        0  Data Direction Register A Bit 0
DDRB            0x0005    Data Direction Register B
DDRB.DDRB7        7  Data Direction Register B Bit 7
DDRB.DDRB6        6  Data Direction Register B Bit 6
DDRB.DDRB5        5  Data Direction Register B Bit 5
DDRB.DDRB4        4  Data Direction Register B Bit 4
DDRB.DDRB3        3  Data Direction Register B Bit 3
DDRB.DDRB2        2  Data Direction Register B Bit 2
DDRB.DDRB1        1  Data Direction Register B Bit 1
DDRB.DDRB0        0  Data Direction Register B Bit 0
DDRC            0x0006    Data Direction Register C
DDRC.MCLKEN       7  MCLK Enable Bit
DDRC.DDRC4        4  Data Direction Register C Bit 4
DDRC.DDRC3        3  Data Direction Register C Bit 3
DDRC.DDRC2        2  Data Direction Register C Bit 2
DDRC.DDRC1        1  Data Direction Register C Bit 1
DDRC.DDRC0        0  Data Direction Register C Bit 0
DDRD            0x0007    Data Direction Register D
DDRD.DDRD6        6  Data Direction Register D Bit 6
DDRD.DDRD5        5  Data Direction Register D Bit 5
DDRD.DDRD4        4  Data Direction Register D Bit 4
DDRD.DDRD3        3  Data Direction Register D Bit 3
DDRD.DDRD2        2  Data Direction Register D Bit 2
DDRD.DDRD1        1  Data Direction Register D Bit 1
DDRD.DDRD0        0  Data Direction Register D Bit 0
PTE             0x0008    Port E Data Register
PTE.PTE7          7  Port E Data Bit 7
PTE.PTE6          6  Port E Data Bit 6
PTE.PTE5          5  Port E Data Bit 5
PTE.PTE4          4  Port E Data Bit 4
PTE.PTE3          3  Port E Data Bit 3
PTE.PTE2          2  Port E Data Bit 2
PTE.PTE1          1  Port E Data Bit 1
PTE.PTE0          0  Port E Data Bit 0
PTF             0x0009    Port F Data Register
PTF.PTF3          3  Port F Data Bit 3
PTF.PTF2          2  Port F Data Bit 2
PTF.PTF1          1  Port F Data Bit 1
PTF.PTF0          0  Port F Data Bit 0
UNUSED000A      0x000A    UNUSED
UNUSED000B      0x000B    UNUSED
DDRE            0x000C    Data Direction Register E
DDRE.DDRE7        7  Data Direction Register E Bit 7
DDRE.DDRE6        6  Data Direction Register E Bit 6
DDRE.DDRE5        5  Data Direction Register E Bit 5
DDRE.DDRE4        4  Data Direction Register E Bit 4
DDRE.DDRE3        3  Data Direction Register E Bit 3
DDRE.DDRE2        2  Data Direction Register E Bit 2
DDRE.DDRE1        1  Data Direction Register E Bit 1
DDRE.DDRE0        0  Data Direction Register E Bit 0
DDRF            0x000D    Data Direction Register F
DDRF.DDRF3        3  Data Direction Register F Bit 3
DDRF.DDRF2        2  Data Direction Register F Bit 2
DDRF.DDRF1        1  Data Direction Register F Bit 1
DDRF.DDRF0        0  Data Direction Register F Bit 0
UNUSED000E      0x000E    UNUSED
UNUSED000F      0x000F    UNUSED
SPCR            0x0010    SPI Control Register
SPCR.SPRIE        7  SPI Receiver Interrupt Enable Bit
SPCR.SPMSTR       5  SPI Master Bit
SPCR.CPOL         4  Clock Polarity Bit
SPCR.CPHA         3  Clock Phase Bit
SPCR.SPWOM        2  SPI Wired-OR Mode Bit
SPCR.SPE          1  SPI Enable Bit
SPCR.SPTIE        0  SPI Transmit Interrupt Enable Bit
SPSCR           0x0011    SPI Status and Control Register
SPSCR.SPRF        7  SPI Receiver Full Bit
SPSCR.ERRIE       6  Error Interrupt Enable Bit
SPSCR.OVRF        5  Overflow Bit
SPSCR.MODF        4  Mode Fault Bit
SPSCR.SPTE        3  SPI Transmitter Empty Bit
SPSCR.MODFEN      2  Mode Fault Enable Bit
SPSCR.SPR1        1  SPI Baud Rate Select Bits 1
SPSCR.SPR0        0  SPI Baud Rate Select Bits 0
SPDR            0x0012    SPI Data Register
SPDR.R7_T7        7  Receive/Transmit Data Bit 7
SPDR.R6_T6        6  Receive/Transmit Data Bit 6
SPDR.R5_T5        5  Receive/Transmit Data Bit 5
SPDR.R4_T4        4  Receive/Transmit Data Bit 4
SPDR.R3_T3        3  Receive/Transmit Data Bit 3
SPDR.R2_T2        2  Receive/Transmit Data Bit 2
SPDR.R1_T1        1  Receive/Transmit Data Bit 1
SPDR.R0_T0        0  Receive/Transmit Data Bit 0
SCC1            0x0013    SCI Control Register 1
SCC1.LOOPS        7  Loop Mode Select Bit
SCC1.ENSCI        6  Enable SCI Bit
SCC1.TXINV        5  Transmit Inversion Bit
SCC1.M            4  Mode (Character Length) Bit
SCC1.WAKE         3  Wakeup Condition Bit
SCC1.ILTY         2  Idle Line Type Bit
SCC1.PEN          1  Parity Enable Bit
SCC1.PTY          0  Parity Bit
SCC2            0x0014    SCI Control Register 2
SCC2.SCTIE        7  SCI Transmit Interrupt Enable Bit
SCC2.TCIE         6  Transmission Complete Interrupt Enable Bit
SCC2.SCRIE        5  SCI Receive Interrupt Enable Bit
SCC2.ILIE         4  Idle Line Interrupt Enable Bit
SCC2.TE           3  Transmitter Enable Bit
SCC2.RE           2  Receiver Enable Bit
SCC2.RWU          1  Receiver Wakeup Bit
SCC2.SBK          0  Send Break Bit
SCC3            0x0015    SCI Control Register 3
SCC3.R8           7  Received Bit 8
SCC3.T8           6  Transmitted Bit 8
SCC3.ORIE         3  Receiver Overrun Interrupt Enable Bit
SCC3.NEIE         2  Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE         1  Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE         0  Receiver Parity Error Interrupt Enable Bit
SCS1            0x0016    SCI Status Register 1
SCS1.SCTE         7  SCI Transmitter Empty Bit
SCS1.TC           6  Transmission Complete Bit
SCS1.SCRF         5  SCI Receiver Full Bit
SCS1.IDLE         4  Receiver Idle Bit
SCS1.OR           3  Receiver Overrun Bit
SCS1.NF           2  Receiver Noise Flag Bit
SCS1.FE           1  Receiver Framing Error Bit
SCS1.PE           0  Receiver Parity Error Bit
SCS2            0x0017    SCI Status Register 2
SCS2.BKF          1  Break Flag Bit
SCS2.RPF          0  Reception in Progress Flag Bit
SCDR            0x0018    SCI Data Register
SCDR.R7_T7        7  Receive/Transmit Data Bit 7
SCDR.R6_T6        6  Receive/Transmit Data Bit 6
SCDR.R5_T5        5  Receive/Transmit Data Bit 5
SCDR.R4_T4        4  Receive/Transmit Data Bit 4
SCDR.R3_T3        3  Receive/Transmit Data Bit 3
SCDR.R2_T2        2  Receive/Transmit Data Bit 2
SCDR.R1_T1        1  Receive/Transmit Data Bit 1
SCDR.R0_T0        0  Receive/Transmit Data Bit 0
SCBR            0x0019    SCI Baud Rate Register
SCBR.SCP1         5  SCI Baud Rate Prescaler Bits 1
SCBR.SCP0         4  SCI Baud Rate Prescaler Bits 0
SCBR.SCR2         2  SCI Baud Rate Select Bits 2
SCBR.SCR1         1  SCI Baud Rate Select Bits 1
SCBR.SCR0         0  SCI Baud Rate Select Bits 0
ISCR            0x001A    IRQ Status and Control Register
ISCR.IRQF         3  IRQ Flag Bit
ISCR.ACK          2  IRQ Interrupt Request Acknowledge Bit
ISCR.IMASK        1  IRQ Interrupt Mask Bit
ISCR.MODE         0  IRQ Edge/Level Select Bit
Reserv001B	0x001B    RESERVED
PCTL            0x001C    PLL Control Register
PCTL.PLLIE        7  PLL Interrupt Enable Bit
PCTL.PLLF         6  PLL Flag Bit
PCTL.PLLON        5  PLL On Bit
PCTL.BCS          4  Base Clock Select Bit
PBWC            0x001D    PLL Bandwidth Control Register
PBWC.AUTO         7  Automatic Bandwidth Control Bit
PBWC.LOCK         6  Lock Indicator Bit
PBWC.ACQ          5  Acquisition Mode Bit
PBWC.XLD          4  Crystal Loss Detect Bit
PPG             0x001E    PLL Programming Register
PPG.MUL7          7  Multiplier Select Bits 7
PPG.MUL6          6  Multiplier Select Bits 6
PPG.MUL5          5  Multiplier Select Bits 5
PPG.MUL4          4  Multiplier Select Bits 4
PPG.VRS7          3  VCO Range Select Bits 7
PPG.VRS6          2  VCO Range Select Bits 6
PPG.VRS5          1  VCO Range Select Bits 5
PPG.VRS4          0  VCO Range Select Bits 4
MOR             0x001F    Mask Option Register
MOR.ROMSEC        6  ROM Security Bit
MOR.LVIRSTD       5  LVI Reset Disable Bit
MOR.LVIPWRD       4  LVI Power Disable Bit
MOR.SSREC         3  Short Stop Recovery Bit
MOR.COPL          2  COP Long Timeout Bit
MOR.STOP          1  STOP Instruction Enable Bit
MOR.COPD          0  N COP Disable Bit
TSC             0x0020    TIM Status and Control Register
TSC.TOF           7  TIM Overflow Flag Bit
TSC.TOIE          6  TIM Overflow Interrupt Enable Bit
TSC.TSTOP         5  TIM Stop Bit
TSC.TRST          4  TIM Reset Bit
TSC.PS2           2  Prescaler Select Bits 2
TSC.PS1           1  Prescaler Select Bits 1
TSC.PS0           0  Prescaler Select Bits 0
Reserv0021	0x0021    RESERVED
TCNTH           0x0022    TIM Counter Register High
TCNTL           0x0023    TIM Counter Register Low
TMODH           0x0024    TIM Modulo Register High
TMODL           0x0025    TIM Modulo Register Low
TSC0            0x0026    TIM Channel 0 Status and Control Register
TSC0.CH0F         7  Channel 0 Flag Bit              
TSC0.CH0IE        6  Channel 0 Interrupt Enable Bit  
TSC0.MS0B         5  Mode Select Bit B               
TSC0.MS0A         4  Mode Select Bit A               
TSC0.ELS0B        3  Edge/Level Select Bit B         
TSC0.ELS0A        2  Edge/Level Select Bit A         
TSC0.TOV0         1  Toggle-On-Overflow Bit          
TSC0.CH0MAX       0  Channel 0 Maximum Duty Cycle Bit
TCH0H           0x0027    TIM Channel 0 Register High
TCH0L           0x0028    TIM Channel 0 Register Low
TSC1            0x0029    TIM Channel 1 Status and Control Register
TSC1.CH1F         7  Channel 1 Flag Bit              
TSC1.CH1IE        6  Channel 1 Interrupt Enable Bit  
TSC1.MS1A         4  Mode Select Bit A               
TSC1.ELS1B        3  Edge/Level Select Bit B         
TSC1.ELS1A        2  Edge/Level Select Bit A         
TSC1.TOV1         1  Toggle-On-Overflow Bit          
TSC1.CH1MAX       0  Channel 1 Maximum Duty Cycle Bit
TCH1H           0x002A    TIM Channel 1 Register High
TCH1L           0x002B    TIM Channel 1 Register Low
TSC2            0x002C    TIM Channel 2 Status and Control Register
TSC2.CH2F         7  Channel 2 Flag Bit              
TSC2.CH2IE        6  Channel 2 Interrupt Enable Bit  
TSC2.MS2B         5  Mode Select Bit B               
TSC2.MS2A         4  Mode Select Bit A               
TSC2.ELS2B        3  Edge/Level Select Bit B         
TSC2.ELS2A        2  Edge/Level Select Bit A         
TSC2.TOV2         1  Toggle-On-Overflow Bit          
TSC2.CH2MAX       0  Channel 2 Maximum Duty Cycle Bit
TCH2H           0x002D    TIM Channel 2 Register High
TCH2L           0x002E    TIM Channel 2 Register Low
TSC3            0x002F    TIM Channel 3 Status and Control Register
TSC3.CH3F         7  Channel 3 Flag Bit              
TSC3.CH3IE        6  Channel 3 Interrupt Enable Bit  
TSC3.MS3A         4  Mode Select Bit A               
TSC3.ELS3B        3  Edge/Level Select Bit B         
TSC3.ELS3A        2  Edge/Level Select Bit A         
TSC3.TOV3         1  Toggle-On-Overflow Bit          
TSC3.CH3MAX       0  Channel 3 Maximum Duty Cycle Bit
TCH3H           0x0030    TIM Channel 3 Register High
TCH3L           0x0031    TIM Channel 3 Register Low
TSC4            0x0032    TIM Channel 4 Status and Control Register
TSC4.CH4F         7  Channel 4 Flag Bit              
TSC4.CH4IE        6  Channel 4 Interrupt Enable Bit  
TSC4.MS4B         5  Mode Select Bit B               
TSC4.MS4A         4  Mode Select Bit A               
TSC4.ELS4B        3  Edge/Level Select Bit B         
TSC4.ELS4A        2  Edge/Level Select Bit A         
TSC4.TOV4         1  Toggle-On-Overflow Bit          
TSC4.CH4MAX       0  Channel 4 Maximum Duty Cycle Bit
TCH4H           0x0033    TIM Channel 4 Register High
TCH4L           0x0034    TIM Channel 4 Register Low
TSC5            0x0035    TIM Channel 5 Status and Control Register
TSC5.CH5F         7  Channel 5 Flag Bit              
TSC5.CH5IE        6  Channel 5 Interrupt Enable Bit  
TSC5.MS5A         4  Mode Select Bit A               
TSC5.ELS5B        3  Edge/Level Select Bit B         
TSC5.ELS5A        2  Edge/Level Select Bit A         
TSC5.TOV5         1  Toggle-On-Overflow Bit          
TSC5.CH5MAX       0  Channel 5 Maximum Duty Cycle Bit
TCH5H           0x0036    TIM Channel 5 Register High
TCH5L           0x0037    TIM Channel 5 Register Low
ADSCR           0x0038    ADC Status and Control Register
ADSCR.COCO        7  Conversions Complete Bit
ADSCR.AIEN        6  ADC Interrupt Enable Bit
ADSCR.ADCO        5  ADC Continuous Conversion Bit
ADSCR.ADCH4       4  ADC Channel Select Bits 4
ADSCR.ADCH3       3  ADC Channel Select Bits 3
ADSCR.ADCH2       2  ADC Channel Select Bits 2
ADSCR.ADCH1       1  ADC Channel Select Bits 1
ADSCR.ADCH0       0  ADC Channel Select Bits 0
ADR             0x0039    ADC Data Register
ADR.AD7           7
ADR.AD6           6
ADR.AD5           5
ADR.AD4           4
ADR.AD3           3
ADR.AD2           2
ADR.AD1           1
ADR.AD0           0
ADICLK          0x003A    ADC Input Clock Register
ADICLK.ADIV2      7  ADC Clock Prescaler Bits 2
ADICLK.ADIV1      6  ADC Clock Prescaler Bits 1
ADICLK.ADIV0      5  ADC Clock Prescaler Bits 0
ADICLK.ADICLK     4  ADC Input Clock Register Bit
BARD            0x003B    BDLC Analog and Roundtrip Delay Register
BARD.ATE          7  Analog Transceiver Enable Bit
BARD.RXPOL        6  Receive Pin Polarity Bit
BARD.BO3          3  BARD Offset Bits 3
BARD.BO2          2  BARD Offset Bits 2
BARD.BO1          1  BARD Offset Bits 1
BARD.BO0          0  BARD Offset Bits 0
BCR1            0x003C    BDLC Control Register 1
BCR1.IMSG         7  Ignore Message Bit
BCR1.CLKS         6  Clock Bit
BCR1.R1           5  Rate Select Bits 1
BCR1.R0           4  Rate Select Bits 0
BCR1.IE           1  Interrupt Enable Bit
BCR1.WCM          0  Wait Clock Mode Bit
BCR2            0x003D    BDLC Control Register
BCR2.ALOOP        7  Analog Loopback Mode Bit
BCR2.DLOOP        6  Digital Loopback Mode Bit
BCR2.RX4XE        5  Receive 4X Enable Bit
BCR2.NBFS         4  Normalization Bit Format Select Bit
BCR2.TEOD         3  Transmit End-of-Data Bit
BCR2.TSIFR        2  Transmit In-Frame Response Control Bits
BCR2.TMIFR1       1  Transmit In-Frame Response Control Bits 1
BCR2.TMIFR0       0  Transmit In-Frame Response Control Bits 0
BSVR            0x003E    BDLC State Vector Register
BSVR.I3           5  Interrupt Source Bit 3
BSVR.I2           4  Interrupt Source Bit 2
BSVR.I1           3  Interrupt Source Bit 1
BSVR.I0           2  Interrupt Source Bit 0
BDR             0x003F    BDLC Data Register
BDR.BD7           7
BDR.BD6           6
BDR.BD5           5
BDR.BD4           4
BDR.BD3           3
BDR.BD2           2
BDR.BD1           1
BDR.BD0           0
SBSR            0xFE00    SIM Break Status Register
SBSR.SBSW         1  SIM Break Stop/Wait Bit
SRSR            0xFE01    SIM Reset Status Register
SRSR.POR          7  Power-On Reset Flag
SRSR.PIN          6  External Reset Flag
SRSR.COP          5  COP Reset Flag
SRSR.ILOP         4  Illegal Opcode Reset Flag
SRSR.ILAD         3  Illegal Address Reset Flag
SRSR.LVI          1  Low-Voltage Inhibit Reset Flag
SBFCR           0xFE03    SIM Break Flag Control Register
SBFCR.BCFE        7  Break Clear Flag Enable Bit
ReservFE07	0xFE07    RESERVED
BRKH            0xFE0C    Break Address Register High
BRKL            0xFE0D    Break Address Register Low
BRKSCR          0xFE0E    Break Status and Control Register
BRKSCR.BRKE       7  Break Enable Bit
BRKSCR.BRKA       6  Break Active Bit
LVISR           0xFE0F    LVI Status Register
LVISR.LVIOUT      7  LVI Output Bit
LVISR.LVISTOP     3  LVI Disable in Stop Mode Bit
LVISR.LVILCK      2  LVI Lock Bit
EENVR           0xFE1C    EEPROM Nonvolatile Register
EENVR.EERA        7  EEPROM Redundant Array Bit    
EENVR.EEBP3       3  EEPROM Block Protection Bits 3
EENVR.EEBP2       2  EEPROM Block Protection Bits 2
EENVR.EEBP1       1  EEPROM Block Protection Bits 1
EENVR.EEBP0       0  EEPROM Block Protection Bits 0
EECR            0xFE1D    EEPROM Control Register
EECR.EEBCLK       7  EEPROM Bus Clock Enable Bit
EECR.EEOFF        5  EEPROM Power Down Bit
EECR.EERAS1       4  EEPROM Erase Bits 1
EECR.EERAS0       3  EEPROM Erase Bits 0
EECR.EELAT        2  EEPROM Latch Control Bit
EECR.EEPGM        0  EEPROM Program/Erase Enable Bit
ReservFE1E	0xFE1E    RESERVED
EEACR           0xFE1F    EEPROM Array Control Register
EEACR.EERA        7  EEPROM Redundant Array Bit
EEACR.EEBP3       3  EEPROM Block Protection Bits 3
EEACR.EEBP2       2  EEPROM Block Protection Bits 2
EEACR.EEBP1       1  EEPROM Block Protection Bits 1
EEACR.EEBP0       0  EEPROM Block Protection Bits 0
COPCTL          0xFFFF    COP Control Register


.68HC08AS32
; MC68HC08AS32/D  http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=68HC08AS32&nodeId=01M98634
; MC68HC08AS32.pdf

; RAM=1K
; ROM=32256
; EPROM=0
; EEPROM=512 


; MEMORY MAP
area DATA FSR              0x0000:0x0040
area BSS  UNIMPLEMENTED    0x0040:0x0050
area DATA RAM              0x0050:0x0450
area BSS  RESERVED         0x0450:0x0452
area BSS  UNIMPLEMENTED    0x0452:0x0800
area DATA EEPROM           0x0800:0x0A00
area BSS  RESERVED         0x0A00:0x0A02
area BSS  UNIMPLEMENTED    0x0A02:0x8000
area DATA ROM              0x8000:0xFE00
area DATA FSR_1            0xFE00:0xFE20
area DATA MONITOR_ROM      0xFE20:0xFF00
area BSS  UNIMPLEMENTED    0xFF00:0xFFDC
area DATA USER_VEC         0xFFDC:0x10000


; Interrupt and reset vector assignments
interrupt __RESET           0xFFFE      Processor reset
interrupt SWI               0xFFFC      "SWI" 
interrupt IRQ               0xFFFA      "IRQ"
interrupt PLL               0xFFF8      "PLL Module"
interrupt TIMA_CH0          0xFFF6      "TIMA Channel 0"
interrupt TIMA_CH1          0xFFF4      "TIMA Channel 1"
interrupt TIMA_CH2          0xFFF2      "TIMA Channel 2"
interrupt TIMA_CH3          0xFFF0      "TIMA Channel 3"
interrupt TIMA_CH4          0xFFEE      "TIMA Channel 4"
interrupt TIMA_CH5          0xFFEC      "TIMA Channel 5"
interrupt TIM               0xFFEA      "TIM Overflow Vector"
interrupt SPI_R             0xFFE8      "SPI Receive Vector"
interrupt SPI_T             0xFFE6      "SPI Transmit Vector"
interrupt SCI_E             0xFFE4      "SCI Error Vector"
interrupt SCI_R             0xFFE2      "SCI Receive"
interrupt SCI_T             0xFFE0      "SCI Transmit"
interrupt ADC               0xFFDE      "ADC Conversion Complete"
interrupt BDLC              0xFFDC      "BDLC Vector"


; INPUT/ OUTPUT PORTS
PTA             0x0000    Port A Data Register
PTA.PTA7          7  Port A Data Bit 7
PTA.PTA6          6  Port A Data Bit 6
PTA.PTA5          5  Port A Data Bit 5
PTA.PTA4          4  Port A Data Bit 4
PTA.PTA3          3  Port A Data Bit 3
PTA.PTA2          2  Port A Data Bit 2
PTA.PTA1          1  Port A Data Bit 1
PTA.PTA0          0  Port A Data Bit 0
PTB             0x0001    Port B Data Register
PTB.PTB7          7  Port B Data Bit 7
PTB.PTB6          6  Port B Data Bit 6
PTB.PTB5          5  Port B Data Bit 5
PTB.PTB4          4  Port B Data Bit 4
PTB.PTB3          3  Port B Data Bit 3
PTB.PTB2          2  Port B Data Bit 2
PTB.PTB1          1  Port B Data Bit 1
PTB.PTB0          0  Port B Data Bit 0
PTC             0x0002    Port C Data Register
PTC.PTC4          4  Port C Data Bit 4
PTC.PTC3          3  Port C Data Bit 3
PTC.PTC2          2  Port C Data Bit 2
PTC.PTC1          1  Port C Data Bit 1
PTC.PTC0          0  Port C Data Bit 0
PTD             0x0003    Port D Data Register
PTD.PTD6          6  Port D Data Bit 6
PTD.PTD5          5  Port D Data Bit 5
PTD.PTD4          4  Port D Data Bit 4
PTD.PTD3          3  Port D Data Bit 3
PTD.PTD2          2  Port D Data Bit 2
PTD.PTD1          1  Port D Data Bit 1
PTD.PTD0          0  Port D Data Bit 0
DDRA            0x0004    Data Direction Register A
DDRA.DDRA7        7  Data Direction Register A Bit 7
DDRA.DDRA6        6  Data Direction Register A Bit 6
DDRA.DDRA5        5  Data Direction Register A Bit 5
DDRA.DDRA4        4  Data Direction Register A Bit 4
DDRA.DDRA3        3  Data Direction Register A Bit 3
DDRA.DDRA2        2  Data Direction Register A Bit 2
DDRA.DDRA1        1  Data Direction Register A Bit 1
DDRA.DDRA0        0  Data Direction Register A Bit 0
DDRB            0x0005    Data Direction Register B
DDRB.DDRB7        7  Data Direction Register B Bit 7
DDRB.DDRB6        6  Data Direction Register B Bit 6
DDRB.DDRB5        5  Data Direction Register B Bit 5
DDRB.DDRB4        4  Data Direction Register B Bit 4
DDRB.DDRB3        3  Data Direction Register B Bit 3
DDRB.DDRB2        2  Data Direction Register B Bit 2
DDRB.DDRB1        1  Data Direction Register B Bit 1
DDRB.DDRB0        0  Data Direction Register B Bit 0
DDRC            0x0006    Data Direction Register C
DDRC.MCLKEN       7  MCLK Enable Bit
DDRC.DDRC4        4  Data Direction Register C Bit 4
DDRC.DDRC3        3  Data Direction Register C Bit 3
DDRC.DDRC2        2  Data Direction Register C Bit 2
DDRC.DDRC1        1  Data Direction Register C Bit 1
DDRC.DDRC0        0  Data Direction Register C Bit 0
DDRD            0x0007    Data Direction Register D
DDRD.DDRD6        6  Data Direction Register D Bit 6
DDRD.DDRD5        5  Data Direction Register D Bit 5
DDRD.DDRD4        4  Data Direction Register D Bit 4
DDRD.DDRD3        3  Data Direction Register D Bit 3
DDRD.DDRD2        2  Data Direction Register D Bit 2
DDRD.DDRD1        1  Data Direction Register D Bit 1
DDRD.DDRD0        0  Data Direction Register D Bit 0
PTE             0x0008    Port E Data Register
PTE.PTE7          7  Port E Data Bit 7
PTE.PTE6          6  Port E Data Bit 6
PTE.PTE5          5  Port E Data Bit 5
PTE.PTE4          4  Port E Data Bit 4
PTE.PTE3          3  Port E Data Bit 3
PTE.PTE2          2  Port E Data Bit 2
PTE.PTE1          1  Port E Data Bit 1
PTE.PTE0          0  Port E Data Bit 0
PTF             0x0009    Port F Data Register
PTF.PTF3          3  Port F Data Bit 3
PTF.PTF2          2  Port F Data Bit 2
PTF.PTF1          1  Port F Data Bit 1
PTF.PTF0          0  Port F Data Bit 0
Reserv000A	0x000A    RESERVED
Reserv000B	0x000B    RESERVED
DDRE            0x000C    Data Direction Register E
DDRE.DDRE7        7  Data Direction Register E Bit 7
DDRE.DDRE6        6  Data Direction Register E Bit 6
DDRE.DDRE5        5  Data Direction Register E Bit 5
DDRE.DDRE4        4  Data Direction Register E Bit 4
DDRE.DDRE3        3  Data Direction Register E Bit 3
DDRE.DDRE2        2  Data Direction Register E Bit 2
DDRE.DDRE1        1  Data Direction Register E Bit 1
DDRE.DDRE0        0  Data Direction Register E Bit 0
DDRF            0x000D    Data Direction Register F
DDRF.DDRF3        3  Data Direction Register F Bit 3
DDRF.DDRF2        2  Data Direction Register F Bit 2
DDRF.DDRF1        1  Data Direction Register F Bit 1
DDRF.DDRF0        0  Data Direction Register F Bit 0
Reserv000E	0x000E    RESERVED
Reserv000F	0x000F    RESERVED
SPCR            0x0010    SPI Control Register
SPCR.SPRIE        7  SPI Receiver Interrupt Enable Bit
SPCR.SPMSTR       5  SPI Master Bit
SPCR.CPOL         4  Clock Polarity Bit
SPCR.CPHA         3  Clock Phase Bit
SPCR.SPWOM        2  SPI Wired-OR Mode Bit
SPCR.SPE          1  SPI Enable Bit
SPCR.SPTIE        0  SPI Transmit Interrupt Enable Bit
SPSCR           0x0011    SPI Status and Control Register
SPSCR.SPRF        7  SPI Receiver Full Bit
SPSCR.ERRIE       6  Error Interrupt Enable Bit
SPSCR.OVRF        5  Overflow Bit
SPSCR.MODF        4  Mode Fault Bit
SPSCR.SPTE        3  SPI Transmitter Empty Bit
SPSCR.MODFEN      2  Mode Fault Enable Bit
SPSCR.SPR1        1  SPI Baud Rate Select Bits 1
SPSCR.SPR0        0  SPI Baud Rate Select Bits 0
SPDR            0x0012    SPI Data Register
SPDR.R7_T7        7  Receive/Transmit Data Bit 7
SPDR.R6_T6        6  Receive/Transmit Data Bit 6
SPDR.R5_T5        5  Receive/Transmit Data Bit 5
SPDR.R4_T4        4  Receive/Transmit Data Bit 4
SPDR.R3_T3        3  Receive/Transmit Data Bit 3
SPDR.R2_T2        2  Receive/Transmit Data Bit 2
SPDR.R1_T1        1  Receive/Transmit Data Bit 1
SPDR.R0_T0        0  Receive/Transmit Data Bit 0
SCC1            0x0013    SCI Control Register 1
SCC1.LOOPS        7  Loop Mode Select Bit
SCC1.ENSCI        6  Enable SCI Bit
SCC1.TXINV        5  Transmit Inversion Bit
SCC1.M            4  Mode (Character Length) Bit
SCC1.WAKE         3  Wakeup Condition Bit
SCC1.ILTY         2  Idle Line Type Bit
SCC1.PEN          1  Parity Enable Bit
SCC1.PTY          0  Parity Bit
SCC2            0x0014    SCI Control Register 2
SCC2.SCTIE        7  SCI Transmit Interrupt Enable Bit
SCC2.TCIE         6  Transmission Complete Interrupt Enable Bit
SCC2.SCRIE        5  SCI Receive Interrupt Enable Bit
SCC2.ILIE         4  Idle Line Interrupt Enable Bit
SCC2.TE           3  Transmitter Enable Bit
SCC2.RE           2  Receiver Enable Bit
SCC2.RWU          1  Receiver Wakeup Bit
SCC2.SBK          0  Send Break Bit
SCC3            0x0015    SCI Control Register 3
SCC3.R8           7  Received Bit 8
SCC3.T8           6  Transmitted Bit 8
SCC3.ORIE         3  Receiver Overrun Interrupt Enable Bit
SCC3.NEIE         2  Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE         1  Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE         0  Receiver Parity Error Interrupt Enable Bit
SCS1            0x0016    SCI Status Register 1
SCS1.SCTE         7  SCI Transmitter Empty Bit
SCS1.TC           6  Transmission Complete Bit
SCS1.SCRF         5  SCI Receiver Full Bit
SCS1.IDLE         4  Receiver Idle Bit
SCS1.OR           3  Receiver Overrun Bit
SCS1.NF           2  Receiver Noise Flag Bit
SCS1.FE           1  Receiver Framing Error Bit
SCS1.PE           0  Receiver Parity Error Bit
SCS2            0x0017    SCI Status Register 2
SCS2.BKF          1  Break Flag Bit
SCS2.RPF          0  Reception in Progress Flag Bit
SCDR            0x0018    SCI Data Register
SCDR.R7_T7        7  Receive/Transmit Data Bit 7
SCDR.R6_T6        6  Receive/Transmit Data Bit 6
SCDR.R5_T5        5  Receive/Transmit Data Bit 5
SCDR.R4_T4        4  Receive/Transmit Data Bit 4
SCDR.R3_T3        3  Receive/Transmit Data Bit 3
SCDR.R2_T2        2  Receive/Transmit Data Bit 2
SCDR.R1_T1        1  Receive/Transmit Data Bit 1
SCDR.R0_T0        0  Receive/Transmit Data Bit 0
SCBR            0x0019    SCI Baud Rate Register
SCBR.SCP1         5  SCI Baud Rate Prescaler Bits 1
SCBR.SCP0         4  SCI Baud Rate Prescaler Bits 0
SCBR.SCR2         2  SCI Baud Rate Select Bits 2
SCBR.SCR1         1  SCI Baud Rate Select Bits 1
SCBR.SCR0         0  SCI Baud Rate Select Bits 0
ISCR            0x001A    IRQ Status and ControlRegister
ISCR.IRQF         3  IRQ Flag Bit
ISCR.ACK1         2  IRQ Interrupt Request Acknowledge Bit
ISCR.IMASK        1  IRQ Interrupt Mask Bit
ISCR.MODE1        0  IRQ Edge/Level Select Bit
Reserv001B	0x001B    RESERVED
PCTL            0x001C    PLL Control Register
PCTL.PLLIE        7  PLL Interrupt Enable Bit
PCTL.PLLF         6  PLL Flag Bit
PCTL.PLLON        5  PLL On Bit
PCTL.BCS          4  Base Clock Select Bit
PBWC            0x001D    PLL Bandwidth Control Register
PBWC.AUTO         7  Automatic Bandwidth Control Bit
PBWC.LOCK         6  Lock Indicator Bit
PBWC.ACQ          5  Acquisition Mode Bit
PBWC.XLD          4  Crystal Loss Detect Bit
PPG             0x001E    PLL Programming Register
PPG.MUL7          7  Multiplier Select Bits 7
PPG.MUL6          6  Multiplier Select Bits 6
PPG.MUL5          5  Multiplier Select Bits 5
PPG.MUL4          4  Multiplier Select Bits 4
PPG.VRS7          3  VCO Range Select Bits 7
PPG.VRS6          2  VCO Range Select Bits 6
PPG.VRS5          1  VCO Range Select Bits 5
PPG.VRS4          0  VCO Range Select Bits 4
MOR             0x001F    Mask Option Register
MOR.LVISTOP       7  LVI Stop Mode Enable Bit
MOR.ROMSEC        6  ROM Security Bit           
MOR.LVIRST        5  LVI Reset Enable Bit      
MOR.LVIPWR        4  LVI Power Enable Bit      
MOR.SSREC         3  Short Stop Recovery Bit    
MOR.COPS          2  COP Long Timeout Bit       
MOR.STOP          1  STOP Instruction Enable Bit
MOR.COPD          0  COP Disable Bit
TSC             0x0020    Timer Status and Control Register
TSC.TOF           7  TIM Overflow Flag Bit
TSC.TOIE          6  TIM Overflow Interrupt Enable Bit
TSC.TSTOP         5  TIM Stop Bit
TSC.TRST          4  TIM Reset Bit
TSC.PS2           2  Prescaler Select Bits 2
TSC.PS1           1  Prescaler Select Bits 1
TSC.PS0           0  Prescaler Select Bits 0
Reserv0021	0x0021    RESERVED
TCNTH           0x0022    Timer Counter Register High
TCNTL           0x0023    Timer Counter Register Low
TMODH           0x0024    Timer Modulo Register High
TMODL           0x0025    Timer Modulo Register Low
TSC0            0x0026    Timer Channel 0 Status and Control Register
TSC0.CH0F         7  Channel 0 Flag Bit
TSC0.CH0IE        6  Channel 0 Interrupt Enable Bit
TSC0.MS0B         5  Mode Select Bit B
TSC0.MS0A         4  Mode Select Bit A
TSC0.ELS0B        3  Edge/Level Select Bits
TSC0.ELS0A        2  Edge/Level Select Bits
TSC0.TOV0         1  Toggle-On-Overflow Bit
TSC0.CH0MAX       0  Channel 0 Maximum Duty Cycle Bit
TCH0H           0x0027    Timer Channel 0 Register High
TCH0L           0x0028    Timer Channel 0 Register Low
TSC1            0x0029    Timer Channel 1 Status and Control Register
TSC1.CH1F         7  Channel 1 Flag Bit            
TSC1.CH1IE        6  Channel 1 Interrupt Enable Bit
TSC1.MS1A         4  Mode Select Bit A               
TSC1.ELS1B        3  Edge/Level Select Bits          
TSC1.ELS1A        2  Edge/Level Select Bits          
TSC1.TOV1         1  Toggle-On-Overflow Bit          
TSC1.CH1MAX       0  Channel 1 Maximum Duty Cycle Bit
TCH1H           0x002A    Timer Channel 1 Register High
TCH1L           0x002B    Timer Channel 1 Register Low
TSC2            0x002C    Timer Channel 2 Status and Control Register
TSC2.CH2F         7  Channel 2 Flag Bit              
TSC2.CH2IE        6  Channel 2 Interrupt Enable Bit  
TSC2.MS2B         5  Mode Select Bit B               
TSC2.MS2A         4  Mode Select Bit A               
TSC2.ELS2B        3  Edge/Level Select Bits          
TSC2.ELS2A        2  Edge/Level Select Bits          
TSC2.TOV2         1  Toggle-On-Overflow Bit          
TSC2.CH2MAX       0  Channel 2 Maximum Duty Cycle Bit
TCH2H           0x002D    Timer Channel 2 Register High
TCH2L           0x002E    Timer Channel 2 Register Low
TSC3            0x002F    Timer Channel 3 Status and Control Register
TSC3.CH3F         7  Channel 3 Flag Bit              
TSC3.CH3IE        6  Channel 3 Interrupt Enable Bit  
TSC3.MS3A         4  Mode Select Bit A               
TSC3.ELS3B        3  Edge/Level Select Bits          
TSC3.ELS3A        2  Edge/Level Select Bits          
TSC3.TOV3         1  Toggle-On-Overflow Bit          
TSC3.CH3MAX       0  Channel 3 Maximum Duty Cycle Bit
TCH3H           0x0030    Timer Channel 3 Register High
TCH3L           0x0031    Timer Channel 3 Register Low
TSC4            0x0032    Timer Channel 4 Status and Control Register
TSC4.CH4F         7  Channel 4 Flag Bit              
TSC4.CH4IE        6  Channel 4 Interrupt Enable Bit  
TSC4.MS4B         5  Mode Select Bit B               
TSC4.MS4A         4  Mode Select Bit A               
TSC4.ELS4B        3  Edge/Level Select Bits          
TSC4.ELS4A        2  Edge/Level Select Bits          
TSC4.TOV4         1  Toggle-On-Overflow Bit          
TSC4.CH4MAX       0  Channel 4 Maximum Duty Cycle Bit
TCH4H           0x0033    Timer Channel 4 Register High
TCH4L           0x0034    Timer Channel 4 Register Low
TSC5            0x0035    Timer Channel 5 Status and Control Register
TSC5.CH5F         7  Channel 5 Flag Bit              
TSC5.CH5IE        6  Channel 5 Interrupt Enable Bit  
TSC5.MS5A         4  Mode Select Bit A               
TSC5.ELS5B        3  Edge/Level Select Bits          
TSC5.ELS5A        2  Edge/Level Select Bits          
TSC5.TOV5         1  Toggle-On-Overflow Bit          
TSC5.CH5MAX       0  Channel 5 Maximum Duty Cycle Bit
TCH5H           0x0036    Timer Channel 5 Register High
TCH5L           0x0037    Timer Channel 5 Register Low
ADSCR           0x0038    Analog-to-Digital Status and Control Register
ADSCR.COCO        7  Conversions Complete Bit
ADSCR.AIEN        6  ADC Interrupt Enable Bit
ADSCR.ADCO        5  ADC Continuous Conversion Bit
ADSCR.ADCH4       4  ADC Channel Select Bits 4
ADSCR.ADCH3       3  ADC Channel Select Bits 3
ADSCR.ADCH2       2  ADC Channel Select Bits 2
ADSCR.ADCH1       1  ADC Channel Select Bits 1
ADSCR.ADCH0       0  ADC Channel Select Bits 0
ADR             0x0039    Analog-to-Digital Data Register
ADR.AD7           7
ADR.AD6           6
ADR.AD5           5
ADR.AD4           4
ADR.AD3           3
ADR.AD2           2
ADR.AD1           1
ADR.AD0           0
ADICLK          0x003A    Analog-to-Digital Input Clock Register
ADICLK.ADIV2      7  ADC Clock Prescaler Bits 2
ADICLK.ADIV1      6  ADC Clock Prescaler Bits 1
ADICLK.ADIV0      5  ADC Clock Prescaler Bits 0
ADICLK.ADICLK     4  ADC Input Clock Register Bit
BARD            0x003B    BDLC Analog and Roundtrip Delay Register
BARD.ATE          7  Analog Transceiver Enable Bit
BARD.RXPOL        6  Receive Pin Polarity Bit
BARD.BO3          3  BARD Offset Bits  3
BARD.BO2          2  BARD Offset Bits  2
BARD.BO1          1  BARD Offset Bits  1
BARD.BO0          0  BARD Offset Bits  0
BCR1            0x003C    BDLC Control Register 1
BCR1.IMSG         7  Ignore Message Bit
BCR1.CLKS         6  Clock Bit
BCR1.R1           5  Rate Select Bits 1
BCR1.R0           4  Rate Select Bits 0
BCR1.IE           1  Interrupt Enable Bit
BCR1.WCM          0  Wait Clock Mode Bit
BCR2            0x003D    BDLC Control Register
BCR2.ALOOP        7  Analog Loopback Mode Bit
BCR2.DLOOP        6  Digital Loopback Mode Bit
BCR2.RX4XE        5  Receive 4X Enable Bit
BCR2.NBFS         4  Normalization Bit Format Select Bit
BCR2.TEOD         3  Transmit End of Data Bit
BCR2.TSIFR        2  Transmit In-Frame Response Control Bits
BCR2.TMIFR1       1  Transmit In-Frame Response Control Bits 1
BCR2.TMIFR0       0  Transmit In-Frame Response Control Bits 0
BSVR            0x003E    BDLC State Vector Register
BSVR.I3           5  Interrupt Source Bit 3
BSVR.I2           4  Interrupt Source Bit 2
BSVR.I1           3  Interrupt Source Bit 1
BSVR.I0           2  Interrupt Source Bit 0
BDR             0x003F    BDLC Data Register
BDR.BD7           7
BDR.BD6           6
BDR.BD5           5
BDR.BD4           4
BDR.BD3           3
BDR.BD2           2
BDR.BD1           1
BDR.BD0           0
SBSR            0xFE00    SIM Break Status Register
SBSR.SBSW         1  SIM Break Stop/Wait Bit
SRSR            0xFE01    SIM Reset Status Register
SRSR.POR          7  Power-On Reset Bit
SRSR.PIN          6  External Reset Bit
SRSR.COP          5  Computer Operating Properly Reset Bit
SRSR.ILOP         4  Illegal Opcode Reset Bit
SRSR.ILAD         3  Illegal Address Reset Bit (opcode fetches only)
SRSR.LVI          1  Low-Voltage Inhibit Reset Bit
SBFCR           0xFE03    SIM Break Flag Control Register
SBFCR.BCFE        7  Break Clear Flag Enable Bit
ReservFE07	0xFE07    RESERVED
BRKH            0xFE0C    Break Address Register High
BRKL            0xFE0D    Break Address Register Low
BRKSCR          0xFE0E    Break Status and Control Register
BRKSCR.BRKE       7  Break Enable Bit
BRKSCR.BRKA       6  Break Active Bit
LVISR           0xFE0F    LVI Status Register
LVISR.LVIOUT      7  LVI Output Bit
EENVR           0xFE1C    EEPROM Non-Volatile Register
EENVR.EERA        7  EEPROM Redundant Array Bit    
EENVR.EEBP3       3  EEPROM Block Protection Bits 3
EENVR.EEBP2       2  EEPROM Block Protection Bits 2
EENVR.EEBP1       1  EEPROM Block Protection Bits 1
EENVR.EEBP0       0  EEPROM Block Protection Bits 0
EECR            0xFE1D    EEPROM Control Register
EECR.EEBCLK       7  EEPROM Bus Clock Enable Bit    
EECR.EEOFF        5  EEPROM Power Down Bit          
EECR.EERAS1       4  EEPROM Erase Bits 1            
EECR.EERAS0       3  EEPROM Erase Bits 0            
EECR.EELAT        2  EEPROM Latch Control Bit       
EECR.EEPGM        0  EEPROM Program/Erase Enable Bit
ReservFE1E	0xFE1E    RESERVED
EEACR           0xFE1F    EEPROM Array Control Register
EEACR.EERA        7  EEPROM Redundant Array Bit    
EEACR.EEBP3       3  EEPROM Block Protection Bits 3
EEACR.EEBP2       2  EEPROM Block Protection Bits 2
EEACR.EEBP1       1  EEPROM Block Protection Bits 1
EEACR.EEBP0       0  EEPROM Block Protection Bits 0
COPCTL          0xFFFF    COP Control Register


.68HC08AZ32
; MC68HC08AZ32/D  http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=68HC08AZ32&nodeId=01M98634
; MC68HC08AZ32.pdf

; RAM=1K
; ROM=32272
; EPROM=0
; EEPROM=512 


; MEMORY MAP
area DATA FSR		   0x0000:0x0050
area DATA RAM		   0x0050:0x0450
area BSS  UNIMPLEMENTED	   0x0450:0x0500
area DATA CAN_CONTROL	   0x0500:0x0580
area BSS  UNIMPLEMENTED	   0x0580:0x0800
area DATA EEPROM	   0x0800:0x0A00
area BSS  UNIMPLEMENTED	   0x0A00:0x8000
area DATA ROM_1		   0x8000:0xC000
area DATA ROM_2		   0xC000:0xFE00
area DATA FSR_1		   0xFE00:0xFE20
area DATA MONITOR_ROM	   0xFE20:0xFF00
area BSS  UNIMPLEMENTED	   0xFF00:0xFFC0
area DATA ROM_3		   0xFFC0:0xFFD0
area DATA USER_VEC	   0xFFD0:0x10000


; Interrupt and reset vector assignments
interrupt __RESET           0xFFFE      Processor reset
interrupt SWI               0xFFFC      "SWI" 
interrupt IRQ               0xFFFA      "IRQ"
interrupt PLL               0xFFF8      "PLL Module"
interrupt PIT               0xFFF6      "PIT vector"
interrupt TIMA_CH0          0xFFF4      "TIMA Channel 0"
interrupt TIMA_CH1          0xFFF2      "TIMA Channel 1"
interrupt TIMA_CH2          0xFFF0      "TIMA Channel 2"
interrupt TIMA_CH3          0xFFEE      "TIMA Channel 3"
interrupt TIMA              0xFFEC      "TIMA Overflow"
interrupt TIMB_CH0          0xFFEA      "TIMB Channel 0"
interrupt TIMB_CH1          0xFFE8      "TIMB Channel 1"
interrupt TIMB              0xFFE6      "TIMB Overflow"
interrupt SPI_R             0xFFE4      "SPI Module Receive"
interrupt SPI_T             0xFFE2      "SPI Module Transmit"
interrupt CAN_W             0xFFE0      "CAN Module Wakeup"
interrupt CAN_E             0xFFDE      "CAN Module Error"
interrupt CAN_R             0xFFDC      "CAN Module Receive"
interrupt CAN_T             0xFFDA      "CAN Module Transmit"
interrupt SCI_E             0xFFD8      "SCI Module Error"
interrupt SCI_R             0xFFD6      "SCI Module Receive"
interrupt SCI_T             0xFFD4      "SCI Module Transmit"
interrupt KBRD              0xFFD2      "Keyboard"
interrupt ADC               0xFFD0      "ADC Conversion Complete"


; INPUT/ OUTPUT PORTS
PTA           0x0000     Port A Data Register
PTA.PTA7        7  Port A Data Bit 7
PTA.PTA6        6  Port A Data Bit 6
PTA.PTA5        5  Port A Data Bit 5
PTA.PTA4        4  Port A Data Bit 4
PTA.PTA3        3  Port A Data Bit 3
PTA.PTA2        2  Port A Data Bit 2
PTA.PTA1        1  Port A Data Bit 1
PTA.PTA0        0  Port A Data Bit 0
PTB           0x0001     Port B Data Register
PTB.PTB7        7  Port B Data Bit 7
PTB.PTB6        6  Port B Data Bit 6
PTB.PTB5        5  Port B Data Bit 5
PTB.PTB4        4  Port B Data Bit 4
PTB.PTB3        3  Port B Data Bit 3
PTB.PTB2        2  Port B Data Bit 2
PTB.PTB1        1  Port B Data Bit 1
PTB.PTB0        0  Port B Data Bit 0
PTC           0x0002     Port C Data Register
PTC.PTC5        5  Port C Data Bit 5
PTC.PTC4        4  Port C Data Bit 4
PTC.PTC3        3  Port C Data Bit 3
PTC.PTC2        2  Port C Data Bit 2
PTC.PTC1        1  Port C Data Bit 1
PTC.PTC0        0  Port C Data Bit 0
PTD           0x0003     Port D Data Register
PTD.PTD7        7  Port D Data Bit 7
PTD.PTD6        6  Port D Data Bit 6
PTD.PTD5        5  Port D Data Bit 5
PTD.PTD4        4  Port D Data Bit 4
PTD.PTD3        3  Port D Data Bit 3
PTD.PTD2        2  Port D Data Bit 2
PTD.PTD1        1  Port D Data Bit 1
PTD.PTD0        0  Port D Data Bit 0
DDRA          0x0004     Data Direction Register A
DDRA.DDRA7      7  Data Direction Register A Bit 7
DDRA.DDRA6      6  Data Direction Register A Bit 6
DDRA.DDRA5      5  Data Direction Register A Bit 5
DDRA.DDRA4      4  Data Direction Register A Bit 4
DDRA.DDRA3      3  Data Direction Register A Bit 3
DDRA.DDRA2      2  Data Direction Register A Bit 2
DDRA.DDRA1      1  Data Direction Register A Bit 1
DDRA.DDRA0      0  Data Direction Register A Bit 0
DDRB          0x0005     Data Direction RegisterB
DDRB.DDRB7      7  Data Direction Register B Bit 7
DDRB.DDRB6      6  Data Direction Register B Bit 6
DDRB.DDRB5      5  Data Direction Register B Bit 5
DDRB.DDRB4      4  Data Direction Register B Bit 4
DDRB.DDRB3      3  Data Direction Register B Bit 3
DDRB.DDRB2      2  Data Direction Register B Bit 2
DDRB.DDRB1      1  Data Direction Register B Bit 1
DDRB.DDRB0      0  Data Direction Register B Bit 0
DDRC          0x0006     Data Direction Register C
DDRC.MCLKEN     7  MCLK enable bit
DDRC.DDRC5      5  Data Direction Register C Bit 5
DDRC.DDRC4      4  Data Direction Register C Bit 4
DDRC.DDRC3      3  Data Direction Register C Bit 3
DDRC.DDRC2      2  Data Direction Register C Bit 2
DDRC.DDRC1      1  Data Direction Register C Bit 1
DDRC.DDRC0      0  Data Direction Register C Bit 0
DDRD          0x0007     Data Direction Register D
DDRD.DDRD7      7  Data Direction Register D Bit 7
DDRD.DDRD6      6  Data Direction Register D Bit 6
DDRD.DDRD5      5  Data Direction Register D Bit 5
DDRD.DDRD4      4  Data Direction Register D Bit 4
DDRD.DDRD3      3  Data Direction Register D Bit 3
DDRD.DDRD2      2  Data Direction Register D Bit 2
DDRD.DDRD1      1  Data Direction Register D Bit 1
DDRD.DDRD0      0  Data Direction Register D Bit 0
PTE           0x0008     Port E Data Register
PTE.PTE7        7  Port E Data Bit 7
PTE.PTE6        6  Port E Data Bit 6
PTE.PTE5        5  Port E Data Bit 5
PTE.PTE4        4  Port E Data Bit 4
PTE.PTE3        3  Port E Data Bit 3
PTE.PTE2        2  Port E Data Bit 2
PTE.PTE1        1  Port E Data Bit 1
PTE.PTE0        0  Port E Data Bit 0
PTF           0x0009     Port F Data Register
PTF.PTF6        6  Port F Data Bit 6
PTF.PTF5        5  Port F Data Bit 5
PTF.PTF4        4  Port F Data Bit 4
PTF.PTF3        3  Port F Data Bit 3
PTF.PTF2        2  Port F Data Bit 2
PTF.PTF1        1  Port F Data Bit 1
PTF.PTF0        0  Port F Data Bit 0
PTG           0x000A     Port G Data Register
PTG.PTG2        2  Port G Data Bit 2
PTG.PTG1        1  Port G Data Bit 1
PTG.PTG0        0  Port G Data Bit 0
PTH           0x000B     Port H Data Register
PTH.PTH1        1  Port H Data Bit 1
PTH.PTH0        0  Port H Data Bit 0
DDRE          0x000C     Data Direction Register E
DDRE.DDRE7      7  Data Direction Register E Bit 7
DDRE.DDRE6      6  Data Direction Register E Bit 6
DDRE.DDRE5      5  Data Direction Register E Bit 5
DDRE.DDRE4      4  Data Direction Register E Bit 4
DDRE.DDRE3      3  Data Direction Register E Bit 3
DDRE.DDRE2      2  Data Direction Register E Bit 2
DDRE.DDRE1      1  Data Direction Register E Bit 1
DDRE.DDRE0      0  Data Direction Register E Bit 0
DDRF          0x000D     Data Direction Register F
DDRF.DDRF6      6  Data Direction Register F Bit 6
DDRF.DDRF5      5  Data Direction Register F Bit 5
DDRF.DDRF4      4  Data Direction Register F Bit 4
DDRF.DDRF3      3  Data Direction Register F Bit 3
DDRF.DDRF2      2  Data Direction Register F Bit 2
DDRF.DDRF1      1  Data Direction Register F Bit 1
DDRF.DDRF0      0  Data Direction Register F Bit 0
DDRG          0x000E     Data Direction Register G
DDRG.DDRG2      2  Data Direction Register G Bit 2
DDRG.DDRG1      1  Data Direction Register G Bit 1
DDRG.DDRG0      0  Data Direction Register G Bit 0
DDRH          0x000F     Data Direction Register
DDRH.DDRH1      1  Data Direction Register H Bit 1
DDRH.DDRH0      0  Data Direction Register H Bit 0
SPCR          0x0010     SPI Control Register
SPCR.SPRIE      7  SPI receiver interrupt enable
SPCR.SPMSTR     5  SPI master
SPCR.CPOL       4  Clock polarity
SPCR.CPHA       3  Clock phase
SPCR.SPWOM      2  SPI wired-OR mode
SPCR.SPE        1  SPI enable
SPCR.SPTIE      0  SPI transmit interrupt enable
SPSCR         0x0011     SPI Status and Control Register
SPSCR.SPRF      7  SPI receiver full
SPSCR.OVRF      5  Overflow flag
SPSCR.MODF      4  Mode fault
SPSCR.SPTE      3  SPI transmitter empty
SPSCR.SPR1      1  SPI baud rate select 1
SPSCR.SPR0      0  SPI baud rate select 0
SPDR          0x0012     SPI Data Register
SCC1          0x0013     SCI Control Register 1
SCC1.LOOPS      7  Loop mode select bit
SCC1.ENSCI      6  Enable SCI bit
SCC1.TXINV      5  Transmit inversion bit
SCC1.M          4  Mode (character length) bit
SCC1.WAKE       3  wake-up condition bit
SCC1.ILTY       2  Idle line type bit
SCC1.PEN        1  Parity enable bit
SCC1.PTY        0  Parity bit
SCC2          0x0014     SCI Control Register 2
SCC2.SCTIE      7  SCI transmit interrupt enable bit
SCC2.TCIE       6  Transmission complete interrupt enable bit
SCC2.SCRIE      5  SCI receive interrupt enable bit
SCC2.ILIE       4  Idle line interrupt enable bit
SCC2.TE         3  Transmitter enable bit
SCC2.RE         2  Receiver enable bit
SCC2.RWU        1  Receiver wake-up bit
SCC2.SBK        0  Send break bit
SCC3          0x0015     SCI Control Register 3
SCC3.R8         7  Received bit 8
SCC3.T8         6  Transmitted bit 8
SCC3.ORIE       3  Receiver overrun interrupt enable bit
SCC3.NEIE       2  Receiver noise error interrupt enable bit
SCC3.FEIE       1  Receiver framing error interrupt enable bit
SCC3.PEIE       0  Receiver parity error interrupt enable bit
SCS1          0x0016     SCI Status Register 1
SCS1.SCTE       7  SCI transmitter empty bit
SCS1.TC         6  Transmission complete bit
SCS1.SCRF       5  SCI receiver full bit
SCS1.IDLE       4  Receiver idle bit
SCS1.OR         3  Receiver overrun bit
SCS1.NF         2  Receiver noise flag bit
SCS1.FE         1  Receiver framing error bit
SCS1.PE         0  Receiver parity error bit
SCS2          0x0017     SCI Status Register 2
SCS2.BKF        1  Break flag bit
SCS2.RPF        0  Reception in progress flag bit
SCDR          0x0018     SCI Data Register
SCBR          0x0019     SCI Baud Rate Register
SCBR.SCP1       5  SCI Baud Rate Prescaler Bits 1
SCBR.SCP0       4  SCI Baud Rate Prescaler Bits 0
SCBR.SCR2       2  SCI baud rate select bits 2
SCBR.SCR1       1  SCI baud rate select bits 1
SCBR.SCR0       0  SCI baud rate select bits 0
ISCR          0x001A     IRQ Status and Control Register
ISCR.IRQF       3  IRQ flag
ISCR.ACK1       2  IRQ interrupt request acknowledge bit
ISCR.IMASK1     1  IRQ Interrupt mask bit
ISCR.MODE1      0  IRQ edge/level select bit
KBSCR         0x001B     Keyboard Status_Control
KBSCR.KEYF      3  Keyboard flag bit
KBSCR.ACKK      2  Keyboard acknowledge bit
KBSCR.IMASKK    1  Keyboard interrupt mask bit
KBSCR.MODEK     0  Keyboard triggering sensitivity bit
PCTL          0x001C     PLL Control Register
PCTL.PLLIE      7  PLL interrupt enable bit
PCTL.PLLF       6  PLL interrupt flag bit
PCTL.PLLON      5  PLL on bit
PCTL.BCS        4  Base clock select bit
PBWC          0x001D     PLL Bandwidth Control Register
PBWC.AUTO       7  Automatic bandwidth control bit
PBWC.LOCK       6  Lock indicator bit
PBWC.ACQ        5  Acquisition mode bit
PBWC.XLD        4  Crystal loss detect bit
PPG           0x001E     PLL Programming Register
PPG.MUL7        7  Multiplier select bits 7
PPG.MUL6        6  Multiplier select bits 6
PPG.MUL5        5  Multiplier select bits 5
PPG.MUL4        4  Multiplier select bits 4
PPG.VRS7        3  VCO range select bits 7
PPG.VRS6        2  VCO range select bits 6
PPG.VRS5        1  VCO range select bits 5
PPG.VRS4        0  VCO range select bits 4
MORA          0x001F     Mask Option Register A
MORA.LVISTOP    7  LVI Stop Mode Enable Bit
MORA.ROMSEC     6  ROM security bit
MORA.LVIRSTD    5  LVI reset disable bit
MORA.LVIPWRD    4  LVI power disable bit
MORA.SSREC      3  Short stop recovery bit
MORA.COPRS      2  COP rate select
MORA.STOP       1  STOP enable bit
MORA.COPD       0  COP disable bit
TASC          0x0020     Timer A Status and Control Register
TASC.TOF        7  TIMA Overflow Flag Bit
TASC.TOIE       6  TIMA Overflow Interrupt Enable Bit
TASC.TSTOP      5  TIMA Stop Bit
TASC.TRST       4  TIMA Reset Bit
TASC.PS2        2  Prescaler Select Bits 2
TASC.PS1        1  Prescaler Select Bits 1
TASC.PS0        0  Prescaler Select Bits 0
KBIER         0x0021     Keyboard Interrupt Enable Register
KBIER.KBIE4     4  Keyboard interrupt enable bits 4
KBIER.KBIE3     3  Keyboard interrupt enable bits 3
KBIER.KBIE2     2  Keyboard interrupt enable bits 2
KBIER.KBIE1     1  Keyboard interrupt enable bits 1
KBIER.KBIE0     0  Keyboard interrupt enable bits 0
TACNTH        0x0022     Timer A Counter Register High
TACNTL        0x0023     Timer A Counter Register Low
TAMODH        0x0024     TimerA Modulo Register High
TAMODL        0x0025     TimerA Modulo Register Low
TASC0         0x0026     Timer A Channel 0 Status and Control Register
TASC0.CH0F      7  Channel 0 Flag Bit
TASC0.CH0IE     6  Channel 0 Interrupt Enable Bit
TASC0.MS0B      5  Mode Select Bit B
TASC0.MS0A      4  Mode Select Bit A
TASC0.ELS0B     3  Edge/Level Select Bits
TASC0.ELS0A     2  Edge/Level Select Bits
TASC0.TOV0      1  Toggle-On-Overflow Bit
TASC0.CH0MAX    0  Channel 0 Maximum Duty Cycle Bit
TACH0H        0x0027     TimerA Channel 0 Register High
TACH0L        0x0028     Timer A Channel 0 Register Low
TASC1         0x0029     Timer A Channel 1 Status and Control Register
TASC1.CH1F      7  Channel 1 Flag Bit            
TASC1.CH1IE     6  Channel 1 Interrupt Enable Bit
TASC1.MS1A      4  Mode Select Bit A               
TASC1.ELS1B     3  Edge/Level Select Bits          
TASC1.ELS1A     2  Edge/Level Select Bits          
TASC1.TOV1      1  Toggle-On-Overflow Bit          
TASC1.CH1MAX    0  Channel 1 Maximum Duty Cycle Bit
TACH1H        0x002A     Timer A Channel 1 Register High
TACH1L        0x002B     Timer A Channel 1 Register Low
TASC2         0x002C     Timer A Channel 2 Status and Control Register
TASC2.CH2F      7  Channel 2 Flag Bit              
TASC2.CH2IE     6  Channel 2 Interrupt Enable Bit  
TASC2.MS2B      5  Mode Select Bit B               
TASC2.MS2A      4  Mode Select Bit A               
TASC2.ELS2B     3  Edge/Level Select Bits          
TASC2.ELS2A     2  Edge/Level Select Bits          
TASC2.TOV2      1  Toggle-On-Overflow Bit          
TASC2.CH2MAX    0  Channel 2 Maximum Duty Cycle Bit
TACH2H        0x002D     Timer A Channel 2 Register High
TACH2L        0x002E     Timer A Channel 2 Register Low
TASC3         0x002F     Timer Channel 3 Status and Control Register
TASC3.CH3F      7  Channel 3 Flag Bit              
TASC3.CH3IE     6  Channel 3 Interrupt Enable Bit  
TASC3.MS3A      4  Mode Select Bit A               
TASC3.ELS3B     3  Edge/Level Select Bits          
TASC3.ELS3A     2  Edge/Level Select Bits          
TASC3.TOV3      1  Toggle-On-Overflow Bit          
TASC3.CH3MAX    0  Channel 3 Maximum Duty Cycle Bit
TACH3H        0x0030     Timer Channel 3 Register High
TACH3L        0x0031     Timer Channel 3 Register Low
UNUSED0032    0x0032     UNUSED
UNUSED0033    0x0033     UNUSED
UNUSED0034    0x0034     UNUSED
UNUSED0035    0x0035     UNUSED
UNUSED0036    0x0036     UNUSED
UNUSED0037    0x0037     UNUSED
ADSCR         0x0038     ADC status and control register
ADSCR.COCO      7  Conversions complete
ADSCR.AIEN      6  ADC interrupt enable
ADSCR.ADCO      5  ADC continuous conversion
ADSCR.CH4       4  ADC channel select bits 4
ADSCR.CH3       3  ADC channel select bits 3
ADSCR.CH2       2  ADC channel select bits 2
ADSCR.CH1       1  ADC channel select bits 1
ADSCR.CH0       0  ADC channel select bits 0
ADR           0x0039     ADC data register
ADR.AD7         7
ADR.AD6         6
ADR.AD5         5
ADR.AD4         4
ADR.AD3         3
ADR.AD2         2
ADR.AD1         1
ADR.AD0         0
ADCLKR        0x003A     ADC Input Clock Select
ADCLKR.ADIV2    7  ADC clock prescaler bits 2
ADCLKR.ADIV1    6  ADC clock prescaler bits 1
ADCLKR.ADIV0    5  ADC clock prescaler bits 0
ADCLKR.ADICLK   4  ADC input clock select
Reserv003B    0x003B     RESERVED
Reserv003C    0x003C     RESERVED
UNUSED003D    0x003D     UNUSED
UNUSED003E    0x003E     UNUSED
MORB          0x003F     Mask Option Register B
MORB.EESEC      5  EEPROM security enable bit
TBSC          0x0040     TimerB Status and Control Register
TBSC.TOF        7  TIMB overflow flag bit
TBSC.TOIE       6  TIMB overflow interrupt enable bit
TBSC.TSTOP      5  TIMB stop bit
TBSC.TRST       4  TIMB reset bit
TBSC.PS2        2  Prescaler select bits 2
TBSC.PS1        1  Prescaler select bits 1
TBSC.PS0        0  Prescaler select bits 0
TBCNTH        0x0041     TimerB Counter Register High
TBCNTL        0x0042     TimerB Counter Register Low
TBMODH        0x0043     TimerB Modulo Register High
TBMODL        0x0044     TimerB Modulo Register Low
TBSC0         0x0045     Timer B Channel 0Status and Control Register
TBSC0.CH4F      7  Channel x flag bit
TBSC0.CH4IE     6  Channel x interrupt enable bit
TBSC0.MS4B      5  Mode select bit B
TBSC0.MS4A      4  Mode select bit A
TBSC0.ELS4B     3  Edge/level select bits
TBSC0.ELS4A     2  Edge/level select bits
TBSC0.TOV4      1  Toggle-on-overflow bit
TBSC0.CH0MAX    0  Channel x maximum duty cycle bit
TBCH0H        0x0046     Timer B Channel 0Register High
TBCH0L        0x0047     Timer B Channel 0Register Low
TBSC1         0x0048     Timer B Channel 1Status_Control Register
TBSC1.CH5F      7  Channel x flag bit              
TBSC1.CH5IE     6  Channel x interrupt enable bit  
TBSC1.MS5A      4  Mode select bit A               
TBSC1.ELS5B     3  Edge/level select bits          
TBSC1.ELS5A     2  Edge/level select bits          
TBSC1.TOV5      1  Toggle-on-overflow bit          
TBSC1.CH1MAX    0  Channel x maximum duty cycle bit
TBCH1H        0x0049     Timer B Channel 1Register High
TBCH1L        0x004A     Timer B Channel1Register Low
PSC           0x004B     Programmable Interrupt Timer Status & Control Register
PSC.POF         7  PIT overflow flag bit
PSC.PIE         6  PIT overflow interrupt enable bit
PSC.PSTOP       5  PIT STOP bit
PSC.PRST        4  PIT reset bit
PSC.PPS2        2  Prescaler select bits 2
PSC.PPS1        1  Prescaler select bits 1
PSC.PPS0        0  Prescaler select bits 0
PCNTH         0x004C     PIT Counter Register HIGH
PCNTL         0x004D     PIT Counter Register Low
PMODH         0x004E     PIT Modulo Register High
PMODL         0x004F     PIT Modulo Register Low
SBSR          0xFE00     SIM Break Status Register
SBSR.SBSW       1  SIM Break STOP/WAIT
SRSR          0xFE01     SIM Reset Status Register
SRSR.POR        7  Power-on reset bit
SRSR.PIN        6  External reset bit
SRSR.COP        5  Computer operating properly reset bit
SRSR.ILOP       4  Illegal opcode reset bit
SRSR.ILAD       3  Illegal address reset bit (opcode fetches only)
SRSR.LVI        1  Low-voltage inhibit reset bit
SBFCR         0xFE03     SIM Break Flag Control Register
SBFCR.BCFE      7  break clear flag enable bit
ReservFE07    0xFE07     RESERVED
BRKH          0xFE0C     Break Address Register High
BRKL          0xFE0D     Break Address Register Low
BRKSCR        0xFE0E     Break Status and Control Register
BRKSCR.BRKE     7  Break enable bit
BRKSCR.BRKA     6  Break active bit
LVISR         0xFE0F     LVI Status Register
LVISR.LVIOUT    7  LVI Output Bit
EENVR         0xFE1C     EEPROM non-volatile register
EENVR.EERA      7  EEPROM redundant array
EENVR.CON2      6  MCU configuration bits 2
EENVR.CON1      5  MCU configuration bits 1
EENVR.CON0      4  MCU configuration bits 0
EENVR.EEPB3     3  EEPROM block protection bits 3
EENVR.EEPB2     2  EEPROM block protection bits 2
EENVR.EEPB1     1  EEPROM block protection bits 1
EENVR.EEPB0     0  EEPROM block protection bits 0
EECR          0xFE1D     EEPROM control register
EECR.EEBCLK     7  EEPROM BUS CLOCK ENABLE
EECR.EEOFF      5  EEPROM power down
EECR.EERAS1     4  Erase bits 1
EECR.EERAS0     3  Erase bits 0
EECR.ELAT       2  EEPROM latch control
EECR.EEPGM      0  EEPROM program/erase enable
ReservFE1E    0xFE1E     RESERVED
EEACR         0xFE1F     EEPROM array control register
EEACR.EERA      7  EEPROM redundant array
EEACR.CON2      6  MCU configuration bit 2
EEACR.CON1      5  MCU configuration bit 1
EEACR.CON0      4  MCU configuration bit 0
EEACR.EEBP3     3  EEPROM block protection bit 3
EEACR.EEBP2     2  EEPROM block protection bit 2
EEACR.EEBP1     1  EEPROM block protection bit 1
EEACR.EEBP0     0  EEPROM block protection bit 0
COPCTL        0xFFFF     COP Control Register


.68HC08AZ32A
; MC68HC08AZ32A/D  http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=68HC08AZ32A&nodeId=01M98634
; MC68HC08AZ32A.pdf

; RAM=1K
; ROM=32256
; EPROM=0
; EEPROM=512


; MEMORY MAP
area DATA FSR		    0x0000:0x0050
area DATA RAM		    0x0050:0x0450
area BSS  UNIMPLEMENTED	    0x0450:0x0500
area DATA CAN_CONTROL	    0x0500:0x0580
area BSS  UNIMPLEMENTED	    0x0580:0x0800
area DATA EEPROM	    0x0800:0x0A00
area BSS  UNIMPLEMENTED	    0x0A00:0x8000
area DATA ROM_1		    0x8000:0xC000
area DATA ROM_2		    0xC000:0xFE00
area DATA FSR_1		    0xFE00:0xFE20
area DATA MONITOR_ROM	    0xFE20:0xFF60
area BSS  UNIMPLEMENTED	    0xFF60:0xFFC0
area BSS  RESERVED	    0xFFC0:0xFFCC
area DATA USER_VEC	    0xFFCC:0x10000


; Interrupt and reset vector assignments
interrupt __RESET           0xFFFE      Processor reset
interrupt SWI               0xFFFC      "SWI" 
interrupt IRQ               0xFFFA      "IRQ"
interrupt PLL               0xFFF8      "PLL Module"
interrupt PIT               0xFFF6      "PIT"
interrupt TIMA_CH0          0xFFF4      "TIMA Channel 0"
interrupt TIMA_CH1          0xFFF2      "TIMA Channel 1"
interrupt TIMA_CH2          0xFFF0      "TIMA Channel 2"
interrupt TIMA_CH3          0xFFEE      "TIMA Channel 3"
interrupt TIMA              0xFFEC      "TIMA Overflow"
interrupt TIMB_CH0          0xFFEA      "TIMB Channel 0"
interrupt TIMB_CH1          0xFFE8      "TIMB Channel 1"
interrupt TIMB              0xFFE6      "TIMB Overflow"
interrupt SPI_R             0xFFE4      "SPI Module Receive"
interrupt SPI_T             0xFFE2      "SPI Module Transmit"
interrupt CAN_W             0xFFE0      "CAN Module Wakeup"
interrupt CAN_E             0xFFDE      "CAN Module Error"
interrupt CAN_R             0xFFDC      "CAN Module Receive"
interrupt CAN_T             0xFFDA      "CAN Module Transmit"
interrupt SCI_E             0xFFD8      "SCI Module Error"
interrupt SCI_R             0xFFD6      "SCI Module Receive"
interrupt SCI_T             0xFFD4      "SCI Module Transmit"
interrupt KBRD              0xFFD2      "Keyboard"
interrupt ADC               0xFFD0      "ADC Conversion Complete"
interrupt TIMA4             0xFFCE      "TIMA Channel 4"
interrupt TIMA5             0xFFCC      "TIMA Channel 5"


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bit 7
PTA.PTA6               6   Port A Data Bit 6
PTA.PTA5               5   Port A Data Bit 5
PTA.PTA4               4   Port A Data Bit 4
PTA.PTA3               3   Port A Data Bit 3
PTA.PTA2               2   Port A Data Bit 2
PTA.PTA1               1   Port A Data Bit 1
PTA.PTA0               0   Port A Data Bit 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bit 7
PTB.PTB6               6   Port B Data Bit 6
PTB.PTB5               5   Port B Data Bit 5
PTB.PTB4               4   Port B Data Bit 4
PTB.PTB3               3   Port B Data Bit 3
PTB.PTB2               2   Port B Data Bit 2
PTB.PTB1               1   Port B Data Bit 1
PTB.PTB0               0   Port B Data Bit 0
PTC                   0x0002     Port C Data Register
PTC.PTC5               5   Port C Data Bit 5
PTC.PTC4               4   Port C Data Bit 4
PTC.PTC3               3   Port C Data Bit 3
PTC.PTC2               2   Port C Data Bit 2
PTC.PTC1               1   Port C Data Bit 1
PTC.PTC0               0   Port C Data Bit 0
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bit 7
PTD.PTD6               6   Port D Data Bit 6
PTD.PTD5               5   Port D Data Bit 5
PTD.PTD4               4   Port D Data Bit 4
PTD.PTD3               3   Port D Data Bit 3
PTD.PTD2               2   Port D Data Bit 2
PTD.PTD1               1   Port D Data Bit 1
PTD.PTD0               0   Port D Data Bit 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bit 7
DDRA.DDRA6             6   Data Direction Register A Bit 6
DDRA.DDRA5             5   Data Direction Register A Bit 5
DDRA.DDRA4             4   Data Direction Register A Bit 4
DDRA.DDRA3             3   Data Direction Register A Bit 3
DDRA.DDRA2             2   Data Direction Register A Bit 2
DDRA.DDRA1             1   Data Direction Register A Bit 1
DDRA.DDRA0             0   Data Direction Register A Bit 0
DDRB                  0x0005     Data Direction RegisterB
DDRB.DDRB7             7   Data Direction Register B Bit 7
DDRB.DDRB6             6   Data Direction Register B Bit 6
DDRB.DDRB5             5   Data Direction Register B Bit 5
DDRB.DDRB4             4   Data Direction Register B Bit 4
DDRB.DDRB3             3   Data Direction Register B Bit 3
DDRB.DDRB2             2   Data Direction Register B Bit 2
DDRB.DDRB1             1   Data Direction Register B Bit 1
DDRB.DDRB0             0   Data Direction Register B Bit 0
DDRC                  0x0006     Data Direction Register C
DDRC.MCLKEN            7   MCLK enable bit
DDRC.DDRC5             5   Data Direction Register C Bit 5
DDRC.DDRC4             4   Data Direction Register C Bit 4
DDRC.DDRC3             3   Data Direction Register C Bit 3
DDRC.DDRC2             2   Data Direction Register C Bit 2
DDRC.DDRC1             1   Data Direction Register C Bit 1
DDRC.DDRC0             0   Data Direction Register C Bit 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bit 7
DDRD.DDRD6             6   Data Direction Register D Bit 6
DDRD.DDRD5             5   Data Direction Register D Bit 5
DDRD.DDRD4             4   Data Direction Register D Bit 4
DDRD.DDRD3             3   Data Direction Register D Bit 3
DDRD.DDRD2             2   Data Direction Register D Bit 2
DDRD.DDRD1             1   Data Direction Register D Bit 1
DDRD.DDRD0             0   Data Direction Register D Bit 0
PTE                   0x0008     Port E Data Register
PTE.PTE7               7   Port E Data Bit 7
PTE.PTE6               6   Port E Data Bit 6
PTE.PTE5               5   Port E Data Bit 5
PTE.PTE4               4   Port E Data Bit 4
PTE.PTE3               3   Port E Data Bit 3
PTE.PTE2               2   Port E Data Bit 2
PTE.PTE1               1   Port E Data Bit 1
PTE.PTE0               0   Port E Data Bit 0
PTF                   0x0009     Port F Data Register
PTF.PTF6               6   Port F Data Bit 6
PTF.PTF5               5   Port F Data Bit 5
PTF.PTF4               4   Port F Data Bit 4
PTF.PTF3               3   Port F Data Bit 3
PTF.PTF2               2   Port F Data Bit 2
PTF.PTF1               1   Port F Data Bit 1
PTF.PTF0               0   Port F Data Bit 0
PTG                   0x000A     Port G Data Register
PTG.PTG2               2   Port G Data Bit 2
PTG.PTG1               1   Port G Data Bit 1
PTG.PTG0               0   Port G Data Bit 0
PTH                   0x000B     Port H Data Register
PTH.PTH1               1   Port H Data Bit 1
PTH.PTH0               0   Port H Data Bit 0
DDRE                  0x000C     Data Direction Register E
DDRE.DDRE7             7   Data Direction Register E Bit 7
DDRE.DDRE6             6   Data Direction Register E Bit 6
DDRE.DDRE5             5   Data Direction Register E Bit 5
DDRE.DDRE4             4   Data Direction Register E Bit 4
DDRE.DDRE3             3   Data Direction Register E Bit 3
DDRE.DDRE2             2   Data Direction Register E Bit 2
DDRE.DDRE1             1   Data Direction Register E Bit 1
DDRE.DDRE0             0   Data Direction Register E Bit 0
DDRF                  0x000D     Data Direction Register F
DDRF.DDRF6             6   Data Direction Register F Bit 6
DDRF.DDRF5             5   Data Direction Register F Bit 5
DDRF.DDRF4             4   Data Direction Register F Bit 4
DDRF.DDRF3             3   Data Direction Register F Bit 3
DDRF.DDRF2             2   Data Direction Register F Bit 2
DDRF.DDRF1             1   Data Direction Register F Bit 1
DDRF.DDRF0             0   Data Direction Register F Bit 0
DDRG                  0x000E     Data Direction Register G
DDRG.DDRG2             2   Data Direction Register G Bit 2
DDRG.DDRG1             1   Data Direction Register G Bit 1
DDRG.DDRG0             0   Data Direction Register G Bit 0
DDRH                  0x000F     Data Direction Register H
DDRH.DDRH1             1   Data Direction Register H Bit 1
DDRH.DDRH0             0   Data Direction Register H Bit 0
SPCR                  0x0010     SPI Control Register
SPCR.SPRIE             7   SPI receiver interrupt enable
SPCR.SPMSTR            5   SPI master
SPCR.CPOL              4   Clock polarity
SPCR.CPHA              3   Clock phase
SPCR.SPWOM             2   SPI wired-OR mode
SPCR.SPE               1   SPI enable
SPCR.SPTIE             0   SPI transmit interrupt enable
SPSCR                 0x0011     SPI Status and Control Register
SPSCR.SPRF             7   SPI receiver full
SPSCR.OVRF             5   Overflow flag
SPSCR.MODF             4   Mode fault
SPSCR.SPTE             3   SPI transmitter empty
SPSCR.SPR1             1   SPI baud rate select 1
SPSCR.SPR0             0   SPI baud rate select 0
SPDR                  0x0012     SPI Data Register
SCC1                  0x0013     SCI Control Register 1
SCC1.LOOPS             7   Loop mode select bit
SCC1.ENSCI             6   Enable SCI bit
SCC1.TXINV             5   Transmit inversion bit
SCC1.M                 4   Mode (character length) bit
SCC1.WAKE              3   wake-up condition bit
SCC1.ILTY              2   Idle line type bit
SCC1.PEN               1   Parity enable bit
SCC1.PTY               0   Parity bit
SCC2                  0x0014     SCI Control Register 2
SCC2.SCTIE             7   SCI transmit interrupt enable bit
SCC2.TCIE              6   Transmission complete interrupt enable bit
SCC2.SCRIE             5   SCI receive interrupt enable bit
SCC2.ILIE              4   Idle line interrupt enable bit
SCC2.TE                3   Transmitter enable bit
SCC2.RE                2   Receiver enable bit
SCC2.RWU               1   Receiver wake-up bit
SCC2.SBK               0   Send break bit
SCC3                  0x0015     SCI Control Register 3
SCC3.R8                7   Received bit 8
SCC3.T8                6   Transmitted bit 8
SCC3.ORIE              3   Receiver overrun interrupt enable bit
SCC3.NEIE              2   Receiver noise error interrupt enable bit
SCC3.FEIE              1   Receiver framing error interrupt enable bit
SCC3.PEIE              0   Receiver parity error interrupt enable bit
SCS1                  0x0016     SCI Status Register 1
SCS1.SCTE              7   SCI transmitter empty bit
SCS1.TC                6   Transmission complete bit
SCS1.SCRF              5   SCI receiver full bit
SCS1.IDLE              4   Receiver idle bit
SCS1.OR                3   Receiver overrun bit
SCS1.NF                2   Receiver noise flag bit
SCS1.FE                1   Receiver framing error bit
SCS1.PE                0   Receiver parity error bit
SCS2                  0x0017     SCI Status Register 2
SCS2.BKF               1   Break flag bit
SCS2.RPF               0   Reception in progress flag bit
SCDR                  0x0018     SCI Data Register
SCBR                  0x0019     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI baud rate select bits 2
SCBR.SCR1              1   SCI baud rate select bits 1
SCBR.SCR0              0   SCI baud rate select bits 0
ISCR                  0x001A     IRQ Status and Control Register
ISCR.IRQF              3   IRQ flag
ISCR.ACK               2   IRQ interrupt request acknowledge bit
ISCR.IMASK             1   IRQ Interrupt mask bit
ISCR.MODE              0   IRQ edge/level select bit
KBSCR                 0x001B     Keyboard Status_Control
KBSCR.KEYF             3   Keyboard flag bit
KBSCR.ACKK             2   Keyboard acknowledge bit
KBSCR.IMASKK           1   Keyboard interrupt mask bit
KBSCR.MODEK            0   Keyboard triggering sensitivity bit
PCTL                  0x001C     PLL Control Register
PCTL.PLLIE             7   PLL interrupt enable bit
PCTL.PLLF              6   PLL interrupt flag bit
PCTL.PLLON             5   PLL on bit
PCTL.BCS               4   Base clock select bit
PBWC                  0x001D     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic bandwidth control bit
PBWC.LOCK              6   Lock indicator bit
PBWC.ACQ               5   Acquisition mode bit
PBWC.XLD               4   Crystal loss detect bit
PPG                   0x001E     PLL Programming Register
PPG.MUL7               7   Multiplier select bits 7
PPG.MUL6               6   Multiplier select bits 6
PPG.MUL5               5   Multiplier select bits 5
PPG.MUL4               4   Multiplier select bits 4
PPG.VRS7               3   VCO range select bits 7
PPG.VRS6               2   VCO range select bits 6
PPG.VRS5               1   VCO range select bits 5
PPG.VRS4               0   VCO range select bits 4
MORA                  0x001F     Mask Option Register A
MORA.LVISTOP           7   LVI Stop Mode Enable Bit
MORA.ROMSEC            6   ROM security bit
MORA.LVIRST            5   LVI reset disable bit
MORA.LVIPWR            4   LVI power disable bit
MORA.SSREC             3   Short stop recovery bit
MORA.COPRS             2   COP rate select
MORA.STOP              1   STOP enable bit
MORA.COPD              0   COP disable bit
TASC                  0x0020     Timer A Status and Control Register
TASC.TOF               7   TIMA Overflow Flag Bit            
TASC.TOIE              6   TIMA Overflow Interrupt Enable Bit
TASC.TSTOP             5   TIMA Stop Bit                     
TASC.TRST              4   TIMA Reset Bit                    
TASC.PS2               2   Prescaler Select Bits 2           
TASC.PS1               1   Prescaler Select Bits 1           
TASC.PS0               0   Prescaler Select Bits 0           
KBIER                 0x0021     Keyboard Interrupt Enable Register
KBIER.KBIE4            4   Keyboard interrupt enable bits 4
KBIER.KBIE3            3   Keyboard interrupt enable bits 3
KBIER.KBIE2            2   Keyboard interrupt enable bits 2
KBIER.KBIE1            1   Keyboard interrupt enable bits 1
KBIER.KBIE0            0   Keyboard interrupt enable bits 0
TACNTH                0x0022     Timer A Counter Register High
TACNTL                0x0023     Timer A Counter Register Low
TAMODH                0x0024     TimerA Modulo Register High
TAMODL                0x0025     TimerA Modulo Register Low
TASC0                 0x0026     Timer A Channel 0 Status and Control Register
TASC0.CH0F             7   Channel 0 Flag Bit              
TASC0.CH0IE            6   Channel 0 Interrupt Enable Bit  
TASC0.MS0B             5   Mode Select Bit B               
TASC0.MS0A             4   Mode Select Bit A               
TASC0.ELS0B            3   Edge/Level Select Bit B         
TASC0.ELS0A            2   Edge/Level Select Bit A         
TASC0.TOV0             1   Toggle-On-Overflow Bit          
TASC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TACH0H                0x0027     TimerA Channel 0 Register High
TACH0L                0x0028     Timer A Channel 0 Register Low
TASC1                 0x0029     Timer A Channel 1 Status and Control Register
TASC1.CH1F             7   Channel 1 Flag Bit              
TASC1.CH1IE            6   Channel 1 Interrupt Enable Bit  
TASC1.MS1A             4   Mode Select Bit A               
TASC1.ELS1B            3   Edge/Level Select Bit B         
TASC1.ELS1A            2   Edge/Level Select Bit A         
TASC1.TOV1             1   Toggle-On-Overflow Bit          
TASC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TACH1H                0x002A     Timer A Channel 1 Register High
TACH1L                0x002B     Timer A Channel 1 Register Low
TASC2                 0x002C     Timer A Channel 2 Status and Control Register
TASC2.CH2F             7   Channel 2 Flag Bit              
TASC2.CH2IE            6   Channel 2 Interrupt Enable Bit  
TASC2.MS2B             5   Mode Select Bit B               
TASC2.MS2A             4   Mode Select Bit A               
TASC2.ELS2B            3   Edge/Level Select Bit B         
TASC2.ELS2A            2   Edge/Level Select Bit A         
TASC2.TOV2             1   Toggle-On-Overflow Bit          
TASC2.CH2MAX           0   Channel 2 Maximum Duty Cycle Bit
TACH2H                0x002D     Timer A Channel 2 Register High
TACH2L                0x002E     Timer A Channel 2 Register Low
TASC3                 0x002F     Timer Channel 3 Status and Control Register
TASC3.CH3F             7   Channel 3 Flag Bit              
TASC3.CH3IE            6   Channel 3 Interrupt Enable Bit  
TASC3.MS3B             5   Mode Select Bit B               
TASC3.MS3A             4   Mode Select Bit A               
TASC3.ELS3B            3   Edge/Level Select Bit B         
TASC3.ELS3A            2   Edge/Level Select Bit A         
TASC3.TOV3             1   Toggle-On-Overflow Bit          
TASC3.CH3MAX           0   Channel 3 Maximum Duty Cycle Bit
TACH3H                0x0030     Timer Channel 3 Register High
TACH3L                0x0031     Timer Channel 3 Register Low
TASC4                 0x0032     Timer Channel 4 Status and Control Register
TASC4.CH4F             7   Channel 4 Flag Bit              
TASC4.CH4IE            6   Channel 4 Interrupt Enable Bit  
TASC4.MS4B             5   Mode Select Bit B               
TASC4.MS4A             4   Mode Select Bit A               
TASC4.ELS4B            3   Edge/Level Select Bit B         
TASC4.ELS4A            2   Edge/Level Select Bit A         
TASC4.TOV4             1   Toggle-On-Overflow Bit          
TASC4.CH4MAX           0   Channel 4 Maximum Duty Cycle Bit
TACH4H                0x0033     Timer Channel 4 Register High
TACH4L                0x0034     Timer Channel 4 Register Low
TASC5                 0x0035     Timer Channel 5 Status and Control Register
TASC5.CH5F             7   Channel 5 Flag Bit              
TASC5.CH5IE            6   Channel 5 Interrupt Enable Bit  
TASC5.MS5B             5   Mode Select Bit B               
TASC5.MS5A             4   Mode Select Bit A               
TASC5.ELS5B            3   Edge/Level Select Bit B         
TASC5.ELS5A            2   Edge/Level Select Bit A         
TASC5.TOV5             1   Toggle-On-Overflow Bit          
TASC5.CH5MAX           0   Channel 5 Maximum Duty Cycle Bit
TACH5H                0x0036     Timer Channel 5 Register High
TACH5L                0x0037     Timer Channel 5 Register Low
ADSCR                 0x0038     ADC status and control register
ADSCR.COCO             7   Conversions complete
ADSCR.AIEN             6   ADC interrupt enable
ADSCR.ADCO             5   ADC continuous conversion
ADSCR.CH4              4   ADC channel select bits 4
ADSCR.CH3              3   ADC channel select bits 3
ADSCR.CH2              2   ADC channel select bits 2
ADSCR.CH1              1   ADC channel select bits 1
ADSCR.CH0              0   ADC channel select bits 0
ADR                   0x0039     ADC data register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADCLKR                0x003A     ADC Input Clock Select
ADCLKR.ADIV2           7   ADC clock prescaler bits 2
ADCLKR.ADIV1           6   ADC clock prescaler bits 1
ADCLKR.ADIV0           5   ADC clock prescaler bits 0
ADCLKR.ADICLK          4   ADC input clock select
UNUSED003B            0x003B     UNUSED
UNUSED003C            0x003C     UNUSED
UNUSED003D            0x003D     UNUSED
UNUSED003E            0x003E     UNUSED
UNUSED003F            0x003F     UNUSED
TBSC                  0x0040     TimerB Status and Control Register
TBSC.TOF               7   TIMB overflow flag bit
TBSC.TOIE              6   TIMB overflow interrupt enable bit
TBSC.TSTOP             5   TIMB stop bit
TBSC.TRST              4   TIMB reset bit
TBSC.PS2               2   Prescaler select bits 2
TBSC.PS1               1   Prescaler select bits 1
TBSC.PS0               0   Prescaler select bits 0
TBCNTH                0x0041     TimerB Counter Register High
TBCNTL                0x0042     TimerB Counter Register Low
TBMODH                0x0043     TimerB Modulo Register High
TBMODL                0x0044     TimerB Modulo Register Low
TBSC0                 0x0045     Timer B Channel 0Status and Control Register
TBSC0.CH0F             7   Channel 0 flag bit
TBSC0.CH0IE            6   Channel 0 interrupt enable bit
TBSC0.MS0B             5   Mode select bit B
TBSC0.MS0A             4   Mode select bit A
TBSC0.ELS0B            3   Edge/level select bits
TBSC0.ELS0A            2   Edge/level select bits
TBSC0.TOV0             1   Toggle-on-overflow bit
TBSC0.CH0MAX           0   Channel 0 maximum duty cycle bit
TBCH0H                0x0046     Timer B Channel 0Register High
TBCH0L                0x0047     Timer B Channel 0Register Low
TBSC1                 0x0048     Timer B Channel 1Status_Control Register
TBSC1.CH1F             7   Channel 1 flag bit              
TBSC1.CH1IE            6   Channel 1 interrupt enable bit  
TBSC1.MS1A             4   Mode select bit A               
TBSC1.ELS1B            3   Edge/level select bits          
TBSC1.ELS1A            2   Edge/level select bits          
TBSC1.TOV1             1   Toggle-on-overflow bit          
TBSC1.CH1MAX           0   Channel 1 maximum duty cycle bit
TBCH1H                0x0049     Timer B Channel 1Register High
TBCH1L                0x004A     Timer B Channel1Register Low
PSC                   0x004B     Programmable Interrupt Timer Status & Control Register
PSC.POF                7   PIT overflow flag bit
PSC.PIE                6   PIT overflow interrupt enable bit
PSC.PSTOP              5   PIT STOP bit
PSC.PRST               4   PIT reset bit
PSC.PPS2               2   Prescaler select bits 2
PSC.PPS1               1   Prescaler select bits 1
PSC.PPS0               0   Prescaler select bits 0
PCNTH                 0x004C     PIT Counter Register HIGH
PCNTL                 0x004D     PIT Counter Register Low
PMODH                 0x004E     PIT Modulo Register High
PMODL                 0x004F     PIT Modulo Register Low
SBSR                  0xFE00     SIM Break Status Register
SBSR.BW                1   SIM Break WAIT
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-on reset bit
SRSR.PIN               6   External reset bit
SRSR.COP               5   Computer operating properly reset bit
SRSR.ILOP              4   Illegal opcode reset bit
SRSR.ILAD              3   Illegal address reset bit (opcode fetches only)
SRSR.LVI               1   Low-voltage inhibit reset bit
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   break clear flag enable bit
ReservFE07            0xFE07     RESERVED
MORB                  0xFE09     Mask Option Register B
MORB.EEDIVCLK          7   EEPROM Timebase Divider Clock Select Bit
MORB.EESEC             5   This read/write bit has no function.
MORB.EEMONSEC          4   EEPROM Read Protection in Monitor Mode Bit
MORB.AZ32A             3   Device indicator
BRKH                  0xFE0C     Break Address Register High
BRKL                  0xFE0D     Break Address Register Low
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break enable bit
BRKSCR.BRKA            6   Break active bit
LVISR                 0xFE0F     LVI Status Register
LVISR.LVIOUT           7   LVI Output Bit
EEDIVHNVRH            0xFE10     EEDIV Hi Non-volatile Register
EEDIVHNVRH.EEDIVSECD   7   EEPROM Divider Security Disable
EEDIVHNVRH.EEDIV10     2   EEPROM timebase prescaler 10
EEDIVHNVRH.EEDIV9      1   EEPROM timebase prescaler 9
EEDIVHNVRH.EEDIV8      0   EEPROM timebase prescaler 8
EEDIVLNVRL            0xFE11     EEDIV Lo Non-volatile Register
EEDIVLNVRL.EEDIV7      7   EEPROM timebase prescaler 7
EEDIVLNVRL.EEDIV6      6   EEPROM timebase prescaler 6
EEDIVLNVRL.EEDIV5      5   EEPROM timebase prescaler 5
EEDIVLNVRL.EEDIV4      4   EEPROM timebase prescaler 4
EEDIVLNVRL.EEDIV3      3   EEPROM timebase prescaler 3
EEDIVLNVRL.EE2DIV      2   EEPROM timebase prescaler 2
EEDIVLNVRL.EEDIV1      1   EEPROM timebase prescaler 1
EEDIVLNVRL.EEDIV0      0   EEPROM timebase prescaler 0
EEDIVH                0xFE1A     EEDIV Divider High Register
EEDIVH.EEDIVSECD       7
EEDIVH.EEDIV10         2
EEDIVH.EEDIV9          1
EEDIVH.EEDIV8          0
EEDIVL                0xFE1B     EEDIV Divider Low Register
EEDIVL.EEDIV7          7
EEDIVL.EEDIV6          6
EEDIVL.EEDIV5          5
EEDIVL.EEDIV4          4
EEDIVL.EEDIV3          3
EEDIVL.EE2DIV          2
EEDIVL.EEDIV1          1
EEDIVL.EEDIV0          0
EENVR                 0xFE1C     EEPROM Nonvolatile Register
EENVR.CON3             7   MCU Configuration Bits 3
EENVR.CON2             6   MCU Configuration Bits 2
EENVR.CON1             5   MCU Configuration Bits 1
EENVR.EEPRTCT          4   EEPROM Program/Erase Protection
EENVR.EEPB3            3   EEPROM Block Protection Bits 3
EENVR.EEPB2            2   EEPROM Block Protection Bits 2
EENVR.EEPB1            1   EEPROM Block Protection Bits 1
EENVR.EEPB0            0   EEPROM Block Protection Bits 0
EECR                  0xFE1D     EEPROM Control Register
EECR.EEDUM             7   Dummy bit
EECR.EEOFF             5   EEPROM power down
EECR.EERAS1            4   Erase Bits 1
EECR.EERAS0            3   Erase Bits 0
EECR.ELAT              2   EEPROM Latch Control
EECR.AUTO              1   Indication for Automatic termination of program/erase cycle
EECR.EEPGM             0   EEPROM Program/Erase Enable
ReservFE1E            0xFE1E     RESERVED
EEACR                 0xFE1F     EEPROM array configuration register
EEACR.CON3             7   MCU Configuration Bits 3
EEACR.CON2             6   MCU Configuration Bits 2
EEACR.CON1             5   MCU Configuration Bits 1
EEACR.EEPRTCT          4   EEPROM Program/Erase Protection
EEACR.EEBP3            3   EEPROM Block Protection Bits 3
EEACR.EEBP2            2   EEPROM Block Protection Bits 2
EEACR.EEBP1            1   EEPROM Block Protection Bits 1
EEACR.EEBP0            0   EEPROM Block Protection Bits 0
COPCTL                0xFFFF     COP Control Register


.68HC08AZ48
; MC68HC08AZ60/D  http://
; MC68HC08AZ60.pdf

; RAM=1536 
; ROM=48K
; EPROM=0
; EEPROM=768 


; MEMORY MAP
area DATA FSR_1		0x0000:0x0040
area DATA FSR_2		0x0040:0x0050
area DATA RAM_1		0x0050:0x0450
area BSS  RESERVED	0x0450:0x0500
area DATA CAN_CONTROL	0x0500:0x0580
area BSS  RESERVED	0x0580:0x0600
area DATA EEPROM_2	0x0600:0x0700
area BSS  RESERVED	0x0700:0x0800
area DATA EEPROM_1	0x0800:0x0A00
area DATA RAM_2		0x0A00:0x0C00
area BSS  RESERVED	0x0C00:0x4000
area DATA ROM_2		0x4000:0x8000
area DATA ROM_1		0x8000:0xFE00
area DATA FSR_3		0xFE00:0xFE20
area DATA MONITOR_ROM	0xFE20:0xFF00
area BSS  UNIMPLEMENTED	0xFF00:0xFF80
area BSS  RESERVED	0xFF80:0xFFCC
area DATA USER_VEC	0xFFCC:0x10000


; Interrupt and reset vector assignments
interrupt __RESET           0xFFFE      Processor reset
interrupt SWI               0xFFFC      "SWI" 
interrupt IRQ               0xFFFA      "IRQ"
interrupt PLL               0xFFF8      "PLL Module"
interrupt TIM               0xFFF6      "TIM"
interrupt TIMA_CH0          0xFFF4      "TIMA Channel 0"
interrupt TIMA_CH1          0xFFF2      "TIMA Channel 1"
interrupt TIMA_CH2          0xFFF0      "TIMA Channel 2"
interrupt TIMA_CH3          0xFFEE      "TIMA Channel 3"
interrupt TIMA              0xFFEC      "TIMA Overflow"
interrupt TIMB_CH0          0xFFEA      "TIMB Channel 0"
interrupt TIMB_CH1          0xFFE8      "TIMB Channel 1"
interrupt TIMB              0xFFE6      "TIMB Overflow"
interrupt SPI_R             0xFFE4      "SPI Module Receive"
interrupt SPI_T             0xFFE2      "SPI Module Transmit"
interrupt CAN_W             0xFFE0      "CAN Module Wakeup"
interrupt CAN_E             0xFFDE      "CAN Module Error"
interrupt CAN_R             0xFFDC      "CAN Module Receive"
interrupt CAN_T             0xFFDA      "CAN Module Transmit"
interrupt SCI_E             0xFFD8      "SCI Module Error"
interrupt SCI_R             0xFFD6      "SCI Module Receive"
interrupt SCI_T             0xFFD4      "SCI Module Transmit"
interrupt KBRD              0xFFD2      "Keyboard"
interrupt ADC               0xFFD0      "ADC Conversion Complete"
interrupt TIMA4             0xFFCE      "TIMA Channel 4"
interrupt TIMA5             0xFFCC      "TIMA Channel 5"


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bit 7
PTA.PTA6               6   Port A Data Bit 6
PTA.PTA5               5   Port A Data Bit 5
PTA.PTA4               4   Port A Data Bit 4
PTA.PTA3               3   Port A Data Bit 3
PTA.PTA2               2   Port A Data Bit 2
PTA.PTA1               1   Port A Data Bit 1
PTA.PTA0               0   Port A Data Bit 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bit 7
PTB.PTB6               6   Port B Data Bit 6
PTB.PTB5               5   Port B Data Bit 5
PTB.PTB4               4   Port B Data Bit 4
PTB.PTB3               3   Port B Data Bit 3
PTB.PTB2               2   Port B Data Bit 2
PTB.PTB1               1   Port B Data Bit 1
PTB.PTB0               0   Port B Data Bit 0
PTC                   0x0002     Port C Data Register
PTC.PTC5               5   Port C Data Bit 5
PTC.PTC4               4   Port C Data Bit 4
PTC.PTC3               3   Port C Data Bit 3
PTC.PTC2               2   Port C Data Bit 2
PTC.PTC1               1   Port C Data Bit 1
PTC.PTC0               0   Port C Data Bit 0
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bit 7
PTD.PTD6               6   Port D Data Bit 6
PTD.PTD5               5   Port D Data Bit 5
PTD.PTD4               4   Port D Data Bit 4
PTD.PTD3               3   Port D Data Bit 3
PTD.PTD2               2   Port D Data Bit 2
PTD.PTD1               1   Port D Data Bit 1
PTD.PTD0               0   Port D Data Bit 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bit 7
DDRA.DDRA6             6   Data Direction Register A Bit 6
DDRA.DDRA5             5   Data Direction Register A Bit 5
DDRA.DDRA4             4   Data Direction Register A Bit 4
DDRA.DDRA3             3   Data Direction Register A Bit 3
DDRA.DDRA2             2   Data Direction Register A Bit 2
DDRA.DDRA1             1   Data Direction Register A Bit 1
DDRA.DDRA0             0   Data Direction Register A Bit 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bit 7
DDRB.DDRB6             6   Data Direction Register B Bit 6
DDRB.DDRB5             5   Data Direction Register B Bit 5
DDRB.DDRB4             4   Data Direction Register B Bit 4
DDRB.DDRB3             3   Data Direction Register B Bit 3
DDRB.DDRB2             2   Data Direction Register B Bit 2
DDRB.DDRB1             1   Data Direction Register B Bit 1
DDRB.DDRB0             0   Data Direction Register B Bit 0
DDRC                  0x0006     Data Direction Register C
DDRC.MCLKEN            7   MCLK Enable Bit
DDRC.DDRC5             5   Data Direction Register C Bit 5
DDRC.DDRC4             4   Data Direction Register C Bit 4
DDRC.DDRC3             3   Data Direction Register C Bit 3
DDRC.DDRC2             2   Data Direction Register C Bit 2
DDRC.DDRC1             1   Data Direction Register C Bit 1
DDRC.DDRC0             0   Data Direction Register C Bit 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bit 7
DDRD.DDRD6             6   Data Direction Register D Bit 6
DDRD.DDRD5             5   Data Direction Register D Bit 5
DDRD.DDRD4             4   Data Direction Register D Bit 4
DDRD.DDRD3             3   Data Direction Register D Bit 3
DDRD.DDRD2             2   Data Direction Register D Bit 2
DDRD.DDRD1             1   Data Direction Register D Bit 1
DDRD.DDRD0             0   Data Direction Register D Bit 0
PTE                   0x0008     Port E Data Register
PTE.PTE7               7   Port E Data Bit 7
PTE.PTE6               6   Port E Data Bit 6
PTE.PTE5               5   Port E Data Bit 5
PTE.PTE4               4   Port E Data Bit 4
PTE.PTE3               3   Port E Data Bit 3
PTE.PTE2               2   Port E Data Bit 2
PTE.PTE1               1   Port E Data Bit 1
PTE.PTE0               0   Port E Data Bit 0
PTF                   0x0009     Port F Data Register
PTF.PTF6               6   Port F Data Bit 6
PTF.PTF5               5   Port F Data Bit 5
PTF.PTF4               4   Port F Data Bit 4
PTF.PTF3               3   Port F Data Bit 3
PTF.PTF2               2   Port F Data Bit 2
PTF.PTF1               1   Port F Data Bit 1
PTF.PTF0               0   Port F Data Bit 0
PTG                   0x000A     Port G Data Register
PTG.PTG2               2   Port G Data Bit 2
PTG.PTG1               1   Port G Data Bit 1
PTG.PTG0               0   Port G Data Bit 0
PTH                   0x000B     Port H Data Register
PTH.PTH1               1   Port H Data Bit 1
PTH.PTH0               0   Port H Data Bit 0
DDRE                  0x000C     Data Direction Register E
DDRE.DDRE7             7   Data Direction Register E Bit 7
DDRE.DDRE6             6   Data Direction Register E Bit 6
DDRE.DDRE5             5   Data Direction Register E Bit 5
DDRE.DDRE4             4   Data Direction Register E Bit 4
DDRE.DDRE3             3   Data Direction Register E Bit 3
DDRE.DDRE2             2   Data Direction Register E Bit 2
DDRE.DDRE1             1   Data Direction Register E Bit 1
DDRE.DDRE0             0   Data Direction Register E Bit 0
DDRF                  0x000D     Data Direction Register F
DDRF.DDRF6             6   Data Direction Register F Bit 6
DDRF.DDRF5             5   Data Direction Register F Bit 5
DDRF.DDRF4             4   Data Direction Register F Bit 4
DDRF.DDRF3             3   Data Direction Register F Bit 3
DDRF.DDRF2             2   Data Direction Register F Bit 2
DDRF.DDRF1             1   Data Direction Register F Bit 1
DDRF.DDRF0             0   Data Direction Register F Bit 0
DDRG                  0x000E     Data Direction Register G
DDRG.DDRG2             2   Data Direction Register G Bit 2
DDRG.DDRG1             1   Data Direction Register G Bit 1
DDRG.DDRG0             0   Data Direction Register G Bit 0
DDRH                  0x000F     Data Direction Register H
DDRH.DDRH1             1   Data Direction Register H Bit 1
DDRH.DDRH0             0   Data Direction Register H Bit 0
SPCR                  0x0010     SPI Control Register
SPCR.SPRIE             7   SPI Receiver Interrupt Enable Bit
SPCR.SPMSTR            5   SPI Master Bit
SPCR.CPOL              4   Clock Polarity Bit
SPCR.CPHA              3   Clock Phase Bit
SPCR.SPWOM             2   SPI Wired-OR Mode Bit
SPCR.SPE               1   SPI Enable Bit
SPCR.SPTIE             0   SPI Transmit Interrupt Enable Bit
SPSCR                 0x0011     SPI Status and Control Register
SPSCR.SPRF             7   SPI Receiver Full Bit
SPSCR.ERRIE            6   Error Interrupt Enable Bit
SPSCR.OVRF             5   Overflow Bit
SPSCR.MODF             4   Mode Fault Bit
SPSCR.SPTE             3   SPI Transmitter Empty Bit
SPSCR.MODFEN           2   Mode Fault Enable Bit
SPSCR.SPR1             1   SPI Baud Rate Select Bits 1
SPSCR.SPR0             0   SPI Baud Rate Select Bits 0
SPDR                  0x0012     SPI Data Register
SPDR.T7_R7             7   Receive/Transmit Data Bit 7
SPDR.T6_R6             6   Receive/Transmit Data Bit 6
SPDR.T5_R5             5   Receive/Transmit Data Bit 5
SPDR.T4_R4             4   Receive/Transmit Data Bit 4
SPDR.T3_R3             3   Receive/Transmit Data Bit 3
SPDR.T2_R2             2   Receive/Transmit Data Bit 2
SPDR.T1_R1             1   Receive/Transmit Data Bit 1
SPDR.T0_R0             0   Receive/Transmit Data Bit 0
SCC1                  0x0013     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit
SCC1.ENSCI             6   Enable SCI Bit
SCC1.TXINV             5   Transmit Inversion Bit
SCC1.M                 4   Mode (Character Length) Bit
SCC1.WAKE              3   Wakeup Condition Bit
SCC1.ILTY              2   Idle Line Type Bit
SCC1.PEN               1   Parity Enable Bit
SCC1.PTY               0   Parity Bit
SCC2                  0x0014     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit
SCC2.ILIE              4   Idle Line Interrupt Enable Bit
SCC2.TE                3   Transmitter Enable Bit
SCC2.RE                2   Receiver Enable Bit
SCC2.RWU               1   Receiver Wakeup Bit
SCC2.SBK               0   Send Break Bit
SCC3                  0x0015     SCI Control Register 3
SCC3.R8                7   Received Bit 8
SCC3.T8                6   Transmitted Bit 8
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit
SCS1                  0x0016     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit
SCS1.TC                6   Transmission Complete Bit
SCS1.SCRF              5   SCI Receiver Full Bit
SCS1.IDLE              4   Receiver Idle Bit
SCS1.OR                3   Receiver Overrun Bit
SCS1.NF                2   Receiver Noise Flag Bit
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit
SCS2                  0x0017     SCI Status Register 2
SCS2.BKF               1   Break Flag Bit
SCS2.RPF               0   Reception in Progress Flag Bit
SCDR                  0x0018     SCI Data Register
SCDR.T7_R7             7   Receive/Transmit Data Bit 7
SCDR.T6_R6             6   Receive/Transmit Data Bit 6
SCDR.T5_R5             5   Receive/Transmit Data Bit 5
SCDR.T4_R4             4   Receive/Transmit Data Bit 4
SCDR.T3_R3             3   Receive/Transmit Data Bit 3
SCDR.T2_R2             2   Receive/Transmit Data Bit 2
SCDR.T1_R1             1   Receive/Transmit Data Bit 1
SCDR.T0_R0             0   Receive/Transmit Data Bit 0
SCBR                  0x0019     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2
SCBR.SCR1              1   SCI Baud Rate Select Bits 1
SCBR.SCR0              0   SCI Baud Rate Select Bits 0
ISCR                  0x001A     IRQ Status and Control Register
ISCR.IRQF              3   IRQ Flag Bit
ISCR.ACK1              2   IRQ Interrupt Request Acknowledge Bit
ISCR.IMASK1            1   IRQ Interrupt Mask Bit
ISCR.MODE1             0   IRQ Edge/Level Select Bit
KBSCR                 0x001B     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit                  
KBSCR.ACKK             2   Keyboard Acknowledge Bit           
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit        
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
PCTL                  0x001C     PLL Control Register
PCTL.PLLIE             7   PLL Interrupt Enable Bit
PCTL.PLLF              6   PLL Flag Bit
PCTL.PLLON             4   PLL On Bit
PCTL.BCS               3   Base Clock Select Bit
PBWC                  0x001D     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               4   Acquisition Mode Bit
PBWC.XLD               3   Crystal Loss Detect Bit
PPG                   0x001E     PLL Programming Register
PPG.MUL7               7   Multiplier Select Bits 7
PPG.MUL6               6   Multiplier Select Bits 6
PPG.MUL5               5   Multiplier Select Bits 5
PPG.MUL4               4   Multiplier Select Bits 4
PPG.VRS7               3   VCO Range Select Bits 7
PPG.VRS6               2   VCO Range Select Bits 6
PPG.VRS5               1   VCO Range Select Bits 5
PPG.VRS4               0   VCO Range Select Bits 4
MOR                   0x001F     Mask Option Register
MOR.LVISTOP            7   LVI Stop Mode Enable Bit
MOR.ROMSEC             6   ROM Security Bit
MOR.LVIRST             5   LVI Reset Enable Bit
MOR.LVIPWR             4   LVI Power Enable Bit
MOR.SSREC              3   Short Stop Recovery Bit
MOR.COPRS              2   COP Rate Select Bit
MOR.STOP               1   STOP Instruction Enable Bit
MOR.COPD               0   COP Disable Bit
TASC                  0x0020     Timer A Status and Control Register
TASC.TOF               7   TIMA Overflow Flag Bit
TASC.TOIE              6   TIMA Overflow Interrupt Enable Bit
TASC.TSTOP             5   TIMA Stop Bit
TASC.TRST              4   TIMA Reset Bit
TASC.PS2               2   Prescaler Select Bits 2
TASC.PS1               1   Prescaler Select Bits 1
TASC.PS0               0   Prescaler Select Bits 0
KBIE                  0x0021     Keyboard Interrupt Enable Register
KBIE.KBIE4             4   Keyboard Interrupt Enable Bits 4
KBIE.KBIE3             3   Keyboard Interrupt Enable Bits 3
KBIE.KBIE2             2   Keyboard Interrupt Enable Bits 2
KBIE.KBIE1             1   Keyboard Interrupt Enable Bits 1
KBIE.KBIE0             0   Keyboard Interrupt Enable Bits 0
TACNTH                0x0022     Timer A Counter Register High
TACNTL                0x0023     Timer A Counter Register Low
TAMODH                0x0024     Timer A Modulo Register High
TAMODL                0x0025     Timer A Modulo Register Low
TASC0                 0x0026     Timer A Channel 0 Status and Control Register
TASC0.CH0F             7   Channel 0 Flag Bit
TASC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TASC0.MS0B             5   Mode Select Bit B
TASC0.MS0A             4   Mode Select Bit A
TASC0.ELS0B            3   Edge/Level Select Bits
TASC0.ELS0A            2   Edge/Level Select Bits
TASC0.TOV0             1   Toggle-On-Overflow Bit
TASC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TACH0H                0x0027     Timer A Channel 0 Register High
TACH0L                0x0028     Timer A Channel 0 Register Low
TASC1                 0x0029     Timer A Channel 1 Status and Control Register
TASC1.CH1F             7   Channel 1 Flag Bit            
TASC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TASC1.MS1A             4   Mode Select Bit A               
TASC1.ELS1B            3   Edge/Level Select Bits          
TASC1.ELS1A            2   Edge/Level Select Bits          
TASC1.TOV1             1   Toggle-On-Overflow Bit          
TASC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TACH1H                0x002A     Timer A Channel 1 Register High
TACH1L                0x002B     Timer A Channel 1 Register Low
TASC2                 0x002C     Timer A Channel 2 Status and Control Register
TASC2.CH2F             7   Channel 2 Flag Bit              
TASC2.CH2IE            6   Channel 2 Interrupt Enable Bit  
TASC2.MS2B             5   Mode Select Bit B               
TASC2.MS2A             4   Mode Select Bit A               
TASC2.ELS2B            3   Edge/Level Select Bits          
TASC2.ELS2A            2   Edge/Level Select Bits          
TASC2.TOV2             1   Toggle-On-Overflow Bit          
TASC2.CH2MAX           0   Channel 2 Maximum Duty Cycle Bit
TACH2H                0x002D     Timer A Channel 2 Register High
TACH2L                0x002E     Timer A Channel 2 Register Low
TASC3                 0x002F     Timer A Channel 3 Status and Control Register
TASC3.CH3F             7   Channel 3 Flag Bit              
TASC3.CH3IE            6   Channel 3 Interrupt Enable Bit  
TASC3.MS3A             4   Mode Select Bit A               
TASC3.ELS3B            3   Edge/Level Select Bits          
TASC3.ELS3A            2   Edge/Level Select Bits          
TASC3.TOV3             1   Toggle-On-Overflow Bit          
TASC3.CH3MAX           0   Channel 3 Maximum Duty Cycle Bit
TACH3H                0x0030     Timer A Channel 3 Register High
TACH3L                0x0031     Timer A Channel 3 Register Low
TASC4                 0x0032     Timer A Channel 4 Status and Control Register
TASC4.CH4F             7   Channel 4 Flag Bit              
TASC4.CH4IE            6   Channel 4 Interrupt Enable Bit  
TASC4.MS4B             5   Mode Select Bit B               
TASC4.MS4A             4   Mode Select Bit A               
TASC4.ELS4B            3   Edge/Level Select Bits          
TASC4.ELS4A            2   Edge/Level Select Bits          
TASC4.TOV4             1   Toggle-On-Overflow Bit          
TASC4.CH4MAX           0   Channel 4 Maximum Duty Cycle Bit
TACH4H                0x0033     Timer A Channel 4 Register High
TACH4L                0x0034     Timer A Channel 4 Register Low
TASC5                 0x0035     Timer A Channel 5 Status and Control Register
TASC5.CH5F             7   Channel 5 Flag Bit              
TASC5.CH5IE            6   Channel 5 Interrupt Enable Bit  
TASC5.MS5A             4   Mode Select Bit A               
TASC5.ELS5B            3   Edge/Level Select Bits          
TASC5.ELS5A            2   Edge/Level Select Bits          
TASC5.TOV5             1   Toggle-On-Overflow Bit          
TASC5.CH5MAX           0   Channel 5 Maximum Duty Cycle Bit
TACH5H                0x0036     Timer A Channel 5 Register High
TACH5L                0x0037     Timer A Channel 5 Register Low
ADSCR                 0x0038     Analog-to-Digital Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADR                   0x0039     Analog-to-Digital Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADICLK                0x003A     Analog-to-Digital Input Clock Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bit 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bit 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bit 0
ADICLK.ADICLK          4   ADC Input Clock Register Bit
TBSCR                 0x0040     Timer B Status and Control Register
TBSCR.TOF              7   TIMB Overflow Flag Bit
TBSCR.TOIE             6   TIMB Overflow Interrupt Enable Bit
TBSCR.TSTOP            5   TIMB Stop Bit
TBSCR.TRST             4   TIMB Reset Bit
TBSCR.PS2              2   Prescaler Select Bits 2
TBSCR.PS1              1   Prescaler Select Bits 1
TBSCR.PS0              0   Prescaler Select Bits 0
TBCNTH                0x0041     Timer B Counter Register High
TBCNTL                0x0042     Timer B Counter Register Low
TBMODH                0x0043     Timer B Modulo Register High
TBMODL                0x0044     Timer B Modulo Register Low
TBSC0                 0x0045     Timer B CH0 Status and Control Register
TBSC0.CH0F             7   Channel 0 Flag Bit
TBSC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TBSC0.MS0B             5   Mode Select Bit B
TBSC0.MS0A             4   Mode Select Bit A
TBSC0.ELS0B            3   Edge/Level Select Bits
TBSC0.ELS0A            2   Edge/Level Select Bits
TBSC0.TOV0             1   Toggle-On-Overflow Bit
TBSC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TBCH0H                0x0046     Timer B CH0 Register High
TBCH0L                0x0047     Timer B CH0 Register Low
TBSC1                 0x0048     Timer B CH1 Status and Control Register
TBSC1.CH1F             7   Channel 1 Flag Bit            
TBSC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TBSC1.MS1A             4   Mode Select Bit A               
TBSC1.ELS1B            3   Edge/Level Select Bits          
TBSC1.ELS1A            2   Edge/Level Select Bits          
TBSC1.TOV1             1   Toggle-On-Overflow Bit          
TBSC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TBCH1H                0x0049     Timer B CH1 Register High
TBCH1L                0x004A     Timer B CH1 Register Low
TSC                   0x004B     TIM Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
TCNTH                 0x004C     TIM Counter Register High
TCNTL                 0x004D     TIM Counter Register Low
TMODH                 0x004E     TIM Modulo Register High
TMODL                 0x004F     TIM Modulo Register Low
SBSR                  0xFE00     SIM Break Status Register
SBSR.SBSW              1   SIM Break Stop/Wait
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Bit
SRSR.PIN               6   External Reset Bit
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit (opcode fetches only)
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
RESERVFE09            0xFE09     RESERVED
RESERVFE0B            0xFE0B     RESERVED
BRKH                  0xFE0C     Break Address Register High
BRKL                  0xFE0D     Break Address Register Low
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
LVISR                 0xFE0F     LVI Status Register
LVISR.LVIOUT           7   LVI Output Bit
RESERVFE11            0xFE11     RESERVED
EENVR2                0xFE18     EEPROM Nonvolatile Register
EENVR2.EERA            7   EEPROM Redundant Array
EENVR2.CON2            6   MCU Configuration Bit 2
EENVR2.CON1            5   MCU Configuration Bit 1
EENVR2.EEPRTCT         4   EEPROM Protection
EENVR2.EEBP3           3   EEPROM Block Protection Bit 3
EENVR2.EEBP2           2   EEPROM Block Protection Bit 2
EENVR2.EEBP1           1   EEPROM Block Protection Bit 1
EENVR2.EEBP0           0   EEPROM Block Protection Bit 0
EECR2                 0xFE19     EEPROM Control Register
EECR2.EEBCLK           7   EEPROM Bus Clock Enable
EECR2.EEOFF            5   EEPROM Power Down
EECR2.EERAS1           4   Erase Bits 1
EECR2.EERAS0           3   Erase Bits 0
EECR2.EELAT            2   EEPROM Latch Control
EECR2.EEPGM            0   EEPROM Program/Erase Enable
ReservFE1A            0xFE1A     RESERVED
EEACR2                0xFE1B     EEPROM Array Control Register
EEACR2.EERA            7   EEPROM Redundant Array
EEACR2.CON2            6   MCU Configuration Bits 2
EEACR2.CON1            5   MCU Configuration Bits 1
EEACR2.EEPRTCT         4   EEPROM Protection
EEACR2.EEBP3           3   EEPROM Block Protection Bits 3
EEACR2.EEBP2           2   EEPROM Block Protection Bits 2
EEACR2.EEBP1           1   EEPROM Block Protection Bits 1
EEACR2.EEBP0           0   EEPROM Block Protection Bits 0
EENVR1                0xFE1C     EEPROM Nonvolatile Register
EENVR1.EERA            7   EEPROM Redundant Array
EENVR1.CON2            6   MCU Configuration Bits 2
EENVR1.CON1            5   MCU Configuration Bits 1
EENVR1.EEPRTCT         4   EEPROM Protection
EENVR1.EEBP3           3   EEPROM Block Protection Bits 3
EENVR1.EEBP2           2   EEPROM Block Protection Bits 2
EENVR1.EEBP1           1   EEPROM Block Protection Bits 1
EENVR1.EEBP0           0   EEPROM Block Protection Bits 0
EECR1                 0xFE1D     EEPROM Control Register
EECR1.EEBCLK           7   EEPROM Bus Clock Enable
EECR1.EEOFF            5   EEPROM Power Down
EECR1.EERAS1           4   Erase Bits 1
EECR1.EERAS0           3   Erase Bits 0
EECR1.EELAT            2   EEPROM Latch Control
EECR1.EEPGM            0   EEPROM Program/Erase Enable
ReservFE1E            0xFE1E     RESERVED
EEACR1                0xFE1F     EEPROM Array Control Register
EEACR1.EERA            7   EEPROM Redundant Array
EEACR1.CON2            6   MCU Configuration Bits 2
EEACR1.CON1            5   MCU Configuration Bits 1
EEACR1.EEPRTCT         4   EEPROM Protection
EEACR1.EEBP3           3   EEPROM Block Protection Bits 3
EEACR1.EEBP2           2   EEPROM Block Protection Bits 2
EEACR1.EEBP1           1   EEPROM Block Protection Bits 1
EEACR1.EEBP0           0   EEPROM Block Protection Bits 0
RESERVFF80            0xFF80     RESERVED
RESERVFF81            0xFF81     RESERVED
COPCTL                0xFFFF     COP Control Register


.68HC08AZ60
; MC68HC08AZ60/D  http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=68HC08AZ60&nodeId=01M98634
; MC68HC08AZ60.pdf

; RAM=2K 
; ROM=60K 
; EPROM=0
; EEPROM=1024 


; MEMORY MAP
area DATA FSR_1           0x0000:0x0040
area DATA FSR_2           0x0040:0x0050
area DATA RAM_1           0x0050:0x0450
area DATA ROM_2_S1        0x0450:0x0500
area DATA CAN_CONTROL     0x0500:0x0580
area DATA ROM_2_S2        0x0580:0x0600
area DATA EEPROM_2        0x0600:0x0800
area DATA EEPROM_1        0x0800:0x0A00
area DATA RAM_2           0x0A00:0x0E00
area DATA ROM_2_S3        0x0E00:0x8000
area DATA ROM_1           0x8000:0xFE00
area DATA FSR_3           0xFE00:0xFE20
area DATA ROM_Monitor     0xFE20:0xFF00
area BSS  UNIMPLEMENTED   0xFF00:0xFF80
area BSS  RESERVED        0xFF80:0xFFCC
area DATA USER_VEC        0xFFCC:0x10000
    

; Interrupt and reset vector assignments
interrupt __RESET           0xFFFE      Processor reset
interrupt SWI               0xFFFC      "SWI" 
interrupt IRQ               0xFFFA      "IRQ"
interrupt PLL               0xFFF8      "PLL Module"
interrupt TIM               0xFFF6      "TIM"
interrupt TIMA_CH0          0xFFF4      "TIMA Channel 0"
interrupt TIMA_CH1          0xFFF2      "TIMA Channel 1"
interrupt TIMA_CH2          0xFFF0      "TIMA Channel 2"
interrupt TIMA_CH3          0xFFEE      "TIMA Channel 3"
interrupt TIMA              0xFFEC      "TIMA Overflow"
interrupt TIMB_CH0          0xFFEA      "TIMB Channel 0"
interrupt TIMB_CH1          0xFFE8      "TIMB Channel 1"
interrupt TIMB              0xFFE6      "TIMB Overflow"
interrupt SPI_R             0xFFE4      "SPI Module Receive"
interrupt SPI_T             0xFFE2      "SPI Module Transmit"
interrupt CAN_W             0xFFE0      "CAN Module Wakeup"
interrupt CAN_E             0xFFDE      "CAN Module Error"
interrupt CAN_R             0xFFDC      "CAN Module Receive"
interrupt CAN_T             0xFFDA      "CAN Module Transmit"
interrupt SCI_E             0xFFD8      "SCI Module Error"
interrupt SCI_R             0xFFD6      "SCI Module Receive"
interrupt SCI_T             0xFFD4      "SCI Module Transmit"
interrupt KBRD              0xFFD2      "Keyboard"
interrupt ADC               0xFFD0      "ADC Conversion Complete"
interrupt TIMA4             0xFFCE      "TIMA Channel 4"
interrupt TIMA5             0xFFCC      "TIMA Channel 5"


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bits 7
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits ADC Channels 7
PTB.PTB6               6   Port B Data Bits ADC Channels 6
PTB.PTB5               5   Port B Data Bits ADC Channels 5
PTB.PTB4               4   Port B Data Bits ADC Channels 4
PTB.PTB3               3   Port B Data Bits ADC Channels 3
PTB.PTB2               2   Port B Data Bits ADC Channels 2
PTB.PTB1               1   Port B Data Bits ADC Channels 1
PTB.PTB0               0   Port B Data Bits ADC Channels 0
PTC                   0x0002     Port C Data Register
PTC.PTC5               5   Port C Data Bits 5
PTC.PTC4               4   Port C Data Bits 4
PTC.PTC3               3   Port C Data Bits 3
PTC.PTC2               2   Port C Data Bits 2
PTC.PTC1               1   Port C Data Bits 1
PTC.PTC0               0   Port C Data Bits 0
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bits 7
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A OR  A/D
DDRA.DDRA7             7   Data Direction Register A Bits 7
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
DDRC                  0x0006     Data Direction Register C
DDRC.MCLKEN            7   MCLK Enable Bit
DDRC.DDRC5             5   Data Direction Register C Bits 5
DDRC.DDRC4             4   Data Direction Register C Bits 4
DDRC.DDRC3             3   Data Direction Register C Bits 3
DDRC.DDRC2             2   Data Direction Register C Bits 2
DDRC.DDRC1             1   Data Direction Register C Bits 1
DDRC.DDRC0             0   Data Direction Register C Bits 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bits 7
DDRD.DDRD6             6   Data Direction Register D Bits 6
DDRD.DDRD5             5   Data Direction Register D Bits 5
DDRD.DDRD4             4   Data Direction Register D Bits 4
DDRD.DDRD3             3   Data Direction Register D Bits 3
DDRD.DDRD2             2   Data Direction Register D Bits 2
DDRD.DDRD1             1   Data Direction Register D Bits 1
DDRD.DDRD0             0   Data Direction Register D Bits 0
PTE                   0x0008     Port E Data Register
PTE.PTE7               7   Port E Data Bits 7
PTE.PTE6               6   Port E Data Bits 6
PTE.PTE5               5   Port E Data Bits 5
PTE.PTE4               4   Port E Data Bits 4
PTE.PTE3               3   Port E Data Bits 3
PTE.PTE2               2   Port E Data Bits 2
PTE.PTE1               1   Port E Data Bits 1
PTE.PTE0               0   Port E Data Bits 0
PTF                   0x0009     Port F Data Register
PTF.PTF6               6   Port F Data Bits 6
PTF.PTF5               5   Port F Data Bits 5
PTF.PTF4               4   Port F Data Bits 4
PTF.PTF3               3   Port F Data Bits 3
PTF.PTF2               2   Port F Data Bits 2
PTF.PTF1               1   Port F Data Bits 1
PTF.PTF0               0   Port F Data Bits 0
PTG                   0x000A     Port G Data Register
PTG.PTG2               2   Port G Data Bits 2
PTG.PTG1               1   Port G Data Bits 1
PTG.PTG0               0   Port G Data Bits 0
PTH                   0x000B     Port H Data Register
PTH.PTH1               1   Port H Data Bits 1
PTH.PTH0               0   Port H Data Bits 0
DDRE                  0x000C     Data Direction Register E
DDRE.DDRE7             7   Data Direction Register E Bits 7
DDRE.DDRE6             6   Data Direction Register E Bits 6
DDRE.DDRE5             5   Data Direction Register E Bits 5
DDRE.DDRE4             4   Data Direction Register E Bits 4
DDRE.DDRE3             3   Data Direction Register E Bits 3
DDRE.DDRE2             2   Data Direction Register E Bits 2
DDRE.DDRE1             1   Data Direction Register E Bits 1
DDRE.DDRE0             0   Data Direction Register E Bits 0
DDRF                  0x000D     Data Direction Register F
DDRF.DDRF6             6   Data Direction Register F Bits 6
DDRF.DDRF5             5   Data Direction Register F Bits 5
DDRF.DDRF4             4   Data Direction Register F Bits 4
DDRF.DDRF3             3   Data Direction Register F Bits 3
DDRF.DDRF2             2   Data Direction Register F Bits 2
DDRF.DDRF1             1   Data Direction Register F Bits 1
DDRF.DDRF0             0   Data Direction Register F Bits 0
DDRG                  0x000E     Data Direction Register G
DDRG.DDRG2             2   Data Direction Register G Bits 2
DDRG.DDRG1             1   Data Direction Register G Bits 1
DDRG.DDRG0             0   Data Direction Register G Bits 0
DDRH                  0x000F     Data Direction Register H
DDRH.DDRH1             1   Data Direction Register H Bits 1
DDRH.DDRH0             0   Data Direction Register H Bits 0
SPCR                  0x0010     SPI Control Register
SPCR.SPRIE             7   SPI Receiver Interrupt Enable Bit
SPCR.SPMSTR            5   SPI Master Bit
SPCR.CPOL              4   Clock Polarity Bit
SPCR.CPHA              3   Clock Phase Bit
SPCR.SPWOM             2   SPI Wired-OR Mode Bit
SPCR.SPE               1   SPI Enable Bit
SPCR.SPTIE             0   SPI Transmit Interrupt Enable Bit
SPSCR                 0x0011     SPI Status and Control Register
SPSCR.SPRF             7   SPI Receiver Full Bit
SPSCR.ERRIE            6   Error Interrupt Enable Bit
SPSCR.OVRF             5   Overflow Bit
SPSCR.MODF             4   Mode Fault Bit
SPSCR.SPTE             3   SPI Transmitter Empty Bit
SPSCR.MODFEN           2   Mode Fault Enable Bit
SPSCR.SPR1             1   SPI Baud Rate Select Bits 1
SPSCR.SPR0             0   SPI Baud Rate Select Bits 0
SPDR                  0x0012     SPI Data Register
SPDR.T7_R7             7   Receive/Transmit Data Bits 7
SPDR.T6_R6             6   Receive/Transmit Data Bits 6
SPDR.T5_R5             5   Receive/Transmit Data Bits 5
SPDR.T4_R4             4   Receive/Transmit Data Bits 4
SPDR.T3_R3             3   Receive/Transmit Data Bits 3
SPDR.T2_R2             2   Receive/Transmit Data Bits 2
SPDR.T1_R1             1   Receive/Transmit Data Bits 1
SPDR.T0_R0             0   Receive/Transmit Data Bits 0
SCC1                  0x0013     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit
SCC1.ENSCI             6   Enable SCI Bit
SCC1.TXINV             5   Transmit Inversion Bit
SCC1.M                 4   Mode Bit
SCC1.WAKE              3   Wakeup Condition Bit
SCC1.ILTY              2   Idle Line Type Bit
SCC1.PEN               1   Parity Enable Bit
SCC1.PTY               0   Parity Bit
SCC2                  0x0014     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit
SCC2.ILIE              4   Idle Line Interrupt Enable Bit
SCC2.TE                3   Transmitter Enable Bit
SCC2.RE                2   Receiver Enable Bit
SCC2.RWU               1   Receiver Wakeup Bit
SCC2.SBK               0   Send Break Bit
SCC3                  0x0015     SCI Control Register 3
SCC3.R8                7   Received Bit
SCC3.T8                6   Transmitted Bit
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit
SCS1                  0x0016     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit
SCS1.TC                6   Transmission Complete Bit
SCS1.SCRF              5   SCI Receiver Full Bit
SCS1.IDLE              4   Receiver Idle Bit
SCS1.OR                3   Receiver Overrun Bit
SCS1.NF                2   Receiver Noise Flag Bit
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit
SCS2                  0x0017     SCI Status Register 2
SCS2.BKF               1   Break Flag Bit
SCS2.RPF               0   Reception in Progress Flag Bit
SCDR                  0x0018     SCI Data Register
SCDR.T7_R7             7   Receive/Transmit Data Bits 7
SCDR.T6_R6             6   Receive/Transmit Data Bits 6
SCDR.T5_R5             5   Receive/Transmit Data Bits 5
SCDR.T4_R4             4   Receive/Transmit Data Bits 4
SCDR.T3_R3             3   Receive/Transmit Data Bits 3
SCDR.T2_R2             2   Receive/Transmit Data Bits 2
SCDR.T1_R1             1   Receive/Transmit Data Bits 1
SCDR.T0_R0             0   Receive/Transmit Data Bits 0
SCBR                  0x0019     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2
SCBR.SCR1              1   SCI Baud Rate Select Bits 1
SCBR.SCR0              0   SCI Baud Rate Select Bits 0
ISCR                  0x001A     IRQ Status and Control Register
ISCR.IRQF              3   IRQ Flag Bit
ISCR.ACK1              2   IRQ Interrupt Request Acknowledge Bit
ISCR.IMASK1            1   IRQ Interrupt Mask Bit
ISCR.MODE1             0   IRQ Edge/Level Select Bit
; KBSCR                 0x001A     Keyboard Status and Control Register
; KBSCR.KEYF             3   Keyboard Flag Bit
; KBSCR.ACKK             2   Keyboard Acknowledge Bit
; KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
; KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
KBSCR                 0x001B     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
; KBIER                 0x001B     Keyboard Interrupt Enable Register
; KBIER.KBIE4            4   Keyboard Interrupt Enable Bits 4
; KBIER.KBIE3            3   Keyboard Interrupt Enable Bits 3
; KBIER.KBIE2            2   Keyboard Interrupt Enable Bits 2
; KBIER.KBIE1            1   Keyboard Interrupt Enable Bits 1
; KBIER.KBIE0            0   Keyboard Interrupt Enable Bits 0
PCTL                  0x001C     PLL Control Register
PCTL.PLLIE             7   PLL Interrupt Enable Bit
PCTL.PLLF              6   PLL Flag Bit
PCTL.PLLON             5   PLL On Bit
PCTL.BCS               4   Base Clock Select Bit
PBWC                  0x001D     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               5   Acquisition Mode Bit
PBWC.XLD               4   Crystal Loss Detect Bit
PPG                   0x001E     PLL Programming Register
PPG.MUL7               7   Multiplier Select Bits 7
PPG.MUL6               6   Multiplier Select Bits 6
PPG.MUL5               5   Multiplier Select Bits 5
PPG.MUL4               4   Multiplier Select Bits 4
PPG.VRS7               3   VCO Range Select Bits 7
PPG.VRS6               2   VCO Range Select Bits 6
PPG.VRS5               1   VCO Range Select Bits 5
PPG.VRS4               0   VCO Range Select Bits 4
MOR                   0x001F     Mask Option Register
MOR.LVISTOP            7   LVI Stop Mode Enable Bit
MOR.ROMSEC             6   ROM Security Bit
MOR.LVIRST             5   LVI Reset Enable Bit
MOR.LVIPWR             4   LVI Power Enable Bit
MOR.SSREC              3   Short Stop Recovery Bit
MOR.COPL               2   COP Long Timeout
MOR.STOP               1   Instruction Enable Bit
MOR.COPD               0   COP Disable Bit
TASC                  0x0020     Timer A Status and Control Register
TASC.TOF               7   TIMA Overflow Flag Bit
TASC.TOIE              6   TIMA Overflow Interrupt Enable Bit      		
TASC.TSTOP             5   TIMA Stop Bit
TASC.TRST              4   TIMA Reset Bit
TASC.PS2               2   Prescaler Select Bits 2
TASC.PS1               1   Prescaler Select Bits 1
TASC.PS0               0   Prescaler Select Bits 0
KBIE                  0x0021     Keyboard Interrupt Enable Register
KBIE.KBIE4             4   Keyboard Interrupt Enable Bits 4
KBIE.KBIE3             3   Keyboard Interrupt Enable Bits 3
KBIE.KBIE2             2   Keyboard Interrupt Enable Bits 2
KBIE.KBIE1             1   Keyboard Interrupt Enable Bits 1
KBIE.KBIE0             0   Keyboard Interrupt Enable Bits 0
TACNTH                0x0022     Timer A Counter Register High
TACNTL                0x0023     Timer A Counter Register Low
TAMODH                0x0024     Timer A Modulo Register High
TAMODL                0x0025     Timer A Modulo Register Low
TASC0                 0x0026     Timer A Channel 0 Status and Control Register
TASC0.CH0F             7   Channel 0 Flag Bit
TASC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TASC0.MS0B             5   Mode Select Bit B
TASC0.MS0A             4   Mode Select Bit A
TASC0.ELS0B            3   Edge/Level Select Bits
TASC0.ELS0A            2   Edge/Level Select Bits
TASC0.TOV0             1   Toggle-On-Overflow Bit
TASC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TACH0H                0x0027     Timer A Channel 0 Register High
TACH0L                0x0028     Timer A Channel 0 Register Low
TASC1                 0x0029     Timer A Channel 1 Status and Control Register
TASC1.CH1F             7   Channel 1 Flag Bit            
TASC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TASC1.MS1A             4   Mode Select Bit A               
TASC1.ELS1B            3   Edge/Level Select Bits          
TASC1.ELS1A            2   Edge/Level Select Bits          
TASC1.TOV1             1   Toggle-On-Overflow Bit          
TASC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TACH1H                0x002A     Timer A Channel 1 Register High
TACH1L                0x002B     Timer A Channel 1 Register Low
TASC2                 0x002C     Timer A Channel 2 Status and Control Register
TASC2.CH2F             7   Channel 2 Flag Bit              
TASC2.CH2IE            6   Channel 2 Interrupt Enable Bit  
TASC2.MS2B             5   Mode Select Bit B               
TASC2.MS2A             4   Mode Select Bit A               
TASC2.ELS2B            3   Edge/Level Select Bits          
TASC2.ELS2A            2   Edge/Level Select Bits          
TASC2.TOV2             1   Toggle-On-Overflow Bit          
TASC2.CH2MAX           0   Channel 2 Maximum Duty Cycle Bit
TACH2H                0x002D     Timer A Channel 2 Register High
TACH2L                0x002E     Timer A Channel 2 Register Low
TASC3                 0x002F     Timer A Channel 3 Status and Control Register
TASC3.CH3F             7   Channel 3 Flag Bit              
TASC3.CH3IE            6   Channel 3 Interrupt Enable Bit  
TASC3.MS3A             4   Mode Select Bit A               
TASC3.ELS3B            3   Edge/Level Select Bits          
TASC3.ELS3A            2   Edge/Level Select Bits          
TASC3.TOV3             1   Toggle-On-Overflow Bit          
TASC3.CH3MAX           0   Channel 3 Maximum Duty Cycle Bit
TACH3H                0x0030     Timer A Channel 3 Register High
TACH3L                0x0031     Timer A Channel 3 Register Low
TASC4                 0x0032     Timer A Channel 4 Status and Control Register
TASC4.CH4F             7   Channel 4 Flag Bit              
TASC4.CH4IE            6   Channel 4 Interrupt Enable Bit  
TASC4.MS4B             5   Mode Select Bit B               
TASC4.MS4A             4   Mode Select Bit A               
TASC4.ELS4B            3   Edge/Level Select Bits          
TASC4.ELS4A            2   Edge/Level Select Bits          
TASC4.TOV4             1   Toggle-On-Overflow Bit          
TASC4.CH4MAX           0   Channel 4 Maximum Duty Cycle Bit
TACH4H                0x0033     Timer A Channel 4 Register High
TACH4L                0x0034     Timer A Channel 4 Register Low
TASC5                 0x0035     Timer A Channel 5 Status and Control Register
TASC5.CH5F             7   Channel 5 Flag Bit              
TASC5.CH5IE            6   Channel 5 Interrupt Enable Bit  
TASC5.MS5A             4   Mode Select Bit A               
TASC5.ELS5B            3   Edge/Level Select Bits          
TASC5.ELS5A            2   Edge/Level Select Bits          
TASC5.TOV5             1   Toggle-On-Overflow Bit          
TASC5.CH5MAX           0   Channel 5 Maximum Duty Cycle Bit
TACH5H                0x0036     Timer A Channel 5 Register High
TACH5L                0x0037     Timer A Channel 5 Register Low
ADSCR                 0x0038     Analog-to-Digital Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADR                   0x0039     Analog-to-Digital Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADICLK                0x003A     Analog-to-Digital Input Clock Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bits 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bits 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bits 0
ADICLK.ADICLK          4   ADC Input Clock Register Bit
TBSCR                 0x0040     Timer B Status and Control Register
TBSCR.TOF              7   TIMB Overflow Flag Bit
TBSCR.TOIE             6   TIMB Overflow Interrupt Enable Bit
TBSCR.TSTOP            5   TIMB Stop Bit
TBSCR.TRST             4   TIMB Reset Bit
TBSCR.PS2              2   Prescaler Select Bits 2
TBSCR.PS1              1   Prescaler Select Bits 1
TBSCR.PS0              0   Prescaler Select Bits 0
TBCNTH                0x0041     Timer B Counter Register High
TBCNTL                0x0042     Timer B Counter Register Low
TBMODH                0x0043     Timer B Modulo Register High
TBMODL                0x0044     Timer B Modulo Register Low
TBSC0                 0x0045     Timer B CH0 Status and Control Register
TBSC0.CH0F             7   Channel 0 Flag Bit
TBSC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TBSC0.MS0B             5   Mode Select Bit 0 B
TBSC0.MS0A             4   Mode Select Bit 0 A
TBSC0.ELS0B            3   Edge/Level Select Bits 0 B
TBSC0.ELS0A            2   Edge/Level Select Bits 0 A
TBSC0.TOV0             1   Toggle-On-Overflow Bit 0
TBSC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TBCH0H                0x0046     Timer B CH0 Register High
TBCH0L                0x0047     Timer B CH0 Register Low
TBSC1                 0x0048     Timer B CH1 Status and Control Register
TBSC1.CH1F             7   Channel 1 Flag Bit
TBSC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TBSC1.MS1A             4   Mode Select Bit 1 A
TBSC1.ELS1B            3   Edge/Level Select Bits 1 B
TBSC1.ELS1A            2   Edge/Level Select Bits 1 A
TBSC1.TOV1             1   Toggle-On-Overflow Bit 1
TBSC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TBCH1H                0x0049     Timer B CH1 Register High
TBCH1L                0x004A     Timer B CH1 Register Low
TSC                   0x004B     TIM Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
TCNTH                 0x004C     TIM Counter Register High
TCNTL                 0x004D     TIM Counter Register Low
TMODH                 0x004E     TIM Modulo Register High
TMODL                 0x004F     TIM Modulo Register Low
CMCR0                 0x0500	 Module Control Register 0
CMCR0.SYNCH            4   Synchronized Status
CMCR0.TLNKEN           3   Timer Enable
CMCR0.SLPAK            2   Sleep Mode Acknowledge
CMCR0.SLPRQ            1   Sleep Request, Go to Internal Sleep Mode
CMCR0.SFTRES           0   Soft Reset
CMCR1                 0x0501      Module Control Register 1
CMCR1.LOOPB            2   Loop Back Self-Test Mode
CMCR1.WUPM             1   Wakeup Mode
CMCR1.CLKSRC           0   Clock Source
CBTR0                 0x0502     Bus Timing Register 0
CBTR0.SJW1             7   Synchronization Jump Width
CBTR0.SJW0             6   Synchronization Jump Width
CBTR0.BRP5             5   Baud Rate Prescaler
CBTR0.BRP4             4   Baud Rate Prescaler
CBTR0.BRP3             3   Baud Rate Prescaler
CBTR0.BRP2             2   Baud Rate Prescaler
CBTR0.BRP1             1   Baud Rate Prescaler
CBTR0.BRP0             0   Baud Rate Prescaler
CBTR1                 0x0503     Bus Timing Register 1
CBTR1.SAMP             7   Sampling
CBTR1.TSEG22           6   Time Segment22
CBTR1.TSEG21           5   Time Segment21
CBTR1.TSEG20           4   Time Segment20
CBTR1.TSEG13           3   Time Segment13
CBTR1.TSEG12           2   Time Segment12
CBTR1.TSEG11           1   Time Segment11
CBTR1.TSEG10           0   Time Segment10
CRFLG                 0x0504     Receiver Flag Register
CRFLG.WUPIF            7   Wakeup Interrupt Flag
CRFLG.RWRNIF           6   Receiver Warning Interrupt Flag
CRFLG.TWRNIF           5   Transmitter Warning Interrupt Flag
CRFLG.RERRIF           4   Receiver Error Passive Interrupt Flag
CRFLG.TERRIF           3   Transmitter Error Passive Interrupt Flag
CRFLG.BOFFIF           2   Bus-Off Interrupt Flag
CRFLG.OVRIF            1   Overrun Interrupt Flag
CRFLG.RXF              0   Receive Buffer Full
CRIER                 0x0505     Receiver Interrupt Enable Register
CRIER.WUPIE            7   Wakeup Interrupt Enable
CRIER.RWRNIE           6   Receiver Warning Interrupt Enable
CRIER.TWRNIE           5   Transmitter Warning Interrupt Enable
CRIER.RERRIE           4   Receiver Error Passive Interrupt Enable
CRIER.TERRIE           3   Transmitter Error Passive Interrupt Enable
CRIER.BOFFIE           2   Bus-Off Interrupt Enable
CRIER.OVRIE            1   Overrun Interrupt Enable
CRIER.RXFIE            0   Receiver Full Interrupt Enable
CTFLG                 0x0506     Transmitter Flag Register
CTFLG.ABTAK2           6   Abort Acknowledge 2
CTFLG.ABTAK1           5   Abort Acknowledge 1
CTFLG.ABTAK0           4   Abort Acknowledge 0
CTFLG.TXE2             2   Transmitter Empty 2
CTFLG.TXE1             1   Transmitter Empty 1
CTFLG.TXE0             0   Transmitter Empty 0
CTCR                  0x0507     Transmitter Control Register
CTCR.ABTRQ2            6   Abort Request 2
CTCR.ABTRQ1            5   Abort Request 1
CTCR.ABTRQ0            4   Abort Request 0
CTCR.TXEIE2            2   Transmitter Empty Interrupt Enable 2
CTCR.TXEIE1            1   Transmitter Empty Interrupt Enable 1
CTCR.TXEIE0            0   Transmitter Empty Interrupt Enable 0
CIDAC                 0x0508     Identifier Acceptance Control Register
CIDAC.IDAM1            5   Identifier Acceptance Mode 1
CIDAC.IDAM0            4   Identifier Acceptance Mode 0
CIDAC.IDHIT1           1   Identifier Acceptance Hit Indicator 1
CIDAC.IDHIT0           0   Identifier Acceptance Hit Indicator 0
CRXERR                0x050E     Receiver Error Counter
CRXERR.RXERR7          7
CRXERR.RXERR6          6
CRXERR.RXERR5          5
CRXERR.RXERR4          4
CRXERR.RXERR3          3
CRXERR.RXERR2          2
CRXERR.RXERR1          1
CRXERR.RXERR0          0
CTXERR                0x050F     Transmit Error Counter
CTXERR.TXERR7          7
CTXERR.TXERR6          6
CTXERR.TXERR5          5
CTXERR.TXERR4          4
CTXERR.TXERR3          3
CTXERR.TXERR2          2
CTXERR.TXERR1          1
CTXERR.TXERR0          0
CIDAR0                0x0510     Identifier Acceptance Registers 0
CIDAR0.AC7             7   Acceptance Code Bits 7
CIDAR0.AC6             6   Acceptance Code Bits 6
CIDAR0.AC5             5   Acceptance Code Bits 5
CIDAR0.AC4             4   Acceptance Code Bits 4
CIDAR0.AC3             3   Acceptance Code Bits 3
CIDAR0.AC2             2   Acceptance Code Bits 2
CIDAR0.AC1             1   Acceptance Code Bits 1
CIDAR0.AC0             0   Acceptance Code Bits 0
CIDAR1                0x0511     Identifier Acceptance Registers 1
CIDAR1.AC7             7   Acceptance Code Bits 7
CIDAR1.AC6             6   Acceptance Code Bits 6
CIDAR1.AC5             5   Acceptance Code Bits 5
CIDAR1.AC4             4   Acceptance Code Bits 4
CIDAR1.AC3             3   Acceptance Code Bits 3
CIDAR1.AC2             2   Acceptance Code Bits 2
CIDAR1.AC1             1   Acceptance Code Bits 1
CIDAR1.AC0             0   Acceptance Code Bits 0
CIDAR2                0x0512     Identifier Acceptance Registers 2
CIDAR2.AC7             7   Acceptance Code Bits 7
CIDAR2.AC6             6   Acceptance Code Bits 6
CIDAR2.AC5             5   Acceptance Code Bits 5
CIDAR2.AC4             4   Acceptance Code Bits 4
CIDAR2.AC3             3   Acceptance Code Bits 3
CIDAR2.AC2             2   Acceptance Code Bits 2
CIDAR2.AC1             1   Acceptance Code Bits 1
CIDAR2.AC0             0   Acceptance Code Bits 0
CIDAR3                0x0513     Identifier Acceptance Registers 3
CIDAR3.AC7             7   Acceptance Code Bits 7
CIDAR3.AC6             6   Acceptance Code Bits 6
CIDAR3.AC5             5   Acceptance Code Bits 5
CIDAR3.AC4             4   Acceptance Code Bits 4
CIDAR3.AC3             3   Acceptance Code Bits 3
CIDAR3.AC2             2   Acceptance Code Bits 2
CIDAR3.AC1             1   Acceptance Code Bits 1
CIDAR3.AC0             0   Acceptance Code Bits 0
CIDMRO                0x0514     Identifier Mask Registers 0
CIDMRO.AM7             7   Acceptance Mask Bits 7
CIDMRO.AM6             6   Acceptance Mask Bits 6
CIDMRO.AM5             5   Acceptance Mask Bits 5
CIDMRO.AM4             4   Acceptance Mask Bits 4
CIDMRO.AM3             3   Acceptance Mask Bits 3
CIDMRO.AM2             2   Acceptance Mask Bits 2
CIDMRO.AM1             1   Acceptance Mask Bits 1
CIDMRO.AM0             0   Acceptance Mask Bits 0
CIDMR1                0x0515     Identifier Mask Registers 1
CIDMR1.AM7             7   Acceptance Mask Bits 7
CIDMR1.AM6             6   Acceptance Mask Bits 6
CIDMR1.AM5             5   Acceptance Mask Bits 5
CIDMR1.AM4             4   Acceptance Mask Bits 4
CIDMR1.AM3             3   Acceptance Mask Bits 3
CIDMR1.AM2             2   Acceptance Mask Bits 2
CIDMR1.AM1             1   Acceptance Mask Bits 1
CIDMR1.AM0             0   Acceptance Mask Bits 0
CIDMR2                0x0516     Identifier Mask Registers 2
CIDMR2.AM7             7   Acceptance Mask Bits 7
CIDMR2.AM6             6   Acceptance Mask Bits 6
CIDMR2.AM5             5   Acceptance Mask Bits 5
CIDMR2.AM4             4   Acceptance Mask Bits 4
CIDMR2.AM3             3   Acceptance Mask Bits 3
CIDMR2.AM2             2   Acceptance Mask Bits 2
CIDMR2.AM1             1   Acceptance Mask Bits 1
CIDMR2.AM0             0   Acceptance Mask Bits 0
CIDMR3                0x0517     Identifier Mask Registers 3
CIDMR3.AM7             7   Acceptance Mask Bits 7
CIDMR3.AM6             6   Acceptance Mask Bits 6
CIDMR3.AM5             5   Acceptance Mask Bits 5
CIDMR3.AM4             4   Acceptance Mask Bits 4
CIDMR3.AM3             3   Acceptance Mask Bits 3
CIDMR3.AM2             2   Acceptance Mask Bits 2
CIDMR3.AM1             1   Acceptance Mask Bits 1
CIDMR3.AM0             0   Acceptance Mask Bits 0
IDR0                  0x05B0     IDENTIFIER REGISTER 0
IDR0.ID28	       7   
IDR0.ID27	       6   
IDR0.ID26	       5   
IDR0.ID25	       4   
IDR0.ID24	       3   
IDR0.ID23	       2   
IDR0.ID22	       1   
IDR0.ID21	       0   
IDR1                  0x05B1     IDENTIFIER REGISTER 1
IDR1.ID20              7   
IDR1.ID19              6   
IDR1.ID18              5   
IDR1.SRR               4   Substitute Remote Request
IDR1.IDE               3   ID Extended
IDR1.ID17              2   
IDR1.ID16              1   
IDR1.ID15              0   
IDR2                  0x05B2     IDENTIFIER REGISTER 2
IDR2.ID14              7   
IDR2.ID13              6   
IDR2.ID12              5   
IDR2.ID11              4   
IDR2.ID10              3   
IDR2.ID9               2   
IDR2.ID8               1   
IDR2.ID7               0   
IDR3                  0x05B3     IDENTIFIER REGISTER 3
IDR3.ID6               7   
IDR3.ID5               6   
IDR3.ID4               5   
IDR3.ID3               4   
IDR3.ID2               3   
IDR3.ID1               2   
IDR3.ID0               1   
IDR3.RTR               0   Remote Transmission Request
DSR0                  0x05B4     DATA SEGMENT REGISTER 0
DSR0.DB7               7
DSR0.DB6               6
DSR0.DB5               5
DSR0.DB4               4
DSR0.DB3               3
DSR0.DB2               2
DSR0.DB1               1
DSR0.DB0               0
DSR1                  0x05B5     DATA SEGMENT REGISTER 1
DSR1.DB7               7
DSR1.DB6               6
DSR1.DB5               5
DSR1.DB4               4
DSR1.DB3               3
DSR1.DB2               2
DSR1.DB1               1
DSR1.DB0               0
DSR2                  0x05B6     DATA SEGMENT REGISTER 2
DSR2.DB7               7
DSR2.DB6               6
DSR2.DB5               5
DSR2.DB4               4
DSR2.DB3               3
DSR2.DB2               2
DSR2.DB1               1
DSR2.DB0               0
DSR3                  0x05B7     DATA SEGMENT REGISTER 3
DSR3.DB7               7
DSR3.DB6               6
DSR3.DB5               5
DSR3.DB4               4
DSR3.DB3               3
DSR3.DB2               2
DSR3.DB1               1
DSR3.DB0               0
DSR4                  0x05B8     DATA SEGMENT REGISTER 4
DSR4.DB7               7
DSR4.DB6               6
DSR4.DB5               5
DSR4.DB4               4
DSR4.DB3               3
DSR4.DB2               2
DSR4.DB1               1
DSR4.DB0               0
DSR5                  0x05B9     DATA SEGMENT REGISTER 5
DSR5.DB7               7
DSR5.DB6               6
DSR5.DB5               5
DSR5.DB4               4
DSR5.DB3               3
DSR5.DB2               2
DSR5.DB1               1
DSR5.DB0               0
DSR6                  0x05BA     DATA SEGMENT REGISTER 6
DSR6.DB7               7
DSR6.DB6               6
DSR6.DB5               5
DSR6.DB4               4
DSR6.DB3               3
DSR6.DB2               2
DSR6.DB1               1
DSR6.DB0               0
DSR7                  0x05BB     DATA SEGMENT REGISTER 7
DSR7.DB7               7
DSR7.DB6               6
DSR7.DB5               5
DSR7.DB4               4
DSR7.DB3               3
DSR7.DB2               2
DSR7.DB1               1
DSR7.DB0               0
DLR                   0x05BC     DATA LENGTH REGISTER
DLR.DLC3               3   Data Length Code Bits 3
DLR.DLC2               2   Data Length Code Bits 2
DLR.DLC1               1   Data Length Code Bits 1
DLR.DLC0               0   Data Length Code Bits 0
TBPR                  0x05BD     TRANSMIT BUFFER PRIORITY REGISTER
TBPR.PRIO7             7   Local Priority 7
TBPR.PRIO6             6   Local Priority 6
TBPR.PRIO5             5   Local Priority 5
TBPR.PRIO4             4   Local Priority 4
TBPR.PRIO3             3   Local Priority 3
TBPR.PRIO2             2   Local Priority 2
TBPR.PRIO1             1   Local Priority 1
TBPR.PRIO0             0   Local Priority 0
UNUSED05BE            0x05BE     UNUSED
UNUSED05BF            0x05BF     UNUSED
SBSR                  0xFE00     SIM Break Status Register
SBSR.SBSW              1         SIM Break Stop/Wait
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Bit
SRSR.PIN               6   External Reset Bit
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit (opcode fetches only)
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
RESERVFE09            0xFE09     RESERVED
RESERVFE0B            0xFE0B     RESERVED
BRKH                  0xFE0C     Break Address Register High
BRKL                  0xFE0D     Break Address Register Low
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
LVISR                 0xFE0F     LVI Status Register
LVISR.LVIOUT           7   LVI Output Bit
RESERVFE11            0xFE11     RESERVED
EENVR2                0xFE18     EEPROM-2 Nonvolatile Register (EENVR2)
EENVR2.EERA            7   EEPROM Redundant Array
EENVR2.CON2            6   MCU Configuration Bits 2
EENVR2.CON1            5   MCU Configuration Bits 1
EENVR2.EEPRTCT         4   EEPROM Protection (0x08F0-0x08FF)
EENVR2.EEBP3           3   EEPROM Block Protection Bits 3
EENVR2.EEBP2           2   EEPROM Block Protection Bits 2
EENVR2.EEBP1           1   EEPROM Block Protection Bits 1
EENVR2.EEBP0           0   EEPROM Block Protection Bits 0
EECR2                 0xFE19     EEPROM-2 Control Register (EECR2)
EECR2.EEBCLK           7   EEPROM Bus Clock Enable
EECR2.EEOFF            5   EEPROM Power Down
EECR2.EERAS1           4   EERAS1 - Erase Bits 1
EECR2.EERAS0           3   EERAS0 - Erase Bits 0
EECR2.EELAT            2   EEPROM Latch Control
EECR2.EEPGM            0   EEPROM Program/Erase Enable
ReservFE1A            0xFE1A     RESERVED
EEACR2                0xFE1B     EEPROM Array Control Register
EEACR2.EERA            7   EEPROM Redundant Array
EEACR2.CON2            6   MCU Configuration Bits 2
EEACR2.CON1            5   MCU Configuration Bits 1
EEACR2.EEPRTCT         4   EEPROM Protection (0x08F0-0x08FF)
EEACR2.EEBP3           3   EEPROM Block Protection Bits 3
EEACR2.EEBP2           2   EEPROM Block Protection Bits 2
EEACR2.EEBP1           1   EEPROM Block Protection Bits 1
EEACR2.EEBP0           0   EEPROM Block Protection Bits 0
EENVR1                0xFE1C     EEPROM-1 Nonvolatile Register (EENVR1)
EENVR1.EERA            7   EEPROM Redundant Array
EENVR1.CON2            6   MCU Configuration Bits 2
EENVR1.CON1            5   MCU Configuration Bits 1
EENVR1.EEPRTCT         4   EEPROM Protection (0x08F0-0x08FF)
EENVR1.EEBP3           3   EEPROM Block Protection Bits 3
EENVR1.EEBP2           2   EEPROM Block Protection Bits 2
EENVR1.EEBP1           1   EEPROM Block Protection Bits 1
EENVR1.EEBP0           0   EEPROM Block Protection Bits 0
EECR1                 0xFE1D     EEPROM-1 Control Register (EECR1)
EECR1.EEBCLK           7   EEPROM Bus Clock Enable
EECR1.EEOFF            5   EEPROM Power Down
EECR1.EERAS1           4   Erase Bits 1
EECR1.EERAS0           3   Erase Bits 0
EECR1.EELAT            2   EEPROM Latch Control
EECR1.EEPGM            0   EEPROM Program/Erase Enable
ReservFE1E            0xFE1E     RESERVED
EEACR1                0xFE1F     EEPROM-1 Array Control Register (EEACR1)
EEACR1.EERA            7   EEPROM Redundant Array
EEACR1.CON2            6   EEPROM Redundant Array 2
EEACR1.CON1            5   EEPROM Redundant Array 1
EEACR1.EEPRTCT         4   EEPROM Protection (0x08F0-0x08FF)
EEACR1.EEBP3           3   EEPROM Block Protection Bits 3
EEACR1.EEBP2           2   EEPROM Block Protection Bits 2
EEACR1.EEBP1           1   EEPROM Block Protection Bits 1
EEACR1.EEBP0           0   EEPROM Block Protection Bits 0
RESERVFF80            0xFF80     RESERVED
RESERVFF81            0xFF81     RESERVED
COPCTL                0xFFFF     COP Control Register


.68HC08BD24
; MC68HC08BD24/D  http://
; MC68HC08BD24.pdf

; RAM=512 
; ROM=25088
; EPROM=0
; EEPROM=0


; MEMORY MAP
area DATA FSR		   0x0000:0x0060
area BSS  UNIMPLEMENTED	   0x0060:0x0080
area DATA RAM		   0x0080:0x0280
area BSS  UNIMPLEMENTED	   0x0280:0x9C00
area DATA ROM_1		   0x9C00:0xFC00
area DATA ROM_2		   0xFC00:0xFE00
area DATA FSR_1		   0xFE00:0xFE10
area DATA Monitor_ROM	   0xFE10:0xFFE6
area DATA USER_VEC	   0xFFE6:0x10000


; Interrupt and reset vector assignments
interrupt __RESET            0xFFFE         Reset Vector
interrupt SWI                0xFFFC         SWI Vector
interrupt IRQ                0xFFFA         IRQ Vector
interrupt DDC12AB            0xFFF6         DDC12AB Vector
interrupt TIM_CH0            0xFFF2         TIM Channel 0 Vector
interrupt TIM_CH1            0xFFF0         TIM Channel 1 Vector
interrupt TIM                0xFFEE         TIM Overflow Vector
interrupt SPV                0xFFEC         Sync Processor Vector
interrupt ADC                0xFFE8         ADC Interrupt Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bit 7
PTA.PTA6               6   Port A Data Bit 6
PTA.PTA5               5   Port A Data Bit 5
PTA.PTA4               4   Port A Data Bit 4
PTA.PTA3               3   Port A Data Bit 3
PTA.PTA2               2   Port A Data Bit 2
PTA.PTA1               1   Port A Data Bit 1
PTA.PTA0               0   Port A Data Bit 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bit 7
PTB.PTB6               6   Port B Data Bit 6
PTB.PTB5               5   Port B Data Bit 5
PTB.PTB4               4   Port B Data Bit 4
PTB.PTB3               3   Port B Data Bit 3
PTB.PTB2               2   Port B Data Bit 2
PTB.PTB1               1   Port B Data Bit 1
PTB.PTB0               0   Port B Data Bit 0
PTC                   0x0002     Port C Data Register
PTC.PTC5               5   Port C Data Bit 5
PTC.PTC4               4   Port C Data Bit 4
PTC.PTC3               3   Port C Data Bit 3
PTC.PTC2               2   Port C Data Bit 2
PTC.PTC1               1   Port C Data Bit 1
PTC.PTC0               0   Port C Data Bit 0
PTD                   0x0003     Port D Data Register
PTD.PTD6               6   Port D Data Bit 6
PTD.PTD5               5   Port D Data Bit 5
PTD.PTD4               4   Port D Data Bit 4
PTD.PTD3               3   Port D Data Bit 3
PTD.PTD2               2   Port D Data Bit 2
PTD.PTD1               1   Port D Data Bit 1
PTD.PTD0               0   Port D Data Bit 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bit 7
DDRA.DDRA6             6   Data Direction Register A Bit 6
DDRA.DDRA5             5   Data Direction Register A Bit 5
DDRA.DDRA4             4   Data Direction Register A Bit 4
DDRA.DDRA3             3   Data Direction Register A Bit 3
DDRA.DDRA2             2   Data Direction Register A Bit 2
DDRA.DDRA1             1   Data Direction Register A Bit 1
DDRA.DDRA0             0   Data Direction Register A Bit 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bit 7
DDRB.DDRB6             6   Data Direction Register B Bit 6
DDRB.DDRB5             5   Data Direction Register B Bit 5
DDRB.DDRB4             4   Data Direction Register B Bit 4
DDRB.DDRB3             3   Data Direction Register B Bit 3
DDRB.DDRB2             2   Data Direction Register B Bit 2
DDRB.DDRB1             1   Data Direction Register B Bit 1
DDRB.DDRB0             0   Data Direction Register B Bit 0
DDRC                  0x0006     Data Direction Register C
DDRC.DDRC5             5   Data Direction Register C Bit 5
DDRC.DDRC4             4   Data Direction Register C Bit 4
DDRC.DDRC3             3   Data Direction Register C Bit 3
DDRC.DDRC2             2   Data Direction Register C Bit 2
DDRC.DDRC1             1   Data Direction Register C Bit 1
DDRC.DDRC0             0   Data Direction Register C Bit 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD6             6   Data Direction Register D Bit 6
DDRD.DDRD5             5   Data Direction Register D Bit 5
DDRD.DDRD4             4   Data Direction Register D Bit 4
DDRD.DDRD3             3   Data Direction Register D Bit 3
DDRD.DDRD2             2   Data Direction Register D Bit 2
DDRD.DDRD1             1   Data Direction Register D Bit 1
DDRD.DDRD0             0   Data Direction Register D Bit 0
PTE                   0x0008     Port E Data Register
PTE.PTE2               2   Port E Data Bit 2
PTE.PTE1               1   Port E Data Bit 1
PTE.PTE0               0   Port E Data Bit 0
DDRE                  0x0009     Data Direction Register E
DDRE.DDRE2             2   Data Direction Register E Bit 2
DDRE.DDRE1             1   Data Direction Register E Bit 1
DDRE.DDRE0             0   Data Direction Register E Bit 0
TSC                   0x000A     TIM Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
UNUSED000B            0x000B     UNUSED
TCNTH                 0x000C     TIM Counter Register High
TCNTL                 0x000D     TIM Counter Register Low
TMODH                 0x000E     TIM Counter Modulo Register High
TMODL                 0x000F     TIM Counter Modulo Register Low
TSC0                  0x0010     TIM Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit
TSC0.MS0B              5   Mode Select Bit B
TSC0.MS0A              4   Mode Select Bit A
TSC0.ELS0B             3   Edge/Level Select Bits
TSC0.ELS0A             2   Edge/Level Select Bits
TSC0.TOV0              1   Toggle-On-Overflow Bit
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0011     TIM Channel 0 Register High
TCH0L                 0x0012     TIM Channel 0 Register Low
TSC1                  0x0013     TIM Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 1 Flag Bit            
TSC1.CH1IE             6   Channel 1 Interrupt Enable Bit
TSC1.MS1A              4   Mode Select Bit A               
TSC1.ELS1B             3   Edge/Level Select Bits          
TSC1.ELS1A             2   Edge/Level Select Bits          
TSC1.TOV1              1   Toggle-On-Overflow Bit          
TSC1.CH1MAX            0   Channel 1 Maximum Duty Cycle Bit
TCH1H                 0x0014     TIM Channel 1 Register High
TCH1L                 0x0015     TIM Channel 1 Register Low
DMCR                  0x0016     DDC Master Control Register
DMCR.ALIF              7   DDC Arbitration Lost Interrupt Flag
DMCR.NAKIF             6   No Acknowledge Interrupt Flag
DMCR.BB                5   Bus Busy Flag
DMCR.MAST              4   Master Control Bit
DMCR.MRW               3   Master Read/Write
DMCR.BR2               2   Baud Rate Select 2
DMCR.BR1               1   Baud Rate Select 1
DMCR.BR0               0   Baud Rate Select 0
DADR                  0x0017     DDC Address Register
DADR.DAD7              7   DDC Address 7
DADR.DAD6              6   DDC Address 6
DADR.DAD5              5   DDC Address 5
DADR.DAD4              4   DDC Address 4
DADR.DAD3              3   DDC Address 3
DADR.DAD2              2   DDC Address 2
DADR.DAD1              1   DDC Address 1
DADR.EXTAD             0   DDC Expanded Address
DCR                   0x0018     DDC Control Register
DCR.DEN                7   DDC Enable
DCR.DIEN               6   DDC Interrupt Enable
DCR.TXAK               3   Transmit Acknowledge Enable
DCR.SCLIEN             2   SCL Interrupt Enable
DCR.DDC1EN             1   DDC1 Protocol Enable
DSR                   0x0019     DDC Status Register
DSR.RXIF               7   DDC Receive Interrupt Flag
DSR.TXIF               6   DDC Transmit Interrupt Flag
DSR.MATCH              5   DDC Address Match
DSR.SRW                4   DDC Slave Read/Write
DSR.RXAK               3   DDC Receive Acknowledge
DSR.SCLIF              2   SCL Interrupt Flag
DSR.TXBE               1   DDC Transmit Buffer Empty
DSR.RXBF               0   DDC Receive Buffer Full
DDTR                  0x001A     DDC Data Transmit Register
DDTR.DTD7              7
DDTR.DTD6              6
DDTR.DTD5              5
DDTR.DTD4              4
DDTR.DTD3              3
DDTR.DTD2              2
DDTR.DTD1              1
DDTR.DTD0              0
DDRR                  0x001B     DDC Data Receive Register
DDRR.DRD7              7
DDRR.DRD6              6
DDRR.DRD5              5
DDRR.DRD4              4
DDRR.DRD3              3
DDRR.DRD2              2
DDRR.DRD1              1
DDRR.DRD0              0
D2ADR                 0x001C     DDC2 Address Register
D2ADR.D2AD7            7   DDC2 Address 7
D2ADR.D2AD6            6   DDC2 Address 6
D2ADR.D2AD5            5   DDC2 Address 5
D2ADR.D2AD4            4   DDC2 Address 4
D2ADR.D2AD3            3   DDC2 Address 3
D2ADR.D2AD2            2   DDC2 Address 2
D2ADR.D2AD1            1   DDC2 Address 1
CONFIG0               0x001D     Configuration Register 0
CONFIG0.HSYNCOE        7   VSYNCO Enable
CONFIG0.VSYNCOE        6   VSYNCO Enable
CONFIG0.SOGE           5   SOG Enable
INTSCR                0x001E     IRQ Status and Control Register
INTSCR.IRQF            3   IRQ Flag Bit
INTSCR.ACK             2   IRQ Interrupt Request Acknowledge Bit
INTSCR.IMASK           1   IRQ Interrupt Mask Bit
INTSCR.MODE            0   IRQ Edge/Level Select Bit
CONFIG1               0x001F     Configuration Register 1
CONFIG1.SSREC          3   Short Stop Recovery Bit
CONFIG1.COPRS          2   COP Rate Select Bit
CONFIG1.STOP           1   STOP Instruction Enable Bit
CONFIG1.COPD           0   COP Disable Bit
0PWM                  0x0020     PWM0 Data Register
0PWM.0PWM4             7   PWM Bit 4
0PWM.0PWM3             6   PWM Bit 3
0PWM.0PWM2             5   PWM Bit 2
0PWM.0PWM1             4   PWM Bit 1
0PWM.0PWM0             3   PWM Bit 0
0PWM.0BRM2             2   Binary Rate Multiplier Bit 2
0PWM.0BRM1             1   Binary Rate Multiplier Bit 1
0PWM.0BRM0             0   Binary Rate Multiplier Bit 0
1PWM                  0x0021     PWM1 Data Register
1PWM.1PWM4             7   PWM Bit 4                   
1PWM.1PWM3             6   PWM Bit 3                   
1PWM.1PWM2             5   PWM Bit 2                   
1PWM.1PWM1             4   PWM Bit 1                   
1PWM.1PWM0             3   PWM Bit 0                   
1PWM.1BRM2             2   Binary Rate Multiplier Bit 2
1PWM.1BRM1             1   Binary Rate Multiplier Bit 1
1PWM.1BRM0             0   Binary Rate Multiplier Bit 0
2PWM                  0x0022     PWM2 Data Register
2PWM.2PWM4             7   PWM Bit 4                   
2PWM.2PWM3             6   PWM Bit 3                   
2PWM.2PWM2             5   PWM Bit 2                   
2PWM.2PWM1             4   PWM Bit 1                   
2PWM.2PWM0             3   PWM Bit 0                   
2PWM.2BRM2             2   Binary Rate Multiplier Bit 2
2PWM.2BRM1             1   Binary Rate Multiplier Bit 1
2PWM.2BRM0             0   Binary Rate Multiplier Bit 0
3PWM                  0x0023     PWM3 Data Register
3PWM.3PWM4             7   PWM Bit 4                   
3PWM.3PWM3             6   PWM Bit 3                   
3PWM.3PWM2             5   PWM Bit 2                   
3PWM.3PWM1             4   PWM Bit 1                   
3PWM.3PWM0             3   PWM Bit 0                   
3PWM.3BRM2             2   Binary Rate Multiplier Bit 2
3PWM.3BRM1             1   Binary Rate Multiplier Bit 1
3PWM.3BRM0             0   Binary Rate Multiplier Bit 0
4PWM                  0x0024     PWM4 Data Register
4PWM.4PWM4             7   PWM Bit 4                   
4PWM.4PWM3             6   PWM Bit 3                   
4PWM.4PWM2             5   PWM Bit 2                   
4PWM.4PWM1             4   PWM Bit 1                   
4PWM.4PWM0             3   PWM Bit 0                   
4PWM.4BRM2             2   Binary Rate Multiplier Bit 2
4PWM.4BRM1             1   Binary Rate Multiplier Bit 1
4PWM.4BRM0             0   Binary Rate Multiplier Bit 0
5PWM                  0x0025     PWM5 Data Register
5PWM.5PWM4             7   PWM Bit 4                   
5PWM.5PWM3             6   PWM Bit 3                   
5PWM.5PWM2             5   PWM Bit 2                   
5PWM.5PWM1             4   PWM Bit 1                   
5PWM.5PWM0             3   PWM Bit 0                   
5PWM.5BRM2             2   Binary Rate Multiplier Bit 2
5PWM.5BRM1             1   Binary Rate Multiplier Bit 1
5PWM.5BRM0             0   Binary Rate Multiplier Bit 0
6PWM                  0x0026     PWM6 Data Register
6PWM.6PWM4             7   PWM Bit 4                   
6PWM.6PWM3             6   PWM Bit 3                   
6PWM.6PWM2             5   PWM Bit 2                   
6PWM.6PWM1             4   PWM Bit 1                   
6PWM.6PWM0             3   PWM Bit 0                   
6PWM.6BRM2             2   Binary Rate Multiplier Bit 2
6PWM.6BRM1             1   Binary Rate Multiplier Bit 1
6PWM.6BRM0             0   Binary Rate Multiplier Bit 0
7PWM                  0x0027     PWM7 Data Register
7PWM.7PWM4             7   PWM Bit 4                   
7PWM.7PWM3             6   PWM Bit 3                   
7PWM.7PWM2             5   PWM Bit 2                   
7PWM.7PWM1             4   PWM Bit 1                   
7PWM.7PWM0             3   PWM Bit 0                   
7PWM.7BRM2             2   Binary Rate Multiplier Bit 2
7PWM.7BRM1             1   Binary Rate Multiplier Bit 1
7PWM.7BRM0             0   Binary Rate Multiplier Bit 0
PWMCR1                0x0028     PWM Control Register 1
PWMCR1.PWM7E           7   PWM Output Enable 7
PWMCR1.PWM6E           6   PWM Output Enable 6
PWMCR1.PWM5E           5   PWM Output Enable 5
PWMCR1.PWM4E           4   PWM Output Enable 4
PWMCR1.PWM3E           3   PWM Output Enable 3
PWMCR1.PWM2E           2   PWM Output Enable 2
PWMCR1.PWM1E           1   PWM Output Enable 1
PWMCR1.PWM0E           0   PWM Output Enable 0
RESERV0029            0x0029     RESERVED
RESERV002A            0x002A     RESERVED
RESERV002B            0x002B     RESERVED
RESERV002C            0x002C     RESERVED
RESERV002D            0x002D     RESERVED
RESERV002E            0x002E     RESERVED
RESERV002F            0x002F     RESERVED
RESERV0030            0x0030     RESERVED
RESERV0031            0x0031     RESERVED
RESERV0032            0x0032     RESERVED
RESERV0033            0x0033     RESERVED
RESERV0034            0x0034     RESERVED
RESERV0035            0x0035     RESERVED
RESERV0036            0x0036     RESERVED
RESERV0037            0x0037     RESERVED
RESERV0038            0x0038     RESERVED
RESERV0039            0x0039     RESERVED
RESERV003A            0x003A     RESERVED
RESERV003B            0x003B     RESERVED
RESERV003C            0x003C     RESERVED
RESERV003D            0x003D     RESERVED
RESERV003E            0x003E     RESERVED
RESERV003F            0x003F     RESERVED
SPCSR                 0x0040     Sync Processor Control and Status Register
SPCSR.VSIE             7   VSync Interrupt Enable
SPCSR.VEDGE            6   VSync Interrupt Edge Select
SPCSR.VSIF             5   VSync Interrupt Flag
SPCSR.COMP             4   Composite Sync Input Enable
SPCSR.VINVO            3   VSYNCO Signal Polarity
SPCSR.HINVO            2   HSYNCO Signal Polarity
SPCSR.VPOL             1   Vsync Input Polarity
SPCSR.HPOL             0   Hsync Input Polarity
VFHR                  0x0041     Vertical Frequency High Register
VFHR.VOF               7   Vertical Frequency Counter Overflow
VFHR.CPW1              6   Clamp Pulse Width 1
VFHR.CPW0              5   Clamp Pulse Width 0
VFHR.VF12              4   Vertical Frame Frequency 12
VFHR.VF11              3   Vertical Frame Frequency 11
VFHR.VF10              2   Vertical Frame Frequency 10
VFHR.VF9               1   Vertical Frame Frequency 9
VFHR.VF8               0   Vertical Frame Frequency 8
VFLR                  0x0042     Vertical Frequency Low Register
VFLR.VF7               7   Vertical Frame Frequency 7
VFLR.VF6               6   Vertical Frame Frequency 6
VFLR.VF5               5   Vertical Frame Frequency 5
VFLR.VF4               4   Vertical Frame Frequency 4
VFLR.VF3               3   Vertical Frame Frequency 3
VFLR.VF2               2   Vertical Frame Frequency 2
VFLR.VF1               1   Vertical Frame Frequency 1
VFLR.VF0               0   Vertical Frame Frequency 0
HFHR                  0x0043     Hsync Frequency High Register
HFHR.HFH7              7   Horizontal Line Frequency 7
HFHR.HFH6              6   Horizontal Line Frequency 6
HFHR.HFH5              5   Horizontal Line Frequency 5
HFHR.HFH4              4   Horizontal Line Frequency 4
HFHR.HFH3              3   Horizontal Line Frequency 3
HFHR.HFH2              2   Horizontal Line Frequency 2
HFHR.HFH1              1   Horizontal Line Frequency 1
HFHR.HFH0              0   Horizontal Line Frequency 0
HFLR                  0x0044     Hsync Frequency Low Register
HFLR.HOVER             7   Hsync Frequency Counter Overflow
HFLR.HFL4              4   Horizontal Line Frequency 4
HFLR.HFL3              3   Horizontal Line Frequency 3
HFLR.HFL2              2   Horizontal Line Frequency 2
HFLR.HFL1              1   Horizontal Line Frequency 1
HFLR.HFL0              0   Horizontal Line Frequency 0
SPIOCR                0x0045     Sync Processor I_O Control Register
SPIOCR.VSYNCS          7   VSYNC Input State
SPIOCR.HSYNCS          6   HSYNC Input State
SPIOCR.COINV           5   Clamp Output Invert
SPIOCR.SOGSEL          3   SOG Select
SPIOCR.CLAMPOE         2   Clamp Output Enable
SPIOCR.BPOR            1   Back Porch
SPIOCR.SOUT            0   Sync Output Enable
SPCR1                 0x0046     Sync Processor Control Register 1
SPCR1.LVSIE            7   Low VSync Interrupt Enable
SPCR1.LVSIF            6   Low VSync Interrupt Flag
SPCR1.HPS1             5   HSYNC input Detection Pulse Width 1
SPCR1.HPS0             4   HSYNC input Detection Pulse Width 0
SPCR1.ATPOL            1   Auto Polarity
SPCR1.FSHF             0   Fast Horizontal Frequency Count
HVOCR                 0x0047     H&V Sync Output Control Register
HVOCR.HVOCR2           2   H&V Output Select Bits 2
HVOCR.HVOCR1           1   H&V Output Select Bits 1
HVOCR.HVOCR0           0   H&V Output Select Bits 0
PDCR                  0x0049     Port D Configuration Register
PDCR.CLAMPE            4   CLAMP Pin Enable
PDCR.DDCSCLE           3   DDC Clock Pin Enable
PDCR.DDCDATE           2   DDC Data Pin Enable
RESERV004A            0x004A     RESERVED
RESERV004B            0x004B     RESERVED
RESERV004C            0x004C     RESERVED
RESERV004D            0x004D     RESERVED
RESERV004E            0x004E     RESERVED
RESERV004F            0x004F     RESERVED
8PWM                  0x0051     PWM8 Data Register
8PWM.8PWM4             7   PWM Bit 4                   
8PWM.8PWM3             6   PWM Bit 3                   
8PWM.8PWM2             5   PWM Bit 2                   
8PWM.8PWM1             4   PWM Bit 1                   
8PWM.8PWM0             3   PWM Bit 0                   
8PWM.8BRM2             2   Binary Rate Multiplier Bit 2
8PWM.8BRM1             1   Binary Rate Multiplier Bit 1
8PWM.8BRM0             0   Binary Rate Multiplier Bit 0
9PWM                  0x0052     PWM9 Data Register
9PWM.9PWM4             7   PWM Bit 4                   
9PWM.9PWM3             6   PWM Bit 3                   
9PWM.9PWM2             5   PWM Bit 2                   
9PWM.9PWM1             4   PWM Bit 1                   
9PWM.9PWM0             3   PWM Bit 0                   
9PWM.9BRM2             2   Binary Rate Multiplier Bit 2
9PWM.9BRM1             1   Binary Rate Multiplier Bit 1
9PWM.9BRM0             0   Binary Rate Multiplier Bit 0
10PWM                 0x0053     PWM10 Data Register
10PWM.10PWM4           7   PWM Bit 4                   
10PWM.10PWM3           6   PWM Bit 3                   
10PWM.10PWM2           5   PWM Bit 2                   
10PWM.10PWM1           4   PWM Bit 1                   
10PWM.10PWM0           3   PWM Bit 0                   
10PWM.10BRM2           2   Binary Rate Multiplier Bit 2
10PWM.10BRM1           1   Binary Rate Multiplier Bit 1
10PWM.10BRM0           0   Binary Rate Multiplier Bit 0
11PWM                 0x0054     PWM11 Data Register
11PWM.11PWM4           7   PWM Bit 4                   
11PWM.11PWM3           6   PWM Bit 3                   
11PWM.11PWM2           5   PWM Bit 2                   
11PWM.11PWM1           4   PWM Bit 1                   
11PWM.11PWM0           3   PWM Bit 0                   
11PWM.11BRM2           2   Binary Rate Multiplier Bit 2
11PWM.11BRM1           1   Binary Rate Multiplier Bit 1
11PWM.11BRM0           0   Binary Rate Multiplier Bit 0
12PWM                 0x0055     PWM12 Data Register
12PWM.12PWM4           7   PWM Bit 4                   
12PWM.12PWM3           6   PWM Bit 3                   
12PWM.12PWM2           5   PWM Bit 2                   
12PWM.12PWM1           4   PWM Bit 1                   
12PWM.12PWM0           3   PWM Bit 0                   
12PWM.12BRM2           2   Binary Rate Multiplier Bit 2
12PWM.12BRM1           1   Binary Rate Multiplier Bit 1
12PWM.12BRM0           0   Binary Rate Multiplier Bit 0
13PWM                 0x0056     PWM13 Data Register
13PWM.13PWM4           7   PWM Bit 4                   
13PWM.13PWM3           6   PWM Bit 3                   
13PWM.13PWM2           5   PWM Bit 2                   
13PWM.13PWM1           4   PWM Bit 1                   
13PWM.13PWM0           3   PWM Bit 0                   
13PWM.13BRM2           2   Binary Rate Multiplier Bit 2
13PWM.13BRM1           1   Binary Rate Multiplier Bit 1
13PWM.13BRM0           0   Binary Rate Multiplier Bit 0
14PWM                 0x0057     PWM14 Data Register
14PWM.14PWM4           7   PWM Bit 4                   
14PWM.14PWM3           6   PWM Bit 3                   
14PWM.14PWM2           5   PWM Bit 2                   
14PWM.14PWM1           4   PWM Bit 1                   
14PWM.14PWM0           3   PWM Bit 0                   
14PWM.14BRM2           2   Binary Rate Multiplier Bit 2
14PWM.14BRM1           1   Binary Rate Multiplier Bit 1
14PWM.14BRM0           0   Binary Rate Multiplier Bit 0
15PWM                 0x0058     PWM15 Data Register
15PWM.15PWM4           7   PWM Bit 4                   
15PWM.15PWM3           6   PWM Bit 3                   
15PWM.15PWM2           5   PWM Bit 2                   
15PWM.15PWM1           4   PWM Bit 1                   
15PWM.15PWM0           3   PWM Bit 0                   
15PWM.15BRM2           2   Binary Rate Multiplier Bit 2
15PWM.15BRM1           1   Binary Rate Multiplier Bit 1
15PWM.15BRM0           0   Binary Rate Multiplier Bit 0
PWMCR2                0x0059     PWM Control Register 2
PWMCR2.PWM15E          7   PWM Output Enable 7
PWMCR2.PWM14E          6   PWM Output Enable 6
PWMCR2.PWM13E          5   PWM Output Enable 5
PWMCR2.PWM12E          4   PWM Output Enable 4
PWMCR2.PWM11E          3   PWM Output Enable 3
PWMCR2.PWM10E          2   PWM Output Enable 2
PWMCR2.PWM9E           1   PWM Output Enable 1
PWMCR2.PWM8E           0   PWM Output Enable 0
ADSCR                 0x005D     ADC Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADR                   0x005E     ADC Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADICLK                0x005F     ADC Input Clock Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bits 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bits 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bits 0
SBSR                  0xFE00     SIM Break Status Register
SBSR.SBSW              1   SIM Break Stop/Wait Bit
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Bit
SRSR.PIN               6   External Reset Bit
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit (opcode fetches only)
RESERVFE02            0xFE02     RESERVED
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF6               7   Interrupt Flag 6
INT1.IF5               6   Interrupt Flag 5
INT1.IF4               5   Interrupt Flag 4
INT1.IF3               4   Interrupt Flag 3
INT1.IF2               3   Interrupt Flag 2
INT1.IF1               2   Interrupt Flag 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF10              3   Interrupt Flag 10
INT2.IF9               2   Interrupt Flag 9 
INT2.IF8               1   Interrupt Flag 8 
INT2.IF7               0   Interrupt Flag 7 
RESERVFE06            0xFE06     RESERVED
RESERVFE07            0xFE07     RESERVED
RESERVFE08            0xFE08     RESERVED
RESERVFE09            0xFE09     RESERVED
RESERVFE0A            0xFE0A     RESERVED
RESERVFE0B            0xFE0B     RESERVED
BRKH                  0xFE0C     Break Address High Register
BRKL                  0xFE0D     Break Address low Register
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
RESERVFFE6            0xFFE6     RESERVED
RESERVFFE7            0xFFE7     RESERVED
RESERVFFEA            0xFFEA     RESERVED
RESERVFFEB            0xFFEB     RESERVED
RESERVFFF4            0xFFF4     RESERVED
RESERVFFF5            0xFFF5     RESERVED
RESERVFFF8            0xFFF8     RESERVED
RESERVFFF9            0xFFF9     RESERVED
COPCTL                0xFFFF     COP Control Register


.68HC08GP32
; MC68HC908GP32/H  http://
; MC68HC908GP32.pdf

; 32,256 bytes of user FLASH memory
; RAM=512 


; MEMORY MAP
area DATA FSR		   0x0000:0x0040
area DATA RAM		   0x0040:0x0240
area BSS  UNIMPLEMENTED	   0x0240:0x8000
area DATA FLASH_Memory	   0x8000:0xFE00
area DATA FSR_1		   0xFE00:0xFE0D
area BSS  UNIMPLEMENTED	   0xFE0D:0xFE20
area DATA Monitor_ROM	   0xFE20:0xFF53
area BSS  UNIMPLEMENTED	   0xFF53:0xFF7E
area DATA _FLBPR_	   0xFF7E:0xFF7F
area BSS  UNIMPLEMENTED	   0xFF7F:0xFFDC
area DATA USER_VEC	   0xFFDC:0x10000


; Interrupt and reset vector assignments
interrupt __RESET           0xFFFE      Processor reset
interrupt SWI               0xFFFC      "SWI" 
interrupt IRQ               0xFFFA      "IRQ"
interrupt PLL               0xFFF8      "PLL Module"
interrupt TIM1_CH0          0xFFF6      "TIM1 Channel 0"
interrupt TIM1_CH1          0xFFF4      "TIM1 Channel 1"
interrupt TIM1              0xFFF2      "TIM1 Overflow"
interrupt TIM2_CH0          0xFFF0      "TIM1 Channel 0"
interrupt TIM2_CH1          0xFFEE      "TIM1 Channel 1"
interrupt TIM2              0xFFEC      "TIM1 Overflow"
interrupt SPI_R             0xFFEA      "SPI Module Receive"
interrupt SPI_T             0xFFE8      "SPI Module Transmit"
interrupt SCI_E             0xFFE6      "SCI Module Error"
interrupt SCI_R             0xFFE4      "SCI Module Receive"
interrupt SCI_T             0xFFE2      "SCI Module Transmit"
interrupt KBRD              0xFFE0      "Keyboard"
interrupt ADC               0xFFDE      "ADC Conversion Complete"
interrupt TIME              0xFFDC      "TIMEbase vector"


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bit 7
PTA.PTA6               6   Port A Data Bit 6
PTA.PTA5               5   Port A Data Bit 5
PTA.PTA4               4   Port A Data Bit 4
PTA.PTA3               3   Port A Data Bit 3
PTA.PTA2               2   Port A Data Bit 2
PTA.PTA1               1   Port A Data Bit 1
PTA.PTA0               0   Port A Data Bit 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bit 7
PTB.PTB6               6   Port B Data Bit 6
PTB.PTB5               5   Port B Data Bit 5
PTB.PTB4               4   Port B Data Bit 4
PTB.PTB3               3   Port B Data Bit 3
PTB.PTB2               2   Port B Data Bit 2
PTB.PTB1               1   Port B Data Bit 1
PTB.PTB0               0   Port B Data Bit 0
PTC                   0x0002     Port C Data Register
PTC.PTC6               6   Port C Data Bit 6
PTC.PTC5               5   Port C Data Bit 5
PTC.PTC4               4   Port C Data Bit 4
PTC.PTC3               3   Port C Data Bit 3
PTC.PTC2               2   Port C Data Bit 2
PTC.PTC1               1   Port C Data Bit 1
PTC.PTC0               0   Port C Data Bit 0
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bit 7
PTD.PTD6               6   Port D Data Bit 6
PTD.PTD5               5   Port D Data Bit 5
PTD.PTD4               4   Port D Data Bit 4
PTD.PTD3               3   Port D Data Bit 3
PTD.PTD2               2   Port D Data Bit 2
PTD.PTD1               1   Port D Data Bit 1
PTD.PTD0               0   Port D Data Bit 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bit 7
DDRA.DDRA6             6   Data Direction Register A Bit 6
DDRA.DDRA5             5   Data Direction Register A Bit 5
DDRA.DDRA4             4   Data Direction Register A Bit 4
DDRA.DDRA3             3   Data Direction Register A Bit 3
DDRA.DDRA2             2   Data Direction Register A Bit 2
DDRA.DDRA1             1   Data Direction Register A Bit 1
DDRA.DDRA0             0   Data Direction Register A Bit 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bit 7
DDRB.DDRB6             6   Data Direction Register B Bit 6
DDRB.DDRB5             5   Data Direction Register B Bit 5
DDRB.DDRB4             4   Data Direction Register B Bit 4
DDRB.DDRB3             3   Data Direction Register B Bit 3
DDRB.DDRB2             2   Data Direction Register B Bit 2
DDRB.DDRB1             1   Data Direction Register B Bit 1
DDRB.DDRB0             0   Data Direction Register B Bit 0
DDRC                  0x0006     Data Direction Register C
DDRC.DDRC6             6   Data Direction Register C Bit 6
DDRC.DDRC5             5   Data Direction Register C Bit 5
DDRC.DDRC4             4   Data Direction Register C Bit 4
DDRC.DDRC3             3   Data Direction Register C Bit 3
DDRC.DDRC2             2   Data Direction Register C Bit 2
DDRC.DDRC1             1   Data Direction Register C Bit 1
DDRC.DDRC0             0   Data Direction Register C Bit 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bit 7
DDRD.DDRD6             6   Data Direction Register D Bit 6
DDRD.DDRD5             5   Data Direction Register D Bit 5
DDRD.DDRD4             4   Data Direction Register D Bit 4
DDRD.DDRD3             3   Data Direction Register D Bit 3
DDRD.DDRD2             2   Data Direction Register D Bit 2
DDRD.DDRD1             1   Data Direction Register D Bit 1
DDRD.DDRD0             0   Data Direction Register D Bit 0
PTE                   0x0008     Port E Data Register
PTE.PTE1               1   Port E Data Bit 1
PTE.PTE0               0   Port E Data Bit 0
UNUSED0009            0x0009     UNUSED
UNUSED000A            0x000A     UNUSED
UNUSED000B            0x000B     UNUSED
DDRE                  0x000C     Data Direction Register E
DDRE.DDRE1             1   Data Direction Register E Bit 1
DDRE.DDRE0             0   Data Direction Register E Bit 0
PTAPUE                0x000D     Port A Input Pullup Enable Register
PTAPUE.PTAPUE7         7   Port A Input Pullup Enable Bit 7
PTAPUE.PTAPUE6         6   Port A Input Pullup Enable Bit 6
PTAPUE.PTAPUE5         5   Port A Input Pullup Enable Bit 5
PTAPUE.PTAPUE4         4   Port A Input Pullup Enable Bit 4
PTAPUE.PTAPUE3         3   Port A Input Pullup Enable Bit 3
PTAPUE.PTAPUE2         2   Port A Input Pullup Enable Bit 2
PTAPUE.PTAPUE1         1   Port A Input Pullup Enable Bit 1
PTAPUE.PTAPUE0         0   Port A Input Pullup Enable Bit 0
PTCPUE                0x000E     Register Port C Input Pullup Enable
PTCPUE.PTCPUE6         6   Port C Input Pullup Enable Bit 6
PTCPUE.PTCPUE5         5   Port C Input Pullup Enable Bit 5
PTCPUE.PTCPUE4         4   Port C Input Pullup Enable Bit 4
PTCPUE.PTCPUE3         3   Port C Input Pullup Enable Bit 3
PTCPUE.PTCPUE2         2   Port C Input Pullup Enable Bit 2
PTCPUE.PTCPUE1         1   Port C Input Pullup Enable Bit 1
PTCPUE.PTCPUE0         0   Port C Input Pullup Enable Bit 0
PTDPUE                0x000F     Port D Input Pullup Enable Register
PTDPUE.PTDPUE7         7   Port D Input Pullup Enable Bit 7
PTDPUE.PTDPUE6         6   Port D Input Pullup Enable Bit 6
PTDPUE.PTDPUE5         5   Port D Input Pullup Enable Bit 5
PTDPUE.PTDPUE4         4   Port D Input Pullup Enable Bit 4
PTDPUE.PTDPUE3         3   Port D Input Pullup Enable Bit 3
PTDPUE.PTDPUE2         2   Port D Input Pullup Enable Bit 2
PTDPUE.PTDPUE1         1   Port D Input Pullup Enable Bit 1
PTDPUE.PTDPUE0         0   Port D Input Pullup Enable Bit 0
SPCR                  0x0010     SPI Control Register
SPCR.SPRIE             7   SPI Receiver Interrupt Enable Bit
SPCR.DMAS              6   DMA Select Bit
SPCR.SPMSTR            5   SPI Master Bit
SPCR.CPOL              4   Clock Polarity Bit
SPCR.CPHA              3   Clock Phase Bit
SPCR.SPWOM             2   SPI Wired-OR Mode Bit
SPCR.SPE               1   SPI Enable
SPCR.SPTIE             0   SPI Transmit Interrupt Enable
SPSCR                 0x0011     SPI Status and Control Register
SPSCR.SPRF             7   SPI Receiver Full Bit
SPSCR.ERRIE            6   Error Interrupt Enable Bit
SPSCR.OVRF             5   Overflow Bit
SPSCR.MODF             4   Mode Fault Bit
SPSCR.SPTE             3   SPI Transmitter Empty Bit
SPSCR.MODFEN           2   Mode Fault Enable Bit
SPSCR.SPR1             1   SPI Baud Rate Select Bits 1
SPSCR.SPR0             0   SPI Baud Rate Select Bits 0
SPDR                  0x0012     SPI Data Register
SPDR.R7_T7             7   Receive/Transmit Data Bit 7
SPDR.R6_T6             6   Receive/Transmit Data Bit 6
SPDR.R5_T5             5   Receive/Transmit Data Bit 5
SPDR.R4_T4             4   Receive/Transmit Data Bit 4
SPDR.R3_T3             3   Receive/Transmit Data Bit 3
SPDR.R2_T2             2   Receive/Transmit Data Bit 2
SPDR.R1_T1             1   Receive/Transmit Data Bit 1
SPDR.R0_T0             0   Receive/Transmit Data Bit 0
SCC1                  0x0013     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit
SCC1.ENSCI             6   Enable SCI Bit
SCC1.TXINV             5   Transmit Inversion Bit
SCC1.M                 4   Mode (Character Length) Bit
SCC1.WAKE              3   Wakeup Condition Bit
SCC1.ILTY              2   Idle Line Type Bit
SCC1.PEN               1   Parity Enable Bit
SCC1.PTY               0   Parity Bit
SCC2                  0x0014     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit
SCC2.ILIE              4   Idle Line Interrupt Enable Bit
SCC2.TE                3   Transmitter Enable Bit
SCC2.RE                2   Receiver Enable Bit
SCC2.RWU               1   Receiver Wakeup Bit
SCC2.SBK               0   Send Break Bit
SCC3                  0x0015     SCI Control Register 3
SCC3.R8                7   Received Bit 8
SCC3.T8                6   Transmitted Bit 8
SCC3.DMARE             5   DMA Receive Enable Bit
SCC3.DMATE             4   DMA Transfer Enable Bit
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit
SCS1                  0x0016     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit
SCS1.TC                6   Transmission Complete Bit
SCS1.SCRF              5   SCI Receiver Full Bit
SCS1.IDLE              4   Receiver Idle Bit
SCS1.OR                3   Receiver Overrun Bit
SCS1.NF                2   Receiver Noise Flag Bit
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit
SCS2                  0x0017     SCI Status Register 2
SCS2.BKF               1   Break Flag Bit
SCS2.RPF               0   Reception in Progress Flag Bit
SCDR                  0x0018     SCI Data Register
SCDR.R7_T7             7   Receive/Transmit Data Bit 7
SCDR.R6_T6             6   Receive/Transmit Data Bit 6
SCDR.R5_T5             5   Receive/Transmit Data Bit 5
SCDR.R4_T4             4   Receive/Transmit Data Bit 4
SCDR.R3_T3             3   Receive/Transmit Data Bit 3
SCDR.R2_T2             2   Receive/Transmit Data Bit 2
SCDR.R1_T1             1   Receive/Transmit Data Bit 1
SCDR.R0_T0             0   Receive/Transmit Data Bit 0
SCBR                  0x0019     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2
SCBR.SCR1              1   SCI Baud Rate Select Bits 1
SCBR.SCR0              0   SCI Baud Rate Select Bits 0
INTKBSCR              0x001A     Keyboard Status and Control Register
INTKBSCR.KEYF          3   Keyboard Flag Bit
INTKBSCR.ACKK          2   Keyboard Acknowledge Bit
INTKBSCR.IMASKK        1   Keyboard Interrupt Mask Bit
INTKBSCR.MODEK         0   Keyboard Triggering Sensitivity Bit
INTKBIER              0x001B     Keyboard Interrupt Enable Register
INTKBIER.KBIE7         7   Keyboard Interrupt Enable Bits 7
INTKBIER.KBIE6         6   Keyboard Interrupt Enable Bits 6
INTKBIER.KBIE5         5   Keyboard Interrupt Enable Bits 5
INTKBIER.KBIE4         4   Keyboard Interrupt Enable Bits 4
INTKBIER.KBIE3         3   Keyboard Interrupt Enable Bits 3
INTKBIER.KBIE2         2   Keyboard Interrupt Enable Bits 2
INTKBIER.KBIE1         1   Keyboard Interrupt Enable Bits 1
INTKBIER.KBIE0         0   Keyboard Interrupt Enable Bits 0
TBCR                  0x001C     Time Base Module Control Register
TBCR.TBIF              7   Timebase Interrupt Flag
TBCR.TBR2              6   Timebase Rate Selection 2
TBCR.TBR1              5   Timebase Rate Selection 1
TBCR.TBR0              4   Timebase Rate Selection 0
TBCR.TACK              3   Timebase ACKnowledge
TBCR.TBIE              2   Timebase Interrupt Enabled
TBCR.TBON              1   Timebase Enabled
INTSCR                0x001D     IRQ Status and Control Register
INTSCR.IRQF1           3   IRQ Flag Bit
INTSCR.ACK1            2   IRQ Interrupt Request Acknowledge Bit
INTSCR.IMASK1          1   IRQ Interrupt Mask Bit
INTSCR.MODE1           0   IRQ Edge/Level Select Bit
CONFIG2               0x001E     Configuration Register 2
CONFIG2.OSCSTOPENB     1   Oscillator Stop Mode Enable Bar Bit
CONFIG2.SCIBDSRC       0   SCI Baud Rate Clock Source Bit
CONFIG1               0x001F     Configuration Register 1
CONFIG1.COPRS          7   COP Rate Select Bit
CONFIG1.LVISTOP        6   LVI Enable in Stop Mode Bit
CONFIG1.LVIRSTD        5   LVI Reset Disable Bit
CONFIG1.LVIPWRD        4   LVI Power Disable Bit
CONFIG1.LVI5OR3        3   LVI 5-V or 3-V Operating Mode Bit
CONFIG1.SSREC          2   Short Stop Recovery Bit
CONFIG1.STOP           1   STOP Instruction Enable Bit
CONFIG1.COPD           0   COP Disable Bit
T1SC                  0x0020     Timer 1 Status and Control Register
T1SC.TOF               7   TIM Overflow Flag Bit
T1SC.TOIE              6   TIM Overflow Interrupt Enable Bit
T1SC.TSTOP             5   TIM Stop Bit
T1SC.TRST              4   TIM Reset Bit
T1SC.PS2               2   Prescaler Select Bits 2
T1SC.PS1               1   Prescaler Select Bits 1
T1SC.PS0               0   Prescaler Select Bits 0
T1CNTH                0x0021     Timer 1 Counter Register High
T1CNTL                0x0022     Timer 1 Counter Register Low
T1MODH                0x0023     Timer 1 Counter Modulo Register High
T1MODL                0x0024     Timer 1 Counter Modulo Register Low
T1SC0                 0x0025     Timer 1 Channel 0 Status and Control Register
T1SC0.CH0F             7   Channel 0 Flag Bit
T1SC0.CH0IE            6   Channel 0 Interrupt Enable Bit
T1SC0.MS0B             5   Mode Select Bit B
T1SC0.MS0A             4   Mode Select Bit A
T1SC0.ELS0B            3   Edge/Level Select Bits
T1SC0.ELS0A            2   Edge/Level Select Bits
T1SC0.TOV0             1   Toggle On Overflow Bit
T1SC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
T1CH0H                0x0026     Timer 1 Channel 0 Register High
T1CH0L                0x0027     Timer 1 Channel 0 Register Low
T1SC1                 0x0028     Timer 1 Channel 1 Status and Control Register
T1SC1.CH1F             7   Channel 1 Flag Bit            
T1SC1.CH1IE            6   Channel 1 Interrupt Enable Bit
T1SC1.MS1A             4   Mode Select Bit A               
T1SC1.ELS1B            3   Edge/Level Select Bits          
T1SC1.ELS1A            2   Edge/Level Select Bits          
T1SC1.TOV1             1   Toggle On Overflow Bit          
T1SC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
T1CH1H                0x0029     Timer 1 Channel 1 Register High
T1CH1L                0x002A     Timer 1 Channel 1 Register Low
T2SC                  0x002B     Timer 2 Status and Control Register
T2SC.TOF               7   TIM Overflow Flag Bit            
T2SC.TOIE              6   TIM Overflow Interrupt Enable Bit
T2SC.TSTOP             5   TIM Stop Bit                     
T2SC.TRST              4   TIM Reset Bit                    
T2SC.PS2               2   Prescaler Select Bits 2          
T2SC.PS1               1   Prescaler Select Bits 1          
T2SC.PS0               0   Prescaler Select Bits 0          
T2CNTH                0x002C     Timer 2 Counter Register High
T2CNTL                0x002D     Timer 2 Counter Register Low
T2MODH                0x002E     Timer 2 Counter Modulo Register High
T2MODL                0x002F     Timer 2 Counter Modulo Register Low
T2SC0                 0x0030     Timer 2 Channel 0 Status and Control Register
T2SC0.CH0F             7   Channel 0 Flag Bit              
T2SC0.CH0IE            6   Channel 0 Interrupt Enable Bit  
T2SC0.MS0B             5   Mode Select Bit B               
T2SC0.MS0A             4   Mode Select Bit A               
T2SC0.ELS0B            3   Edge/Level Select Bits          
T2SC0.ELS0A            2   Edge/Level Select Bits          
T2SC0.TOV0             1   Toggle On Overflow Bit          
T2SC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
T2CH0H                0x0031     Timer 2 Channel 0 Register High
T2CH0L                0x0032     Timer 2 Channel 0 Register Low
T2SC1                 0x0033     Timer 2 Channel 1 Status and Control Register
T2SC1.CH1F             7   Channel 1 Flag Bit              
T2SC1.CH1IE            6   Channel 1 Interrupt Enable Bit  
T2SC1.MS1A             4   Mode Select Bit A               
T2SC1.ELS1B            3   Edge/Level Select Bits          
T2SC1.ELS1A            2   Edge/Level Select Bits          
T2SC1.TOV1             1   Toggle On Overflow Bit          
T2SC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
T2CH1H                0x0034     Timer 2 Channel 1 Register High
T2CH1L                0x0035     Timer 2 Channel 1 Register Low
PCTL                  0x0036     PLL Control Register
PCTL.PLLIE             7   PLL Interrupt Enable Bit
PCTL.PLLF              6   PLL Interrupt Flag Bit
PCTL.PLLON             5   PLL On Bit
PCTL.BCS               4   Base Clock Select Bit
PCTL.PRE1              3   Prescaler Program Bits 1
PCTL.PRE0              2   Prescaler Program Bits 0
PCTL.VPR1              1   VCO Power-of-Two Range Select Bits 1
PCTL.VPR0              0   VCO Power-of-Two Range Select Bits 0
PBWC                  0x0037     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               5   Acquisition Mode Bit
PMSH                  0x0038     PLL Multiplier Select High Register
PMSH.MUL11             3   Multiplier Select Bits 11
PMSH.MUL10             2   Multiplier Select Bits 10
PMSH.MUL9              1   Multiplier Select Bits 9
PMSH.MUL8              0   Multiplier Select Bits 8
PMSL                  0x0039     PLL Multiplier Select Low Register
PMSL.MUL7              7   Multiplier Select Bits 7
PMSL.MUL6              6   Multiplier Select Bits 6
PMSL.MUL5              5   Multiplier Select Bits 5
PMSL.MUL4              4   Multiplier Select Bits 4
PMSL.MUL3              3   Multiplier Select Bits 3
PMSL.MUL2              2   Multiplier Select Bits 2
PMSL.MUL1              1   Multiplier Select Bits 1
PMSL.MUL0              0   Multiplier Select Bits 0
PMRS                  0x003A     PLL VCO Range Select Register
PMRS.VRS7              7   VCO Range Select Bits 7
PMRS.VRS6              6   VCO Range Select Bits 6
PMRS.VRS5              5   VCO Range Select Bits 5
PMRS.VRS4              4   VCO Range Select Bits 4
PMRS.VRS3              3   VCO Range Select Bits 3
PMRS.VRS2              2   VCO Range Select Bits 2
PMRS.VRS1              1   VCO Range Select Bits 1
PMRS.VRS0              0   VCO Range Select Bits 0
PMDS                  0x003B     PLL Reference Divider Select Register
PMDS.RDS3              3   Reference Divider Select Bits 3
PMDS.RDS2              2   Reference Divider Select Bits 2
PMDS.RDS1              1   Reference Divider Select Bits 1
PMDS.RDS0              0   Reference Divider Select Bits 0
ADSCR                 0x003C     Analog-to-Digital Status and Control Register
ADSCR.COCO             7   Conversions Complete
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADR                   0x003D     Analog-to-Digital Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADCLK                 0x003E     Analog-to-Digital Clock Register
ADCLK.ADIV2            7   ADC Clock Prescaler Bits 2
ADCLK.ADIV1            6   ADC Clock Prescaler Bits 1
ADCLK.ADIV0            5   ADC Clock Prescaler Bits 0
ADCLK.ADICLK           4   ADC Input Clock Select Bit
UNUSED003F            0x003F     UNUSED
SBSR                  0xFE00     SIM Break Status Register
SBSR.SBSW              1   SIM Break Stop/Wait Bit
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Flag
SRSR.PIN               6   External Reset Flag
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
SUBAR                 0xFE02     SIM Upper Byte Address Register
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF6               7   Interrupt Flag 6
INT1.IF5               6   Interrupt Flag 5
INT1.IF4               5   Interrupt Flag 4
INT1.IF3               4   Interrupt Flag 3
INT1.IF2               3   Interrupt Flag 2
INT1.IF1               2   Interrupt Flag 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flag 14
INT2.IF13              6   Interrupt Flag 13
INT2.IF12              5   Interrupt Flag 12
INT2.IF11              4   Interrupt Flag 11
INT2.IF10              3   Interrupt Flag 10
INT2.IF9               2   Interrupt Flag 9 
INT2.IF8               1   Interrupt Flag 8 
INT2.IF7               0   Interrupt Flag 7 
INT3                  0xFE06     Interrupt Status Register 3
INT3.IF16              1   Interrupt Flag 16
INT3.IF15              0   Interrupt Flag 15
ReservFE07            0xFE07     Reserved
FLCR                  0xFE08     FLASH Control Register
FLCR.HVEN              3   High-Voltage Enable Bit
FLCR.MASS              2   Mass Erase Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
BRKH                  0xFE09     Break Address Register High
BRKL                  0xFE0A     Break Address Register Low
BRKSCR                0xFE0B     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
LVISR                 0xFE0C     LVI Status Register
LVISR.LVIOUT           7   LVI Output Bit
FLBPR                 0xFF7E     FLASH Block Protect Register
FLBPR.BPR7             7   FLASH Block Protect Bits 7
FLBPR.BPR6             6   FLASH Block Protect Bits 6
FLBPR.BPR5             5   FLASH Block Protect Bits 5
FLBPR.BPR4             4   FLASH Block Protect Bits 4
FLBPR.BPR3             3   FLASH Block Protect Bits 3
FLBPR.BPR2             2   FLASH Block Protect Bits 2
FLBPR.BPR1             1   FLASH Block Protect Bits 1
FLBPR.BPR0             0   FLASH Block Protect Bits 0
COPCTL                0xFFFF     COP Control Register


.68HC08GR8
; MC68HC908GR8/D  http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=68HC08GR8&nodeId=01M98634
; MC68HC908GR8.pdf


; MEMORY MAP
area DATA FSR		   0x0000:0x0040
area DATA RAM		   0x0040:0x01C0
area BSS  UNIMPLEMENTED	   0x01C0:0xE000
area DATA FLASH_Memory	   0xE000:0xFE00
area DATA FSR_1		   0xFE00:0xFE0D
area BSS  RESERVED	   0xFE0D:0xFE20
area DATA Monitor_ROM	   0xFE20:0xFF56
area BSS  UNIMPLEMENTED	   0xFF56:0xFF7E
area DATA _FLBPR_	   0xFF7E:0xFF7F
area BSS  UNIMPLEMENTED	   0xFF7F:0xFFDC
area DATA USER_VEC	   0xFFDC:0x10000


; Interrupt and reset vector assignments
interrupt __RESET       0xFFFE       Reset Vector
interrupt SWI           0xFFFC       SWI Vector
interrupt IRQ           0xFFFA       IRQ Vector
interrupt PLL           0xFFF8       PLL Vector
interrupt TIM1_CH0      0xFFF6       TIM1 Channel 0 Vector
interrupt TIM1_CH1      0xFFF4       TIM1 Channel 1 Vector
interrupt TIM1          0xFFF2       TIM1 Overflow Vector
interrupt TIM2_CH0      0xFFF0       TIM2 Channel 0 Vector
interrupt TIM2          0xFFEC       TIM2 Overflow Vector
interrupt SPI_R         0xFFEA       SPI Receive Vector
interrupt SPI_T         0xFFE8       SPI Transmit Vector
interrupt SCI_E         0xFFE6       SCI Error Vector
interrupt SCI_R         0xFFE4       SCI Receive Vector
interrupt SCI_T         0xFFE2       SCI Transmit Vector
interrupt KBRD          0xFFE0       Keyboard Vector
interrupt ADC           0xFFDE       ADC Conversion Complete Vector
interrupt TIME          0xFFDC       Timebase Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA3               3   Port A Data Bit 3
PTA.PTA2               2   Port A Data Bit 2
PTA.PTA1               1   Port A Data Bit 1
PTA.PTA0               0   Port A Data Bit 0
PTB                   0x0001     Port B Data Register
PTB.PTB5               5   Port B Data Bit 5
PTB.PTB4               4   Port B Data Bit 4
PTB.PTB3               3   Port B Data Bit 3
PTB.PTB2               2   Port B Data Bit 2
PTB.PTB1               1   Port B Data Bit 1
PTB.PTB0               0   Port B Data Bit 0
PTC                   0x0002     Port C Data Register
PTC.PTC1               1   Port C Data Bit 1
PTC.PTC0               0   Port C Data Bit 0
PTD                   0x0003     Port D Data Register
PTD.PTD6               6   Port D Data Bit 6
PTD.PTD5               5   Port D Data Bit 5
PTD.PTD4               4   Port D Data Bit 4
PTD.PTD3               3   Port D Data Bit 3
PTD.PTD2               2   Port D Data Bit 2
PTD.PTD1               1   Port D Data Bit 1
PTD.PTD0               0   Port D Data Bit 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA3             3   Data Direction Register A Bit 3
DDRA.DDRA2             2   Data Direction Register A Bit 2
DDRA.DDRA1             1   Data Direction Register A Bit 1
DDRA.DDRA0             0   Data Direction Register A Bit 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB5             5   Data Direction Register B Bit 5
DDRB.DDRB4             4   Data Direction Register B Bit 4
DDRB.DDRB3             3   Data Direction Register B Bit 3
DDRB.DDRB2             2   Data Direction Register B Bit 2
DDRB.DDRB1             1   Data Direction Register B Bit 1
DDRB.DDRB0             0   Data Direction Register B Bit 0
DDRC                  0x0006     Data Direction Register C
DDRC.DDRC1             1   Data Direction Register C Bit 1
DDRC.DDRC0             0   Data Direction Register C Bit 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD6             6   Data Direction Register D Bit 6
DDRD.DDRD5             5   Data Direction Register D Bit 5
DDRD.DDRD4             4   Data Direction Register D Bit 4
DDRD.DDRD3             3   Data Direction Register D Bit 3
DDRD.DDRD2             2   Data Direction Register D Bit 2
DDRD.DDRD1             1   Data Direction Register D Bit 1
DDRD.DDRD0             0   Data Direction Register D Bit 0
PTE                   0x0008     Port E Data Register
PTE.PTE1               1   Port E Data Bit 1
PTE.PTE0               0   Port E Data Bit 0
UNUSED0009            0x0009     UNUSED
UNUSED000A            0x000A     UNUSED
UNUSED000B            0x000B     UNUSED
DDRE                  0x000C     Data Direction Register E
DDRE.DDRE1             1   Data Direction Register E Bit 1
DDRE.DDRE0             0   Data Direction Register E Bit 0
PTAPUE                0x000D     Port A Input Pullup Enable Register
PTAPUE.PTAPUE3         3   Port A Input Pullup Enable Bit 3
PTAPUE.PTAPUE2         2   Port A Input Pullup Enable Bit 2
PTAPUE.PTAPUE1         1   Port A Input Pullup Enable Bit 1
PTAPUE.PTAPUE0         0   Port A Input Pullup Enable Bit 0
PTCPUE                0x000E     Port C Input Pullup Enable Register
PTCPUE.PTCPUE1         1   Port C Input Pullup Enable Bits 1
PTCPUE.PTCPUE0         0   Port C Input Pullup Enable Bits 0
PTDPUE                0x000F     Port D Input Pullup Enable Register
PTDPUE.PTDPUE6         6   Port D Input Pullup Enable Bits 6
PTDPUE.PTDPUE5         5   Port D Input Pullup Enable Bits 5
PTDPUE.PTDPUE4         4   Port D Input Pullup Enable Bits 4
PTDPUE.PTDPUE3         3   Port D Input Pullup Enable Bits 3
PTDPUE.PTDPUE2         2   Port D Input Pullup Enable Bits 2
PTDPUE.PTDPUE1         1   Port D Input Pullup Enable Bits 1
PTDPUE.PTDPUE0         0   Port D Input Pullup Enable Bits 0
SPCR                  0x0010     SPI Control Register
SPCR.SPRIE             7   SPI Receiver Interrupt Enable Bit
SPCR.DMAS              6   DMA Select Bit
SPCR.SPMSTR            5   SPI Master Bit
SPCR.CPOL              4   Clock Polarity Bit
SPCR.CPHA              3   Clock Phase Bit
SPCR.SPWOM             2   SPI Wired-OR Mode Bit
SPCR.SPE               1   SPI Enable
SPCR.SPTIE             0   SPI Transmit Interrupt Enable
SPSCR                 0x0011     SPI Status and Control Register
SPSCR.SPRF             7   SPI Receiver Full Bit
SPSCR.ERRIE            6   Error Interrupt Enable Bit
SPSCR.OVRF             5   Overflow Bit
SPSCR.MODF             4   Mode Fault Bit
SPSCR.SPTE             3   SPI Transmitter Empty Bit
SPSCR.MODFEN           2   Mode Fault Enable Bit
SPSCR.SPR1             1   SPI Baud Rate Select Bits 1
SPSCR.SPR0             0   SPI Baud Rate Select Bits 0
SPDR                  0x0012     SPI Data Register
SPDR.T7_R7             7   Receive/Transmit Data Bit 7
SPDR.T6_R6             6   Receive/Transmit Data Bit 6
SPDR.T5_R5             5   Receive/Transmit Data Bit 5
SPDR.T4_R4             4   Receive/Transmit Data Bit 4
SPDR.T3_R3             3   Receive/Transmit Data Bit 3
SPDR.T2_R2             2   Receive/Transmit Data Bit 2
SPDR.T1_R1             1   Receive/Transmit Data Bit 1
SPDR.T0_R0             0   Receive/Transmit Data Bit 0
SCC1                  0x0013     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit
SCC1.ENSCI             6   Enable SCI Bit
SCC1.TXINV             5   Transmit Inversion Bit
SCC1.M                 4   Mode (Character Length) Bit
SCC1.WAKE              3   Wakeup Condition Bit
SCC1.ILTY              2   Idle Line Type Bit
SCC1.PEN               1   Parity Enable Bit
SCC1.PTY               0   Parity Bit
SCC2                  0x0014     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit
SCC2.ILIE              4   Idle Line Interrupt Enable Bit
SCC2.TE                3   Transmitter Enable Bit
SCC2.RE                2   Receiver Enable Bit
SCC2.RWU               1   Receiver Wakeup Bit
SCC2.SBK               0   Send Break Bit
SCC3                  0x0015     SCI Control Register 3
SCC3.R8                7   Received Bit 8
SCC3.T8                6   Transmitted Bit 8
SCC3.DMARE             5   DMA Receive Enable Bit
SCC3.DMATE             4   DMA Transfer Enable Bit
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit
SCS1                  0x0016     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit
SCS1.TC                6   Transmission Complete Bit
SCS1.SCRF              5   SCI Receiver Full Bit
SCS1.IDLE              4   Receiver Idle Bit
SCS1.OR                3   Receiver Overrun Bit
SCS1.NF                2   Receiver Noise Flag Bit
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit
SCS2                  0x0017     SCI Status Register 2
SCS2.BKF               1   Break Flag Bit
SCS2.RPF               0   Reception in Progress Flag Bit
SCDR                  0x0018     SCI Data Register
SCDR.T7_R7             7   Receive/Transmit Data Bit 7
SCDR.T6_R6             6   Receive/Transmit Data Bit 6
SCDR.T5_R5             5   Receive/Transmit Data Bit 5
SCDR.T4_R4             4   Receive/Transmit Data Bit 4
SCDR.T3_R3             3   Receive/Transmit Data Bit 3
SCDR.T2_R2             2   Receive/Transmit Data Bit 2
SCDR.T1_R1             1   Receive/Transmit Data Bit 1
SCDR.T0_R0             0   Receive/Transmit Data Bit 0
SCBR                  0x0019     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2
SCBR.SCR1              1   SCI Baud Rate Select Bits 1
SCBR.SCR0              0   SCI Baud Rate Select Bits 0
INTKBSCR              0x001A     Keyboard Status and Control Register
INTKBSCR.KEYF          3   Keyboard Flag Bit
INTKBSCR.ACKK          2   Keyboard Acknowledge Bit
INTKBSCR.IMASKK        1   Keyboard Interrupt Mask Bit
INTKBSCR.MODEK         0   Keyboard Triggering Sensitivity Bit
INTKBIER              0x001B     Keyboard Interrupt Enable Register
INTKBIER.KBIE3         3   Keyboard Interrupt Enable Bits 3
INTKBIER.KBIE2         2   Keyboard Interrupt Enable Bits 2
INTKBIER.KBIE1         1   Keyboard Interrupt Enable Bits 1
INTKBIER.KBIE0         0   Keyboard Interrupt Enable Bits 0
TBCR                  0x001C     Time Base Module Control Register
TBCR.TBIF              7   Timebase Interrupt Flag
TBCR.TBR2              6   Timebase Rate Selection 2
TBCR.TBR1              5   Timebase Rate Selection 1
TBCR.TBR0              4   Timebase Rate Selection 0
TBCR.TACK              3   Timebase ACKnowledge
TBCR.TBIE              2   Timebase Interrupt Enabled
TBCR.TBON              1   Timebase Enabled
INTSCR                0x001D     IRQ Status and Control Register
INTSCR.IRQF1           3   IRQ Flag Bit
INTSCR.ACK1            2   IRQ Interrupt Request Acknowledge Bit
INTSCR.IMASK1          1   IRQ Interrupt Mask Bit
INTSCR.MODE1           0   IRQ Edge/Level Select Bit
CONFIG2               0x001E     Configuration Register 2
CONFIG2.OSCSTOPENB     1   Oscillator Stop Mode Enable Bar Bit
CONFIG2.SCIBDSRC       0   SCI Baud Rate Clock Source Bit
CONFIG1               0x001F     Configuration Register 1
CONFIG1.COPRS          7   COP Rate Select Bit
CONFIG1.LVISTOP        6   LVI Enable in Stop Mode Bit
CONFIG1.LVIRSTD        5   LVI Reset Disable Bit
CONFIG1.LVIPWRD        4   LVI Power Disable Bit
CONFIG1.LVI5OR3        3   LVI 5V or 3V Operating Mode Bit
CONFIG1.SSREC          2   Short Stop Recovery Bit
CONFIG1.STOP           1   STOP Instruction Enable Bit
CONFIG1.COPD           0   COP Disable Bit
T1SC                  0x0020     Timer 1 Status and Control Register
T1SC.TOF               7   TIM Overflow Flag Bit
T1SC.TOIE              6   TIM Overflow Interrupt Enable Bit
T1SC.TSTOP             5   TIM Stop Bit
T1SC.TRST              4   TIM Reset Bit
T1SC.PS2               2   Prescaler Select Bits 2
T1SC.PS1               1   Prescaler Select Bits 1
T1SC.PS0               0   Prescaler Select Bits 0
T1CNTH                0x0021     Timer 1 Counter Register High
T1CNTL                0x0022     Timer 1 Counter Register Low
T1MODH                0x0023     Timer 1 Counter Modulo Register High
T1MODL                0x0024     Timer 1 Counter Modulo Register Low
T1SC0                 0x0025     Timer 1 Channel 0 Status and Control Register
T1SC0.CH0F             7   Channel 0 Flag Bit
T1SC0.CH0IE            6   Channel 0 Interrupt Enable Bit
T1SC0.MS0B             5   Mode Select Bit B
T1SC0.MS0A             4   Mode Select Bit A
T1SC0.ELS0B            3   Edge/Level Select Bits
T1SC0.ELS0A            2   Edge/Level Select Bits
T1SC0.TOV0             1   Toggle On Overflow Bit
T1SC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
T1CH0H                0x0026     Timer 1 Channel 0 Register High
T1CH0L                0x0027     Timer 1 Channel 0 Register Low
T1SC1                 0x0028     Timer 1 Channel 1 Status and Control Register
T1SC1.CH1F             7   Channel 0 Flag Bit            
T1SC1.CH1IE            6   Channel 0 Interrupt Enable Bit
T1SC1.MS1A             4   Mode Select Bit A               
T1SC1.ELS1B            3   Edge/Level Select Bits          
T1SC1.ELS1A            2   Edge/Level Select Bits          
T1SC1.TOV1             1   Toggle On Overflow Bit          
T1SC1.CH1MAX           0   Channel 0 Maximum Duty Cycle Bit
T1CH1H                0x0029     Timer 1 Channel 1 Register High
T1CH1L                0x002A     Timer 1 Channel 1 Register Low
T2SC                  0x002B     Timer 2 Status and Control Register
T2SC.TOF               7   TIM Overflow Flag Bit            
T2SC.TOIE              6   TIM Overflow Interrupt Enable Bit
T2SC.TSTOP             5   TIM Stop Bit                     
T2SC.TRST              4   TIM Reset Bit                    
T2SC.PS2               2   Prescaler Select Bits 2          
T2SC.PS1               1   Prescaler Select Bits 1          
T2SC.PS0               0   Prescaler Select Bits 0          
T2CNTH                0x002C     Timer 2 Counter Register High
T2CNTL                0x002D     Timer 2 Counter Register Low
T2MODH                0x002E     Timer 2 Counter Modulo Register High
T2MODL                0x002F     Timer 2 Counter Modulo Register Low
T2SC0                 0x0030     Timer 2 Channel 0 Status and Control Register
T2SC0.CH0F             7   Channel 0 Flag Bit            
T2SC0.CH0IE            6   Channel 0 Interrupt Enable Bit
T2SC0.MS0B             5   Mode Select Bit B               
T2SC0.MS0A             4   Mode Select Bit A               
T2SC0.ELS0B            3   Edge/Level Select Bits          
T2SC0.ELS0A            2   Edge/Level Select Bits          
T2SC0.TOV0             1   Toggle On Overflow Bit          
T2SC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
T2CH0H                0x0031     Timer 2 Channel 0 Register High
T2CH0L                0x0032     Timer 2 Channel 0 Register Low
UNUSED0033            0x0033     UNUSED
UNUSED0034            0x0034     UNUSED
UNUSED0035            0x0035     UNUSED
PCTL                  0x0036     PLL Control Register
PCTL.PLLIE             7   PLL Interrupt Enable Bit
PCTL.PLLF              6   PLL Interrupt Flag Bit
PCTL.PLLON             5   PLL On Bit
PCTL.BCS               4   Base Clock Select Bit
PCTL.PRE1              3   Prescaler Program Bits 1
PCTL.PRE0              2   Prescaler Program Bits 0
PCTL.VPR1              1   VCO Power-of-Two Range Select Bits 1
PCTL.VPR0              0   VCO Power-of-Two Range Select Bits 0
PBWC                  0x0037     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               5   Acquisition Mode Bit
PMSH                  0x0038     PLL Multiplier Select High Register
PMSH.MUL11             3   Multiplier Select Bits 11
PMSH.MUL10             2   Multiplier Select Bits 10
PMSH.MUL9              1   Multiplier Select Bits 9
PMSH.MUL8              0   Multiplier Select Bits 8
PMSL                  0x0039     PLL Multiplier Select Low Register
PMSL.MUL7              7   Multiplier Select Bits 7
PMSL.MUL6              6   Multiplier Select Bits 6
PMSL.MUL5              5   Multiplier Select Bits 5
PMSL.MUL4              4   Multiplier Select Bits 4
PMSL.MUL3              3   Multiplier Select Bits 3
PMSL.MUL2              2   Multiplier Select Bits 2
PMSL.MUL1              1   Multiplier Select Bits 1
PMSL.MUL0              0   Multiplier Select Bits 0
PMRS                  0x003A     PLL VCO Select Range Register
PMRS.VRS7              7   VCO Range Select Bits 7
PMRS.VRS6              6   VCO Range Select Bits 6
PMRS.VRS5              5   VCO Range Select Bits 5
PMRS.VRS4              4   VCO Range Select Bits 4
PMRS.VRS3              3   VCO Range Select Bits 3
PMRS.VRS2              2   VCO Range Select Bits 2
PMRS.VRS1              1   VCO Range Select Bits 1
PMRS.VRS0              0   VCO Range Select Bits 0
PMDS                  0x003B     PLL Reference Divider Select Register
PMDS.RDS3              3   Reference Divider Select Bits 3
PMDS.RDS2              2   Reference Divider Select Bits 2
PMDS.RDS1              1   Reference Divider Select Bits 1
PMDS.RDS0              0   Reference Divider Select Bits 0
ADSCR                 0x003C     and Control Register Analog-to-Digital Status
ADSCR.COCO             7   Conversions Complete/Interrupt DMA Select Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADR                   0x003D     Analog-to-Digital Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADCLK                 0x003E     Analog-to-Digital Input Clock Register
ADCLK.ADIV2            7   ADC Clock Prescaler Bits 2
ADCLK.ADIV1            6   ADC Clock Prescaler Bits 1
ADCLK.ADIV0            5   ADC Clock Prescaler Bits 0
ADCLK.ADICLK           4   ADC Input Clock Select Bit
UNUSED003F            0x003F     UNUSED
SBSR                  0xFE00     SIM Break Status Register
SBSR.SBSW              1   Break Wait Bit
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Flag
SRSR.PIN               6   External Reset Flag
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF6               7   Interrupt Flags 6
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF2               3   Interrupt Flags 2
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flags 14
INT2.IF13              6   Interrupt Flags 13
INT2.IF12              5   Interrupt Flags 12
INT2.IF11              4   Interrupt Flags 11
INT2.IF10              3   Interrupt Flags 10
INT2.IF9               2   Interrupt Flags 9
INT2.IF8               1   Interrupt Flags 8
INT2.IF7               0   Interrupt Flags 7
INT3                  0xFE06     Interrupt Status Register 3
INT3.IF16              1   Interrupt Flags 16
INT3.IF15              0   Interrupt Flags 15
FLTCR                 0xFE07     FLASH Test Control Register
FLCR                  0xFE08     FLASH Control Register
FLCR.HVEN              3   High-Voltage Enable Bit
FLCR.MASS              2   Mass Erase Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
BRKH                  0xFE09     Break Address Register High
BRKL                  0xFE0A     Break Address Register Low
BRKSCR                0xFE0B     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
LVISR                 0xFE0C     LVI Status Register
LVISR.LVIOUT           7   LVI Output Bit
FLBPR                 0xFF7E     FLASH Block Protect Register
FLBPR.BPR7             7   FLASH Block Protect Bits 7
FLBPR.BPR6             6   FLASH Block Protect Bits 6
FLBPR.BPR5             5   FLASH Block Protect Bits 5
FLBPR.BPR4             4   FLASH Block Protect Bits 4
FLBPR.BPR3             3   FLASH Block Protect Bits 3
FLBPR.BPR2             2   FLASH Block Protect Bits 2
FLBPR.BPR1             1   FLASH Block Protect Bits 1
FLBPR.BPR0             0   FLASH Block Protect Bits 0
ReservFFEE            0xFFEE     Reserved
ReservFFEF            0xFFEF     Reserved
COPCTL                0xFFFF     COP Control Register


.68HC08JB1
; MC68HC08JB1/D  http://
; MC68HC08JB1.pdf


; MEMORY MAP
area DATA FSR		   0x0000:0x0040
area BSS  UNIMPLEMENTED	   0x0040:0x0080
area DATA RAM		   0x0080:0x0100
area BSS  UNIMPLEMENTED	   0x0100:0xE600
area DATA ROM		   0xE600:0xFC00
area BSS  RESERVED	   0xFC00:0xFE01
area DATA FSR_1		   0xFE01:0xFE05
area BSS  RESERVED	   0xFE05:0xFE10
area DATA Monitor_ROM	   0xFE10:0xFFE0
area DATA USER_VEC	   0xFFE0:0x10000


; Interrupt and reset vector assignments
interrupt __RESET     0xFFFE       Reset Vector
interrupt SWI         0xFFFC       SWI Vector
interrupt USB         0xFFFA       USB Vector
interrupt IRQ1        0xFFF8       IRQ1 Vector
interrupt TIM_CH0     0xFFF6       TIM Channel 0 Vector
interrupt TIM_CH1     0xFFF4       TIM Channel 1 Vector
interrupt TIM         0xFFF2       TIM Overflow Vector
interrupt KBRD        0xFFF0       Keyboard Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bit 7
PTA.PTA6               6   Port A Data Bit 6
PTA.PTA5               5   Port A Data Bit 5
PTA.PTA4               4   Port A Data Bit 4
PTA.PTA3               3   Port A Data Bit 3
PTA.PTA2               2   Port A Data Bit 2
PTA.PTA1               1   Port A Data Bit 1
PTA.PTA0               0   Port A Data Bit 0
UNUSED0001            0x0001     UNUSED
PTC                   0x0002     Port C Data Register
PTC.PTC0               0   Port C Data Bit 0
PTD                   0x0003     Port D Data Register
PTD.PTD1               1   Port D Data Bit 1
PTD.PTD0               0   Port D Data Bit 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bit 7
DDRA.DDRA6             6   Data Direction Register A Bit 6
DDRA.DDRA5             5   Data Direction Register A Bit 5
DDRA.DDRA4             4   Data Direction Register A Bit 4
DDRA.DDRA3             3   Data Direction Register A Bit 3
DDRA.DDRA2             2   Data Direction Register A Bit 2
DDRA.DDRA1             1   Data Direction Register A Bit 1
DDRA.DDRA0             0   Data Direction Register A Bit 0
UNUSED0005            0x0005     UNUSED
DDRC                  0x0006     Data Direction Register C
DDRC.DDRC0             0   Data Direction Register C Bit 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD1             1   Data Direction Register D Bit 1
DDRD.DDRD0             0   Data Direction Register D Bit 0
PTE                   0x0008     Port E Data Register
PTE.PTE4               4   Port E Data Bit 4
PTE.PTE3               3   Port E Data Bit 3
PTE.PTE1               1   Port E Data Bit 1
DDRE                  0x0009     Data Direction Register E
DDRE.DDRE4             4   Data Direction Register E Bit 4
DDRE.DDRE3             3   Data Direction Register E Bit 3
DDRE.DDRE1             1   Data Direction Register E Bit 1
TSC                   0x000A     TIM Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
UNUSED000B            0x000B     UNUSED
TCNTH                 0x000C     TIM Counter Register High
TCNTL                 0x000D     TIM Counter Register Low
TMODH                 0x000E     TIM Counter Modulo Register High
TMODL                 0x000F     TIM Counter Modulo Register Low
TSC0                  0x0010     TIM Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit
TSC0.MS0B              5   Mode Select Bit B
TSC0.MS0A              4   Mode Select Bit A
TSC0.ELS0B             3   Edge/Level Select Bits
TSC0.ELS0A             2   Edge/Level Select Bits
TSC0.TOV0              1   Toggle-On-Overflow Bit
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0011     TIM Channel 0 Register High
TCH0L                 0x0012     TIM Channel 0 Register Low
TSC1                  0x0013     TIM Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 1 Flag Bit            
TSC1.CH1IE             6   Channel 1 Interrupt Enable Bit
TSC1.MS1A              4   Mode Select Bit A               
TSC1.ELS1B             3   Edge/Level Select Bits          
TSC1.ELS1A             2   Edge/Level Select Bits          
TSC1.TOV1              1   Toggle-On-Overflow Bit          
TSC1.CH1MAX            0   Channel 1 Maximum Duty Cycle Bit
TCH1H                 0x0014     TIM Channel 1 Register High
TCH1L                 0x0015     TIM Channel 1 Register Low
KBSCR                 0x0016     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
KBIER                 0x0017     Keyboard Interrupt Enable Register
KBIER.KBIE7            7   Keyboard Interrupt Enable Bits 7
KBIER.KBIE6            6   Keyboard Interrupt Enable Bits 6
KBIER.KBIE5            5   Keyboard Interrupt Enable Bits 5
KBIER.KBIE4            4   Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Keyboard Interrupt Enable Bits 0
UIR2                  0x0018     USB Interrupt Register 2
UIR2.EOPFR             7   End-of-Packet Flag Reset
UIR2.RSTFR             6   Clear Reset Indicator Bit
UIR2.TXD2FR            5   Endpoint 2 Transmit Flag Reset
UIR2.TDX1FR            3   Endpoint 1 Transmit Flag Reset
UIR2.RESUMFR           2   Resume Flag Reset
UIR2.TXD0FR            1   Endpoint 0 Transmit Flag Reset
UIR2.RXD0FR            0   Endpoint 0 Receive Flag Reset
UCR2                  0x0019     USB Control Register 2
UCR2.T2SEQ             7   Endpoint 2 Transmit Sequence Bit
UCR2.STALL2            6   Endpoint 2 Force Stall Bit
UCR2.TX2E              5   Endpoint 2 Transmit Enable
UCR2.TP2SIZ3           3   Endpoint 2 Transmit Data Packet Size 3
UCR2.TP2SIZ2           2   Endpoint 2 Transmit Data Packet Size 2
UCR2.TP2SIZ1           1   Endpoint 2 Transmit Data Packet Size 1
UCR2.TP2SIZ0           0   Endpoint 2 Transmit Data Packet Size 0
UCR3                  0x001A     USB Control Register 3
UCR3.TX1ST             7   Endpoint 0 Transmit First Flag
UCR3.TX1STR            6   Clear Endpoint 0 Transmit First Flag
UCR3.OSTALL0           5   Endpoint 0 Force STALL Bit for OUT token
UCR3.ISTALL0           4   Endpoint 0 Force STALL Bit for IN token
UCR3.PULLEN            2   Pull-up Enable
UCR3.ENABLE2           1   Endpoint 2 Enable
UCR3.ENABLE1           0   Endpoint 1 Enable
UCR4                  0x001B     USB Control Register 4
UCR4.FUSBO             2   Force USB Output
UCR4.FDP               1   Force D+
UCR4.FDM               0   Force D-
IOCR                  0x001C     IRQ Option Control Register
IOCR.PTE4IF            2   PTE4 Interrupt Flag
IOCR.PTE4IE            1   PTE4 Interrupt Enable
IOCR.IRQPD             0   IRQ Pullup Disable
POCR                  0x001D     Port Option Control Register
POCR.PTE20P            7   PTE1 pin Pullup Enable
POCR.PTDILDD           5   Infrared LED Drive Control
POCR.PTE4P             4   Pin PTE4 Pullup Enable
POCR.PTE3P             3   Pin PTE3 Pullup Enable
POCR.PCP               2   Port C Pullup Enable
POCR.PAP               0   Port A Pullup Enable
ISCR                  0x001E     IRQ Status and Control Register
ISCR.IRQF1             3   IRQ1 Flag
ISCR.ACK1              2   IRQ1 Interrupt Request Acknowledge Bit
ISCR.IMASK1            1   IRQ1 Interrupt Mask Bit
ISCR.MODE1             0   IRQ1 Edge/Level Select Bit
CONFIG                0x001F     Configuration Register
CONFIG.URSTD           5   USB Reset Disable Bit
CONFIG.LVID            4   Low Voltage Inhibit Disable Bit
CONFIG.SSREC           3   Short Stop Recovery Bit
CONFIG.COPRS           2   COP Rate Select Bit
CONFIG.STOP            1   STOP Instruction Enable Bit
CONFIG.COPD            0   COP Disable Bit
UE0D0                 0x0020     USB Endpoint 0 Data Register 0
UE0D0.UE0R07_UE0T07    7   Endpoint 0 Receive/Transmit Data Buffer 7
UE0D0.UE0R06_UE0T06    6   Endpoint 0 Receive/Transmit Data Buffer 6
UE0D0.UE0R05_UE0T05    5   Endpoint 0 Receive/Transmit Data Buffer 5
UE0D0.UE0R04_UE0T04    4   Endpoint 0 Receive/Transmit Data Buffer 4
UE0D0.UE0R03_UE0T03    3   Endpoint 0 Receive/Transmit Data Buffer 3
UE0D0.UE0R02_UE0T02    2   Endpoint 0 Receive/Transmit Data Buffer 2
UE0D0.UE0R01_UE0T01    1   Endpoint 0 Receive/Transmit Data Buffer 1
UE0D0.UE0R00_UE0T00    0   Endpoint 0 Receive/Transmit Data Buffer 0
UE0D1                 0x0021     USB Endpoint 0 Data Register 1
UE0D1.UE0R17_UE0T17    7   Endpoint 0 Receive/Transmit Data Buffer 7
UE0D1.UE0R16_UE0T16    6   Endpoint 0 Receive/Transmit Data Buffer 6
UE0D1.UE0R15_UE0T15    5   Endpoint 0 Receive/Transmit Data Buffer 5
UE0D1.UE0R14_UE0T14    4   Endpoint 0 Receive/Transmit Data Buffer 4
UE0D1.UE0R13_UE0T13    3   Endpoint 0 Receive/Transmit Data Buffer 3
UE0D1.UE0R12_UE0T12    2   Endpoint 0 Receive/Transmit Data Buffer 2
UE0D1.UE0R11_UE0T11    1   Endpoint 0 Receive/Transmit Data Buffer 1
UE0D1.UE0R10_UE0T10    0   Endpoint 0 Receive/Transmit Data Buffer 0
UE0D2                 0x0022     USB Endpoint 0 Data Register 2
UE0D2.UE0R27_UE0T27    7   Endpoint 0 Receive/Transmit Data Buffer 7
UE0D2.UE0R26_UE0T26    6   Endpoint 0 Receive/Transmit Data Buffer 6
UE0D2.UE0R25_UE0T25    5   Endpoint 0 Receive/Transmit Data Buffer 5
UE0D2.UE0R24_UE0T24    4   Endpoint 0 Receive/Transmit Data Buffer 4
UE0D2.UE0R23_UE0T23    3   Endpoint 0 Receive/Transmit Data Buffer 3
UE0D2.UE0R22_UE0T22    2   Endpoint 0 Receive/Transmit Data Buffer 2
UE0D2.UE0R21_UE0T21    1   Endpoint 0 Receive/Transmit Data Buffer 1
UE0D2.UE0R20_UE0T20    0   Endpoint 0 Receive/Transmit Data Buffer 0
UE0D3                 0x0023     USB Endpoint 0 Data Register 3
UE0D3.UE0R37_UE0T37    7   Endpoint 0 Receive/Transmit Data Buffer 7
UE0D3.UE0R36_UE0T36    6   Endpoint 0 Receive/Transmit Data Buffer 6
UE0D3.UE0R35_UE0T35    5   Endpoint 0 Receive/Transmit Data Buffer 5
UE0D3.UE0R34_UE0T34    4   Endpoint 0 Receive/Transmit Data Buffer 4
UE0D3.UE0R33_UE0T33    3   Endpoint 0 Receive/Transmit Data Buffer 3
UE0D3.UE0R32_UE0T32    2   Endpoint 0 Receive/Transmit Data Buffer 2
UE0D3.UE0R31_UE0T31    1   Endpoint 0 Receive/Transmit Data Buffer 1
UE0D3.UE0R30_UE0T30    0   Endpoint 0 Receive/Transmit Data Buffer 0
UE0D4                 0x0024     USB Endpoint 0 Data Register 4
UE0D4.UE0R47_UE0T47    7   Endpoint 0 Receive/Transmit Data Buffer 7
UE0D4.UE0R46_UE0T46    6   Endpoint 0 Receive/Transmit Data Buffer 6
UE0D4.UE0R45_UE0T45    5   Endpoint 0 Receive/Transmit Data Buffer 5
UE0D4.UE0R44_UE0T44    4   Endpoint 0 Receive/Transmit Data Buffer 4
UE0D4.UE0R43_UE0T43    3   Endpoint 0 Receive/Transmit Data Buffer 3
UE0D4.UE0R42_UE0T42    2   Endpoint 0 Receive/Transmit Data Buffer 2
UE0D4.UE0R41_UE0T41    1   Endpoint 0 Receive/Transmit Data Buffer 1
UE0D4.UE0R40_UE0T40    0   Endpoint 0 Receive/Transmit Data Buffer 0
UE0D5                 0x0025     USB Endpoint 0 Data Register 5
UE0D5.UE0R57_UE0T57    7   Endpoint 0 Receive/Transmit Data Buffer 7
UE0D5.UE0R56_UE0T56    6   Endpoint 0 Receive/Transmit Data Buffer 6
UE0D5.UE0R55_UE0T55    5   Endpoint 0 Receive/Transmit Data Buffer 5
UE0D5.UE0R54_UE0T54    4   Endpoint 0 Receive/Transmit Data Buffer 4
UE0D5.UE0R53_UE0T53    3   Endpoint 0 Receive/Transmit Data Buffer 3
UE0D5.UE0R52_UE0T52    2   Endpoint 0 Receive/Transmit Data Buffer 2
UE0D5.UE0R51_UE0T51    1   Endpoint 0 Receive/Transmit Data Buffer 1
UE0D5.UE0R50_UE0T50    0   Endpoint 0 Receive/Transmit Data Buffer 0
UE0D6                 0x0026     USB Endpoint 0 Data Register 6
UE0D6.UE0R67_UE0T67    7   Endpoint 0 Receive/Transmit Data Buffer 7
UE0D6.UE0R66_UE0T66    6   Endpoint 0 Receive/Transmit Data Buffer 6
UE0D6.UE0R65_UE0T65    5   Endpoint 0 Receive/Transmit Data Buffer 5
UE0D6.UE0R64_UE0T64    4   Endpoint 0 Receive/Transmit Data Buffer 4
UE0D6.UE0R63_UE0T63    3   Endpoint 0 Receive/Transmit Data Buffer 3
UE0D6.UE0R62_UE0T62    2   Endpoint 0 Receive/Transmit Data Buffer 2
UE0D6.UE0R61_UE0T61    1   Endpoint 0 Receive/Transmit Data Buffer 1
UE0D6.UE0R60_UE0T60    0   Endpoint 0 Receive/Transmit Data Buffer 0
UE0D7                 0x0027     USB Endpoint 0 Data Register 7
UE0D7.UE0R77_UE0T77    7   Endpoint 0 Receive/Transmit Data Buffer 7
UE0D7.UE0R76_UE0T76    6   Endpoint 0 Receive/Transmit Data Buffer 6
UE0D7.UE0R75_UE0T75    5   Endpoint 0 Receive/Transmit Data Buffer 5
UE0D7.UE0R74_UE0T74    4   Endpoint 0 Receive/Transmit Data Buffer 4
UE0D7.UE0R73_UE0T73    3   Endpoint 0 Receive/Transmit Data Buffer 3
UE0D7.UE0R72_UE0T72    2   Endpoint 0 Receive/Transmit Data Buffer 2
UE0D7.UE0R71_UE0T71    1   Endpoint 0 Receive/Transmit Data Buffer 1
UE0D7.UE0R70_UE0T70    0   Endpoint 0 Receive/Transmit Data Buffer 0
UE1D0                 0x0028     USB Endpoint 1 Data Register 0
UE1D0.UE1T07           7   Endpoint 1 Transmit or Receive Data Buffer 7
UE1D0.UE1T06           6   Endpoint 1 Transmit or Receive Data Buffer 6
UE1D0.UE1T05           5   Endpoint 1 Transmit or Receive Data Buffer 5
UE1D0.UE1T04           4   Endpoint 1 Transmit or Receive Data Buffer 4
UE1D0.UE1T03           3   Endpoint 1 Transmit or Receive Data Buffer 3
UE1D0.UE1T02           2   Endpoint 1 Transmit or Receive Data Buffer 2
UE1D0.UE1T01           1   Endpoint 1 Transmit or Receive Data Buffer 1
UE1D0.UE1T00           0   Endpoint 1 Transmit or Receive Data Buffer 0
UE1D1                 0x0029     USB Endpoint 1 Data Register 1
UE1D1.UE1T17           7   Endpoint 1 Transmit or Receive Data Buffer 7
UE1D1.UE1T16           6   Endpoint 1 Transmit or Receive Data Buffer 6
UE1D1.UE1T15           5   Endpoint 1 Transmit or Receive Data Buffer 5
UE1D1.UE1T14           4   Endpoint 1 Transmit or Receive Data Buffer 4
UE1D1.UE1T13           3   Endpoint 1 Transmit or Receive Data Buffer 3
UE1D1.UE1T12           2   Endpoint 1 Transmit or Receive Data Buffer 2
UE1D1.UE1T11           1   Endpoint 1 Transmit or Receive Data Buffer 1
UE1D1.UE1T10           0   Endpoint 1 Transmit or Receive Data Buffer 0
UE1D2                 0x002A     USB Endpoint 1 Data Register 2
UE1D2.UE1T27           7   Endpoint 1 Transmit or Receive Data Buffer 7
UE1D2.UE1T26           6   Endpoint 1 Transmit or Receive Data Buffer 6
UE1D2.UE1T25           5   Endpoint 1 Transmit or Receive Data Buffer 5
UE1D2.UE1T24           4   Endpoint 1 Transmit or Receive Data Buffer 4
UE1D2.UE1T23           3   Endpoint 1 Transmit or Receive Data Buffer 3
UE1D2.UE1T22           2   Endpoint 1 Transmit or Receive Data Buffer 2
UE1D2.UE1T21           1   Endpoint 1 Transmit or Receive Data Buffer 1
UE1D2.UE1T20           0   Endpoint 1 Transmit or Receive Data Buffer 0
UE1D3                 0x002B     USB Endpoint 1 Data Register 3
UE1D3.UE1T37           7   Endpoint 1 Transmit or Receive Data Buffer 7
UE1D3.UE1T36           6   Endpoint 1 Transmit or Receive Data Buffer 6
UE1D3.UE1T35           5   Endpoint 1 Transmit or Receive Data Buffer 5
UE1D3.UE1T34           4   Endpoint 1 Transmit or Receive Data Buffer 4
UE1D3.UE1T33           3   Endpoint 1 Transmit or Receive Data Buffer 3
UE1D3.UE1T32           2   Endpoint 1 Transmit or Receive Data Buffer 2
UE1D3.UE1T31           1   Endpoint 1 Transmit or Receive Data Buffer 1
UE1D3.UE1T30           0   Endpoint 1 Transmit or Receive Data Buffer 0
UE1D4                 0x002C     USB Endpoint 1 Data Register 4
UE1D4.UE1T47           7   Endpoint 1 Transmit or Receive Data Buffer 7
UE1D4.UE1T46           6   Endpoint 1 Transmit or Receive Data Buffer 6
UE1D4.UE1T45           5   Endpoint 1 Transmit or Receive Data Buffer 5
UE1D4.UE1T44           4   Endpoint 1 Transmit or Receive Data Buffer 4
UE1D4.UE1T43           3   Endpoint 1 Transmit or Receive Data Buffer 3
UE1D4.UE1T42           2   Endpoint 1 Transmit or Receive Data Buffer 2
UE1D4.UE1T41           1   Endpoint 1 Transmit or Receive Data Buffer 1
UE1D4.UE1T40           0   Endpoint 1 Transmit or Receive Data Buffer 0
UE1D5                 0x002D     USB Endpoint 1 Data Register 5
UE1D5.UE1T57           7   Endpoint 1 Transmit or Receive Data Buffer 7
UE1D5.UE1T56           6   Endpoint 1 Transmit or Receive Data Buffer 6
UE1D5.UE1T55           5   Endpoint 1 Transmit or Receive Data Buffer 5
UE1D5.UE1T54           4   Endpoint 1 Transmit or Receive Data Buffer 4
UE1D5.UE1T53           3   Endpoint 1 Transmit or Receive Data Buffer 3
UE1D5.UE1T52           2   Endpoint 1 Transmit or Receive Data Buffer 2
UE1D5.UE1T51           1   Endpoint 1 Transmit or Receive Data Buffer 1
UE1D5.UE1T50           0   Endpoint 1 Transmit or Receive Data Buffer 0
UE1D6                 0x002E     USB Endpoint 1 Data Register 6
UE1D6.UE1T67           7   Endpoint 1 Transmit or Receive Data Buffer 7
UE1D6.UE1T66           6   Endpoint 1 Transmit or Receive Data Buffer 6
UE1D6.UE1T65           5   Endpoint 1 Transmit or Receive Data Buffer 5
UE1D6.UE1T64           4   Endpoint 1 Transmit or Receive Data Buffer 4
UE1D6.UE1T63           3   Endpoint 1 Transmit or Receive Data Buffer 3
UE1D6.UE1T62           2   Endpoint 1 Transmit or Receive Data Buffer 2
UE1D6.UE1T61           1   Endpoint 1 Transmit or Receive Data Buffer 1
UE1D6.UE1T60           0   Endpoint 1 Transmit or Receive Data Buffer 0
UE1D7                 0x002F     USB Endpoint 1 Data Register 7
UE1D7.UE1T77           7   Endpoint 1 Transmit or Receive Data Buffer 7
UE1D7.UE1T76           6   Endpoint 1 Transmit or Receive Data Buffer 6
UE1D7.UE1T75           5   Endpoint 1 Transmit or Receive Data Buffer 5
UE1D7.UE1T74           4   Endpoint 1 Transmit or Receive Data Buffer 4
UE1D7.UE1T73           3   Endpoint 1 Transmit or Receive Data Buffer 3
UE1D7.UE1T72           2   Endpoint 1 Transmit or Receive Data Buffer 2
UE1D7.UE1T71           1   Endpoint 1 Transmit or Receive Data Buffer 1
UE1D7.UE1T70           0   Endpoint 1 Transmit or Receive Data Buffer 0
UE2D0                 0x0030     USB Endpoint 2 Data Register 0
UE2D0.UE2T07           7   Endpoint 2 Transmit Data Buffer 7
UE2D0.UE2T06           6   Endpoint 2 Transmit Data Buffer 6
UE2D0.UE2T05           5   Endpoint 2 Transmit Data Buffer 5
UE2D0.UE2T04           4   Endpoint 2 Transmit Data Buffer 4
UE2D0.UE2T03           3   Endpoint 2 Transmit Data Buffer 3
UE2D0.UE2T02           2   Endpoint 2 Transmit Data Buffer 2
UE2D0.UE2T01           1   Endpoint 2 Transmit Data Buffer 1
UE2D0.UE2T00           0   Endpoint 2 Transmit Data Buffer 0
UE2D1                 0x0031     USB Endpoint 2 Data Register 1
UE2D1.UE2T17           7   Endpoint 2 Transmit Data Buffer 7
UE2D1.UE2T16           6   Endpoint 2 Transmit Data Buffer 6
UE2D1.UE2T15           5   Endpoint 2 Transmit Data Buffer 5
UE2D1.UE2T14           4   Endpoint 2 Transmit Data Buffer 4
UE2D1.UE2T13           3   Endpoint 2 Transmit Data Buffer 3
UE2D1.UE2T12           2   Endpoint 2 Transmit Data Buffer 2
UE2D1.UE2T11           1   Endpoint 2 Transmit Data Buffer 1
UE2D1.UE2T10           0   Endpoint 2 Transmit Data Buffer 0
UE2D2                 0x0032     USB Endpoint 2 Data Register 2
UE2D2.UE2T27           7   Endpoint 2 Transmit Data Buffer 7
UE2D2.UE2T26           6   Endpoint 2 Transmit Data Buffer 6
UE2D2.UE2T25           5   Endpoint 2 Transmit Data Buffer 5
UE2D2.UE2T24           4   Endpoint 2 Transmit Data Buffer 4
UE2D2.UE2T23           3   Endpoint 2 Transmit Data Buffer 3
UE2D2.UE2T22           2   Endpoint 2 Transmit Data Buffer 2
UE2D2.UE2T21           1   Endpoint 2 Transmit Data Buffer 1
UE2D2.UE2T20           0   Endpoint 2 Transmit Data Buffer 0
UE2D3                 0x0033     USB Endpoint 2 Data Register 3
UE2D3.UE2T37           7   Endpoint 2 Transmit Data Buffer 7
UE2D3.UE2T36           6   Endpoint 2 Transmit Data Buffer 6
UE2D3.UE2T35           5   Endpoint 2 Transmit Data Buffer 5
UE2D3.UE2T34           4   Endpoint 2 Transmit Data Buffer 4
UE2D3.UE2T33           3   Endpoint 2 Transmit Data Buffer 3
UE2D3.UE2T32           2   Endpoint 2 Transmit Data Buffer 2
UE2D3.UE2T31           1   Endpoint 2 Transmit Data Buffer 1
UE2D3.UE2T30           0   Endpoint 2 Transmit Data Buffer 0
UE2D4                 0x0034     USB Endpoint 2 Data Register 4
UE2D4.UE2T47           7   Endpoint 2 Transmit Data Buffer 7
UE2D4.UE2T46           6   Endpoint 2 Transmit Data Buffer 6
UE2D4.UE2T45           5   Endpoint 2 Transmit Data Buffer 5
UE2D4.UE2T44           4   Endpoint 2 Transmit Data Buffer 4
UE2D4.UE2T43           3   Endpoint 2 Transmit Data Buffer 3
UE2D4.UE2T42           2   Endpoint 2 Transmit Data Buffer 2
UE2D4.UE2T41           1   Endpoint 2 Transmit Data Buffer 1
UE2D4.UE2T40           0   Endpoint 2 Transmit Data Buffer 0
UE2D5                 0x0035     USB Endpoint 2 Data Register 5
UE2D5.UE2T57           7   Endpoint 2 Transmit Data Buffer 7
UE2D5.UE2T56           6   Endpoint 2 Transmit Data Buffer 6
UE2D5.UE2T55           5   Endpoint 2 Transmit Data Buffer 5
UE2D5.UE2T54           4   Endpoint 2 Transmit Data Buffer 4
UE2D5.UE2T53           3   Endpoint 2 Transmit Data Buffer 3
UE2D5.UE2T52           2   Endpoint 2 Transmit Data Buffer 2
UE2D5.UE2T51           1   Endpoint 2 Transmit Data Buffer 1
UE2D5.UE2T50           0   Endpoint 2 Transmit Data Buffer 0
UE2D6                 0x0036     USB Endpoint 2 Data Register 6
UE2D6.UE2T67           7   Endpoint 2 Transmit Data Buffer 7
UE2D6.UE2T66           6   Endpoint 2 Transmit Data Buffer 6
UE2D6.UE2T65           5   Endpoint 2 Transmit Data Buffer 5
UE2D6.UE2T64           4   Endpoint 2 Transmit Data Buffer 4
UE2D6.UE2T63           3   Endpoint 2 Transmit Data Buffer 3
UE2D6.UE2T62           2   Endpoint 2 Transmit Data Buffer 2
UE2D6.UE2T61           1   Endpoint 2 Transmit Data Buffer 1
UE2D6.UE2T60           0   Endpoint 2 Transmit Data Buffer 0
UE2D7                 0x0037     USB Endpoint 2 Data Register 7
UE2D7.UE2T77           7   Endpoint 2 Transmit Data Buffer 7
UE2D7.UE2T76           6   Endpoint 2 Transmit Data Buffer 6
UE2D7.UE2T75           5   Endpoint 2 Transmit Data Buffer 5
UE2D7.UE2T74           4   Endpoint 2 Transmit Data Buffer 4
UE2D7.UE2T73           3   Endpoint 2 Transmit Data Buffer 3
UE2D7.UE2T72           2   Endpoint 2 Transmit Data Buffer 2
UE2D7.UE2T71           1   Endpoint 2 Transmit Data Buffer 1
UE2D7.UE2T70           0   Endpoint 2 Transmit Data Buffer 0
UADDR                 0x0038     USB Address Register
UADDR.USBEN            7   USB Module Enable
UADDR.UADD6            6   USB Function Address 6
UADDR.UADD5            5   USB Function Address 5
UADDR.UADD4            4   USB Function Address 4
UADDR.UADD3            3   USB Function Address 3
UADDR.UADD2            2   USB Function Address 2
UADDR.UADD1            1   USB Function Address 1
UADDR.UADD0            0   USB Function Address 0
UIR0                  0x0039     USB Interrupt Register 0
UIR0.EOPIE             7   End-of-Packet Detect Interrupt Enable
UIR0.SUSPND            6   USB Suspend Bit
UIR0.TXD2IE            5   Endpoint 2 Transmit Interrupt Enable
UIR0.TXD1IE            3   Endpoint 1 Transmit Interrupt Enable
UIR0.TXD0IE            1   Endpoint 0 Transmit Interrupt Enable
UIR0.RXD0IE            0   Endpoint 0 Receive Interrupt Enable
UIR1                  0x003A     USB Interrupt Register 1
UIR1.EOPF              7   End-of-Packet Detect Flag
UIR1.RSTF              6   USB Reset Flag
UIR1.TXD2F             5   Endpoint 2 Data Transmit Flag
UIR1.TXD1F             3   Endpoint 1 Data Transmit Flag
UIR1.RESUMF            2   Resume Flag
UIR1.TXD0F             1   Endpoint 0 Data Transmit Flag
UIR1.RXD0F             0   Endpoint 0 Data Receive Flag
UCR0                  0x003B     USB Control Register 0
UCR0.T0SEQ             7   Endpoint 0 Transmit Sequence Bit
UCR0.TX0E              5   Endpoint 0 Transmit Enable
UCR0.RX0E              4   Endpoint 0 Receive Enable
UCR0.TP0SIZ3           3   Endpoint 0 Transmit Data Packet Size 3
UCR0.TP0SIZ2           2   Endpoint 0 Transmit Data Packet Size 2
UCR0.TP0SIZ1           1   Endpoint 0 Transmit Data Packet Size 1
UCR0.TP0SIZ0           0   Endpoint 0 Transmit Data Packet Size 0
UCR1                  0x003C     USB Control Register 1
UCR1.T1SEQ             7   Endpoint 1 Transmit Sequence Bit
UCR1.STALL1            6   Endpoint 1 Force Stall Bit
UCR1.TX1E              5   Endpoint 1 Transmit Enable
UCR1.FRESUM            4   Force Resume
UCR1.TP1SIZ3           3   Endpoint 1 Transmit Data Packet Size 3
UCR1.TP1SIZ2           2   Endpoint 1 Transmit Data Packet Size 2
UCR1.TP1SIZ1           1   Endpoint 1 Transmit Data Packet Size 1
UCR1.TP1SIZ0           0   Endpoint 1 Transmit Data Packet Size 0
USR0                  0x003D     USB Status Register 0
USR0.R0SEQ             7   Endpoint 0 Receive Sequence Bit
USR0.SETUP             6   SETUP Token Detect Bit
USR0.RP0SIZ3           3   Endpoint 0 Receive Data Packet Size 3
USR0.RP0SIZ2           2   Endpoint 0 Receive Data Packet Size 2
USR0.RP0SIZ1           1   Endpoint 0 Receive Data Packet Size 1
USR0.RP0SIZ0           0   Endpoint 0 Receive Data Packet Size 0
USR1                  0x003E     USB Status Register 1
USR1.TXACK             6   ACK Token Transmit Bit
USR1.TXNAK             5   NAK Token Transmit Bit
USR1.TXSTL             4   STALL Token Transmit Bit
UNUSED003F            0x003F     UNUSED
ReservFE00            0xFE00     Reserved
RSR                   0xFE01     Reset Status Register
RSR.POR                7   Power-On Reset Bit
RSR.PIN                6   External Reset Bit
RSR.COP                5   Computer Operating Properly Reset Bit
RSR.ILOP               4   Illegal Opcode Reset Bit
RSR.ILAD               3   Illegal Address Reset Bit (opcode fetches only)
RSR.USB                2   Universal Serial Bus Reset Bit
RSR.LVI                1   Low voltage inhibit Reset Bit
ReservFE02            0xFE02     Reserved
ReservFE03            0xFE03     Reserved
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF6               7   Interrupt Flags 6
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF2               3   Interrupt Flags 2
INT1.IF1               2   Interrupt Flags 1
ReservFE05            0xFE05     Reserved
ReservFE06            0xFE06     Reserved
ReservFE07            0xFE07     Reserved
ReservFE08            0xFE08     Reserved
ReservFE09            0xFE09     Reserved
ReservFE0A            0xFE0A     Reserved
ReservFE0B            0xFE0B     Reserved
ReservFE0C            0xFE0C     Reserved
ReservFE0D            0xFE0D     Reserved
ReservFE0E            0xFE0E     Reserved
ReservFE0F            0xFE0F     Reserved
COPCTL                0xFFFF     COP Control Register


.68HC08JB8
; http://

; MEMORY MAP

; Interrupt and reset vector assignments

; INPUT/ OUTPUT PORTS


.68HC08JK3
; MC68HC08JL3/H  http://
; MC68HC08JL3.pdf


; MEMORY MAP
area DATA FSR		   0x0000:0x003F
area BSS  RESERVED	   0x003F:0x0080
area DATA RAM		   0x0080:0x0100
area BSS  RESERVED	   0x0100:0xEC00
area DATA ROM		   0xEC00:0xFC00
area DATA MONITOR_ROM_1	   0xFC00:0xFE00
area DATA FSR_1		   0xFE00:0xFE10
area DATA MONITOR_ROM_2	   0xFE10:0xFFD0
area DATA USER_VEC	   0xFFD0:0x10000


; Interrupt and reset vector assignments
interrupt __RESET    0xFFFE       Reset Vector
interrupt SWI        0xFFFC       SWI Vector
interrupt IRQ        0xFFFA       IRQ Vector
interrupt TIM_CH_0   0xFFF6       TIM Channel 0 Vector
interrupt TIM_CH_1   0xFFF4       TIM Channel 1 Vector
interrupt TIM        0xFFF2       TIM Overflow Vector
interrupt CBRD       0xFFE0       Keyboard Vector
interrupt ADC        0xFFDE       ADC Conversion Complete Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA6               6   Port A Data Bit 6
PTA.PTA5               5   Port A Data Bit 5
PTA.PTA4               4   Port A Data Bit 4
PTA.PTA3               3   Port A Data Bit 3
PTA.PTA2               2   Port A Data Bit 2
PTA.PTA1               1   Port A Data Bit 1
PTA.PTA0               0   Port A Data Bit 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bit 7
PTB.PTB6               6   Port B Data Bit 6
PTB.PTB5               5   Port B Data Bit 5
PTB.PTB4               4   Port B Data Bit 4
PTB.PTB3               3   Port B Data Bit 3
PTB.PTB2               2   Port B Data Bit 2
PTB.PTB1               1   Port B Data Bit 1
PTB.PTB0               0   Port B Data Bit 0
UNUSED0002            0x0002     UNUSED
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bit 7
PTD.PTD6               6   Port D Data Bit 6
PTD.PTD5               5   Port D Data Bit 5
PTD.PTD4               4   Port D Data Bit 4
PTD.PTD3               3   Port D Data Bit 3
PTD.PTD2               2   Port D Data Bit 2
PTD.PTD1               1   Port D Data Bit 1
PTD.PTD0               0   Port D Data Bit 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA6             6   Data Direction Register A Bit 6
DDRA.DDRA5             5   Data Direction Register A Bit 5
DDRA.DDRA4             4   Data Direction Register A Bit 4
DDRA.DDRA3             3   Data Direction Register A Bit 3
DDRA.DDRA2             2   Data Direction Register A Bit 2
DDRA.DDRA1             1   Data Direction Register A Bit 1
DDRA.DDRA0             0   Data Direction Register A Bit 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bit 7
DDRB.DDRB6             6   Data Direction Register B Bit 6
DDRB.DDRB5             5   Data Direction Register B Bit 5
DDRB.DDRB4             4   Data Direction Register B Bit 4
DDRB.DDRB3             3   Data Direction Register B Bit 3
DDRB.DDRB2             2   Data Direction Register B Bit 2
DDRB.DDRB1             1   Data Direction Register B Bit 1
DDRB.DDRB0             0   Data Direction Register B Bit 0
UNUSED0006            0x0006     UNUSED
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bit 7
DDRD.DDRD6             6   Data Direction Register D Bit 6
DDRD.DDRD5             5   Data Direction Register D Bit 5
DDRD.DDRD4             4   Data Direction Register D Bit 4
DDRD.DDRD3             3   Data Direction Register D Bit 3
DDRD.DDRD2             2   Data Direction Register D Bit 2
DDRD.DDRD1             1   Data Direction Register D Bit 1
DDRD.DDRD0             0   Data Direction Register D Bit 0
UNUSED0008            0x0008     UNUSED
UNUSED0009            0x0009     UNUSED
PDCR                  0x000A     Port D Control Register
PDCR.SLOWD7            3   Slow Edge Enable 7
PDCR.SLOWD6            2   Slow Edge Enable 6
PDCR.PTDPU7            1   Pull-up Enable 7
PDCR.PTDPU6            0   Pull-up Enable 6
UNUSED000B            0x000B     UNUSED
UNUSED000C            0x000C     UNUSED
PTAPUE                0x000D     Port A Input Pull-up Enable Register
PTAPUE.PTA6EN          7   Enable PTA6 on OSC2
PTAPUE.PTAPUE6         6   Port A Input Pull-up Enable bits 6
PTAPUE.PTAPUE5         5   Port A Input Pull-up Enable bits 5
PTAPUE.PTAPUE4         4   Port A Input Pull-up Enable bits 4
PTAPUE.PTAPUE3         3   Port A Input Pull-up Enable bits 3
PTAPUE.PTAPUE2         2   Port A Input Pull-up Enable bits 2
PTAPUE.PTAPUE1         1   Port A Input Pull-up Enable bits 1
PTAPUE.PTAPUE0         0   Port A Input Pull-up Enable bits 0
UNUSED000E            0x000E     UNUSED
UNUSED000F            0x000F     UNUSED
UNUSED0010            0x0010     UNUSED
UNUSED0011            0x0011     UNUSED
UNUSED0012            0x0012     UNUSED
UNUSED0013            0x0013     UNUSED
UNUSED0014            0x0014     UNUSED
UNUSED0015            0x0015     UNUSED
UNUSED0016            0x0016     UNUSED
UNUSED0017            0x0017     UNUSED
UNUSED0018            0x0018     UNUSED
UNUSED0019            0x0019     UNUSED
KBSCR                 0x001A     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
KBIER                 0x001B     Keyboard Interrupt Enable Register
KBIER.KBIE6            6   Port-A Keyboard Interrupt Enable Bits 6
KBIER.KBIE5            5   Port-A Keyboard Interrupt Enable Bits 5
KBIER.KBIE4            4   Port-A Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Port-A Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Port-A Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Port-A Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Port-A Keyboard Interrupt Enable Bits 0
UNUSED001C            0x001C     UNUSED
INTSCR                0x001D     IRQ Status and Control Register
INTSCR.IRQF1           3   IRQ1 Flag
INTSCR.ACK1            2   IRQ1 Interrupt Request Acknowledge Bit
INTSCR.IMASK1          1   IRQ1 Interrupt Mask Bit
INTSCR.MODE1           0   IRQ1 Edge/Level Select Bit
CONFIG2               0x001E     Configuration Register 2
CONFIG2.IRQPUD         7   IRQ1 Pin Pull-up control bit
CONFIG2.LVIT1          4   Low Voltage Inhibit trip voltage selection bits 1
CONFIG2.LVIT0          3   Low Voltage Inhibit trip voltage selection bits 0
CONFIG1               0x001F     Configuration Register 1
CONFIG1.COPRS          7   COP reset period selection bit
CONFIG1.LVID           4   Low Voltage Inhibit Disable Bit
CONFIG1.SSREC          2   Short Stop Recovery Bit
CONFIG1.STOP           1   enables the STOP instruction
CONFIG1.COPD           0   COP Disable Bit
TSC                   0x0020     TIM Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
TCNTH                 0x0021     TIM Counter Register High
TCNTL                 0x0022     TIM Counter Register Low
TMODH                 0x0023     TIM Counter Modulo Register High
TMODL                 0x0024     TIM Counter Modulo Register Low
TSC0                  0x0025     TIM Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit
TSC0.MS0B              5   Mode Select Bit B
TSC0.MS0A              4   Mode Select Bit A
TSC0.ELS0B             3   Edge/Level Select Bits
TSC0.ELS0A             2   Edge/Level Select Bits
TSC0.TOV0              1   Toggle-On-Overflow Bit
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0026     TIM Channel 0 Register High
TCH0L                 0x0027     TIM Channel 0 Register Low
TSC1                  0x0028     TIM Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 1 Flag Bit
TSC1.CH1IE             6   Channel 1 Interrupt Enable Bit
TSC1.MS1A              4   Mode Select Bit A
TSC1.ELS1B             3   Edge/Level Select Bits
TSC1.ELS1A             2   Edge/Level Select Bits
TSC1.TOV1              1   Toggle-On-Overflow Bit
TSC1.CH1MAX            0   Channel 1 Maximum Duty Cycle Bit
TCH1H                 0x0029     TIM Channel 1 Register High
TCH1L                 0x002A     TIM Channel 1 Register Low
UNUSED002B            0x002B     UNUSED
UNUSED002C            0x002C     UNUSED
UNUSED002D            0x002D     UNUSED
UNUSED002E            0x002E     UNUSED
UNUSED002F            0x002F     UNUSED
UNUSED0030            0x0030     UNUSED
UNUSED0031            0x0031     UNUSED
UNUSED0032            0x0032     UNUSED
UNUSED0033            0x0033     UNUSED
UNUSED0034            0x0034     UNUSED
UNUSED0035            0x0035     UNUSED
UNUSED0036            0x0036     UNUSED
UNUSED0037            0x0037     UNUSED
UNUSED0038            0x0038     UNUSED
UNUSED0039            0x0039     UNUSED
UNUSED003A            0x003A     UNUSED
UNUSED003B            0x003B     UNUSED
ADSCR                 0x003C     ADC Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.CH4              4   ADC Channel Select Bits 4
ADSCR.CH3              3   ADC Channel Select Bits 3
ADSCR.CH2              2   ADC Channel Select Bits 2
ADSCR.CH1              1   ADC Channel Select Bits 1
ADSCR.CH0              0   ADC Channel Select Bits 0
ADR                   0x003D     ADC Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADICLK                0x003E     ADC Input Clock Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bits 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bits 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bits 0
UNUSED003F            0x003F     UNUSED
BSR                   0xFE00     Break Status Register
BSR.SBSW               1   SIM Break Stop/Wait
RSR                   0xFE01     Reset Status Register
RSR.POR                7   Power-On Reset Bit
RSR.PIN                6   External Reset Bit
RSR.COP                5   Computer Operating Properly Reset Bit
RSR.ILOP               4   Illegal Opcode Reset Bit
RSR.ILAD               3   Illegal Address Reset Bit (opcode fetches only)
RSR.MODRST             2   Monitor Mode Entry Module Reset bit
RSR.LVI                1   Low Voltage Inhibit Reset bit
ReservFE02            0xFE02     Reserved
BFCR                  0xFE03     Break Flag Control Register
BFCR.BCFE              7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flags 14
INT3                  0xFE06     Interrupt Status Register 3
INT3.IF15              0   Interrupt Flags 15
ReservFE07            0xFE07     Reserved
ReservFE08            0xFE08     Reserved
ReservFE09            0xFE09     Reserved
ReservFE0A            0xFE0A     Reserved
ReservFE0B            0xFE0B     Reserved
BRKH                  0xFE0C     Break Address High Register
BRKL                  0xFE0D     Break Address low Register
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
COPCTL                0xFFFF     COP Control Register


.68HC08JL3
; MC68HC08JL3/H  http://
; MC68HC08JL3.pdf


; MEMORY MAP
area DATA FSR		   0x0000:0x003F
area BSS  RESERVED	   0x003F:0x0080
area DATA RAM		   0x0080:0x0100
area BSS  RESERVED	   0x0100:0xEC00
area DATA ROM		   0xEC00:0xFC00
area DATA MONITOR_ROM_1	   0xFC00:0xFE00
area DATA FSR_1		   0xFE00:0xFE10
area DATA MONITOR_ROM_2	   0xFE10:0xFFD0
area DATA USER_VEC	   0xFFD0:0x10000


; Interrupt and reset vector assignments
interrupt __RESET    0xFFFE       Reset Vector
interrupt SWI        0xFFFC       SWI Vector
interrupt IRQ        0xFFFA       IRQ Vector
interrupt TIM_CH_0   0xFFF6       TIM Channel 0 Vector
interrupt TIM_CH_1   0xFFF4       TIM Channel 1 Vector
interrupt TIM        0xFFF2       TIM Overflow Vector
interrupt CBRD       0xFFE0       Keyboard Vector
interrupt ADC        0xFFDE       ADC Conversion Complete Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA6               6   Port A Data Bit 6
PTA.PTA5               5   Port A Data Bit 5
PTA.PTA4               4   Port A Data Bit 4
PTA.PTA3               3   Port A Data Bit 3
PTA.PTA2               2   Port A Data Bit 2
PTA.PTA1               1   Port A Data Bit 1
PTA.PTA0               0   Port A Data Bit 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bit 7
PTB.PTB6               6   Port B Data Bit 6
PTB.PTB5               5   Port B Data Bit 5
PTB.PTB4               4   Port B Data Bit 4
PTB.PTB3               3   Port B Data Bit 3
PTB.PTB2               2   Port B Data Bit 2
PTB.PTB1               1   Port B Data Bit 1
PTB.PTB0               0   Port B Data Bit 0
UNUSED0002            0x0002     UNUSED
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bit 7
PTD.PTD6               6   Port D Data Bit 6
PTD.PTD5               5   Port D Data Bit 5
PTD.PTD4               4   Port D Data Bit 4
PTD.PTD3               3   Port D Data Bit 3
PTD.PTD2               2   Port D Data Bit 2
PTD.PTD1               1   Port D Data Bit 1
PTD.PTD0               0   Port D Data Bit 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA6             6   Data Direction Register A Bit 6
DDRA.DDRA5             5   Data Direction Register A Bit 5
DDRA.DDRA4             4   Data Direction Register A Bit 4
DDRA.DDRA3             3   Data Direction Register A Bit 3
DDRA.DDRA2             2   Data Direction Register A Bit 2
DDRA.DDRA1             1   Data Direction Register A Bit 1
DDRA.DDRA0             0   Data Direction Register A Bit 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bit 7
DDRB.DDRB6             6   Data Direction Register B Bit 6
DDRB.DDRB5             5   Data Direction Register B Bit 5
DDRB.DDRB4             4   Data Direction Register B Bit 4
DDRB.DDRB3             3   Data Direction Register B Bit 3
DDRB.DDRB2             2   Data Direction Register B Bit 2
DDRB.DDRB1             1   Data Direction Register B Bit 1
DDRB.DDRB0             0   Data Direction Register B Bit 0
UNUSED0006            0x0006     UNUSED
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bit 7
DDRD.DDRD6             6   Data Direction Register D Bit 6
DDRD.DDRD5             5   Data Direction Register D Bit 5
DDRD.DDRD4             4   Data Direction Register D Bit 4
DDRD.DDRD3             3   Data Direction Register D Bit 3
DDRD.DDRD2             2   Data Direction Register D Bit 2
DDRD.DDRD1             1   Data Direction Register D Bit 1
DDRD.DDRD0             0   Data Direction Register D Bit 0
UNUSED0008            0x0008     UNUSED
UNUSED0009            0x0009     UNUSED
PDCR                  0x000A     Port D Control Register
PDCR.SLOWD7            3   Slow Edge Enable 7
PDCR.SLOWD6            2   Slow Edge Enable 6
PDCR.PTDPU7            1   Pull-up Enable 7
PDCR.PTDPU6            0   Pull-up Enable 6
UNUSED000B            0x000B     UNUSED
UNUSED000C            0x000C     UNUSED
PTAPUE                0x000D     Port A Input Pull-up Enable Register
PTAPUE.PTA6EN          7   Enable PTA6 on OSC2
PTAPUE.PTAPUE6         6   Port A Input Pull-up Enable bits 6
PTAPUE.PTAPUE5         5   Port A Input Pull-up Enable bits 5
PTAPUE.PTAPUE4         4   Port A Input Pull-up Enable bits 4
PTAPUE.PTAPUE3         3   Port A Input Pull-up Enable bits 3
PTAPUE.PTAPUE2         2   Port A Input Pull-up Enable bits 2
PTAPUE.PTAPUE1         1   Port A Input Pull-up Enable bits 1
PTAPUE.PTAPUE0         0   Port A Input Pull-up Enable bits 0
UNUSED000E            0x000E     UNUSED
UNUSED000F            0x000F     UNUSED
UNUSED0010            0x0010     UNUSED
UNUSED0011            0x0011     UNUSED
UNUSED0012            0x0012     UNUSED
UNUSED0013            0x0013     UNUSED
UNUSED0014            0x0014     UNUSED
UNUSED0015            0x0015     UNUSED
UNUSED0016            0x0016     UNUSED
UNUSED0017            0x0017     UNUSED
UNUSED0018            0x0018     UNUSED
UNUSED0019            0x0019     UNUSED
KBSCR                 0x001A     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
KBIER                 0x001B     Keyboard Interrupt Enable Register
KBIER.KBIE6            6   Port-A Keyboard Interrupt Enable Bits 6
KBIER.KBIE5            5   Port-A Keyboard Interrupt Enable Bits 5
KBIER.KBIE4            4   Port-A Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Port-A Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Port-A Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Port-A Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Port-A Keyboard Interrupt Enable Bits 0
UNUSED001C            0x001C     UNUSED
INTSCR                0x001D     IRQ Status and Control Register
INTSCR.IRQF1           3   IRQ1 Flag
INTSCR.ACK1            2   IRQ1 Interrupt Request Acknowledge Bit
INTSCR.IMASK1          1   IRQ1 Interrupt Mask Bit
INTSCR.MODE1           0   IRQ1 Edge/Level Select Bit
CONFIG2               0x001E     Configuration Register 2
CONFIG2.IRQPUD         7   IRQ1 Pin Pull-up control bit
CONFIG2.LVIT1          4   Low Voltage Inhibit trip voltage selection bits 1
CONFIG2.LVIT0          3   Low Voltage Inhibit trip voltage selection bits 0
CONFIG1               0x001F     Configuration Register 1
CONFIG1.COPRS          7   COP reset period selection bit
CONFIG1.LVID           4   Low Voltage Inhibit Disable Bit
CONFIG1.SSREC          2   Short Stop Recovery Bit
CONFIG1.STOP           1   enables the STOP instruction
CONFIG1.COPD           0   COP Disable Bit
TSC                   0x0020     TIM Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
TCNTH                 0x0021     TIM Counter Register High
TCNTL                 0x0022     TIM Counter Register Low
TMODH                 0x0023     TIM Counter Modulo Register High
TMODL                 0x0024     TIM Counter Modulo Register Low
TSC0                  0x0025     TIM Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit
TSC0.MS0B              5   Mode Select Bit B
TSC0.MS0A              4   Mode Select Bit A
TSC0.ELS0B             3   Edge/Level Select Bits
TSC0.ELS0A             2   Edge/Level Select Bits
TSC0.TOV0              1   Toggle-On-Overflow Bit
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0026     TIM Channel 0 Register High
TCH0L                 0x0027     TIM Channel 0 Register Low
TSC1                  0x0028     TIM Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 1 Flag Bit
TSC1.CH1IE             6   Channel 1 Interrupt Enable Bit
TSC1.MS1A              4   Mode Select Bit A
TSC1.ELS1B             3   Edge/Level Select Bits
TSC1.ELS1A             2   Edge/Level Select Bits
TSC1.TOV1              1   Toggle-On-Overflow Bit
TSC1.CH1MAX            0   Channel 1 Maximum Duty Cycle Bit
TCH1H                 0x0029     TIM Channel 1 Register High
TCH1L                 0x002A     TIM Channel 1 Register Low
UNUSED002B            0x002B     UNUSED
UNUSED002C            0x002C     UNUSED
UNUSED002D            0x002D     UNUSED
UNUSED002E            0x002E     UNUSED
UNUSED002F            0x002F     UNUSED
UNUSED0030            0x0030     UNUSED
UNUSED0031            0x0031     UNUSED
UNUSED0032            0x0032     UNUSED
UNUSED0033            0x0033     UNUSED
UNUSED0034            0x0034     UNUSED
UNUSED0035            0x0035     UNUSED
UNUSED0036            0x0036     UNUSED
UNUSED0037            0x0037     UNUSED
UNUSED0038            0x0038     UNUSED
UNUSED0039            0x0039     UNUSED
UNUSED003A            0x003A     UNUSED
UNUSED003B            0x003B     UNUSED
ADSCR                 0x003C     ADC Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.CH4              4   ADC Channel Select Bits 4
ADSCR.CH3              3   ADC Channel Select Bits 3
ADSCR.CH2              2   ADC Channel Select Bits 2
ADSCR.CH1              1   ADC Channel Select Bits 1
ADSCR.CH0              0   ADC Channel Select Bits 0
ADR                   0x003D     ADC Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADICLK                0x003E     ADC Input Clock Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bits 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bits 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bits 0
UNUSED003F            0x003F     UNUSED
BSR                   0xFE00     Break Status Register
BSR.SBSW               1   SIM Break Stop/Wait
RSR                   0xFE01     Reset Status Register
RSR.POR                7   Power-On Reset Bit
RSR.PIN                6   External Reset Bit
RSR.COP                5   Computer Operating Properly Reset Bit
RSR.ILOP               4   Illegal Opcode Reset Bit
RSR.ILAD               3   Illegal Address Reset Bit (opcode fetches only)
RSR.MODRST             2   Monitor Mode Entry Module Reset bit
RSR.LVI                1   Low Voltage Inhibit Reset bit
ReservFE02            0xFE02     Reserved
BFCR                  0xFE03     Break Flag Control Register
BFCR.BCFE              7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flags 14
INT3                  0xFE06     Interrupt Status Register 3
INT3.IF15              0   Interrupt Flags 15
ReservFE07            0xFE07     Reserved
ReservFE08            0xFE08     Reserved
ReservFE09            0xFE09     Reserved
ReservFE0A            0xFE0A     Reserved
ReservFE0B            0xFE0B     Reserved
BRKH                  0xFE0C     Break Address High Register
BRKL                  0xFE0D     Break Address low Register
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
COPCTL                0xFFFF     COP Control Register


.68HC08JT8
; http://

; MEMORY MAP

; Interrupt and reset vector assignments

; INPUT/ OUTPUT PORTS


.68HC08KH12
; MC68HC08KH12/H  http://
; MC68HC08KH12.pdf

; 11776 bytes of ROM or OTPROM
; RAM=384


; MEMORY MAP
area DATA FSR		   0x0000:0x0060
area DATA RAM		   0x0060:0x01E0
area BSS  UNIMPLEMENTED	   0x01E0:0xD000
area DATA ROM		   0xD000:0xFE00
area DATA FSR_1		   0xFE00:0xFE10
area DATA MONITOR_ROM	   0xFE10:0xFF00
area BSS  UNIMPLEMENTED	   0xFF00:0xFFE6
area DATA USER_VEC	   0xFFE6:0x10000


; Interrupt and reset vector assignments
interrupt __RESET        0xFFFE       Reset Vector
interrupt SWI            0xFFFC       SWI Vector
interrupt IRQ1           0xFFFA       IRQ1 Vector
interrupt USB_SIE_T      0xFFF8       USB SIE Timing Interrupt Vector
interrupt USB_HUB_E      0xFFF6       USB HUB Endpoint Interrupt Vector
interrupt USB_DEV        0xFFF4       USB Device Endpoint Interrupt Vector
interrupt TIM_CH0        0xFFF2       TIM Channel 0 Vector
interrupt TIM_CH1        0xFFF0       TIM Channel 1 Vector
interrupt TIM            0xFFEE       TIM Overflow Vector
interrupt Port_E         0xFFEC       Port-E Keyboard Vector
interrupt Port_D         0xFFEA       Port-D Keyboard Vector
interrupt Port_F         0xFFE8       Port-F Keyboard Vector
interrupt PLL            0xFFE6       PLL Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bit 7
PTA.PTA6               6   Port A Data Bit 6
PTA.PTA5               5   Port A Data Bit 5
PTA.PTA4               4   Port A Data Bit 4
PTA.PTA3               3   Port A Data Bit 3
PTA.PTA2               2   Port A Data Bit 2
PTA.PTA1               1   Port A Data Bit 1
PTA.PTA0               0   Port A Data Bit 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bit 7
PTB.PTB6               6   Port B Data Bit 6
PTB.PTB5               5   Port B Data Bit 5
PTB.PTB4               4   Port B Data Bit 4
PTB.PTB3               3   Port B Data Bit 3
PTB.PTB2               2   Port B Data Bit 2
PTB.PTB1               1   Port B Data Bit 1
PTB.PTB0               0   Port B Data Bit 0
PTC                   0x0002     Port C Data Register
PTC.PTC4               4   Port C Data Bit 4
PTC.PTC3               3   Port C Data Bit 3
PTC.PTC2               2   Port C Data Bit 2
PTC.PTC1               1   Port C Data Bit 1
PTC.PTC0               0   Port C Data Bit 0
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bit 7
PTD.PTD6               6   Port D Data Bit 6
PTD.PTD5               5   Port D Data Bit 5
PTD.PTD4               4   Port D Data Bit 4
PTD.PTD3               3   Port D Data Bit 3
PTD.PTD2               2   Port D Data Bit 2
PTD.PTD1               1   Port D Data Bit 1
PTD.PTD0               0   Port D Data Bit 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bit 7
DDRA.DDRA6             6   Data Direction Register A Bit 6
DDRA.DDRA5             5   Data Direction Register A Bit 5
DDRA.DDRA4             4   Data Direction Register A Bit 4
DDRA.DDRA3             3   Data Direction Register A Bit 3
DDRA.DDRA2             2   Data Direction Register A Bit 2
DDRA.DDRA1             1   Data Direction Register A Bit 1
DDRA.DDRA0             0   Data Direction Register A Bit 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bit 7
DDRB.DDRB6             6   Data Direction Register B Bit 6
DDRB.DDRB5             5   Data Direction Register B Bit 5
DDRB.DDRB4             4   Data Direction Register B Bit 4
DDRB.DDRB3             3   Data Direction Register B Bit 3
DDRB.DDRB2             2   Data Direction Register B Bit 2
DDRB.DDRB1             1   Data Direction Register B Bit 1
DDRB.DDRB0             0   Data Direction Register B Bit 0
DDRC                  0x0006     Data Direction Register C
DDRC.DDRC4             4   Data Direction Register C Bit 4
DDRC.DDRC3             3   Data Direction Register C Bit 3
DDRC.DDRC2             2   Data Direction Register C Bit 2
DDRC.DDRC1             1   Data Direction Register C Bit 1
DDRC.DDRC0             0   Data Direction Register C Bit 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bit 7
DDRD.DDRD6             6   Data Direction Register D Bit 6
DDRD.DDRD5             5   Data Direction Register D Bit 5
DDRD.DDRD4             4   Data Direction Register D Bit 4
DDRD.DDRD3             3   Data Direction Register D Bit 3
DDRD.DDRD2             2   Data Direction Register D Bit 2
DDRD.DDRD1             1   Data Direction Register D Bit 1
DDRD.DDRD0             0   Data Direction Register D Bit 0
PTE                   0x0008     Port E Data Register
PTE.PTE4               4   Port E Data Bit 4
PTE.PTE3               3   Port E Data Bit 3
PTE.PTE2               2   Port E Data Bit 2
PTE.PTE1               1   Port E Data Bit 1
PTE.PTE0               0   Port E Data Bit 0
PTF                   0x0009     Port F Data Register
PTF.PTF7               7   Port F Data Bit 7
PTF.PTF6               6   Port F Data Bit 6
PTF.PTF5               5   Port F Data Bit 5
PTF.PTF4               4   Port F Data Bit 4
PTF.PTF3               3   Port F Data Bit 3
PTF.PTF2               2   Port F Data Bit 2
PTF.PTF1               1   Port F Data Bit 1
PTF.PTF0               0   Port F Data Bit 0
DDRE                  0x000A     Data Direction Register E
DDRE.DDRE4             4   Data Direction Register E Bit 4
DDRE.DDRE3             3   Data Direction Register E Bit 3
DDRE.DDRE2             2   Data Direction Register E Bit 2
DDRE.DDRE1             1   Data Direction Register E Bit 1
DDRE.DDRE0             0   Data Direction Register E Bit 0
DDRF                  0x000B     Data Direction Register F
DDRF.DDRF7             7   Data Direction Register F Bit 7
DDRF.DDRF6             6   Data Direction Register F Bit 6
DDRF.DDRF5             5   Data Direction Register F Bit 5
DDRF.DDRF4             4   Data Direction Register F Bit 4
DDRF.DDRF3             3   Data Direction Register F Bit 3
DDRF.DDRF2             2   Data Direction Register F Bit 2
DDRF.DDRF1             1   Data Direction Register F Bit 1
DDRF.DDRF0             0   Data Direction Register F Bit 0
KBDSCR                0x000C     Port D Keyboard Status and Control Register
KBDSCR.KEYDF           3   Port-D Keyboard Flag Bit
KBDSCR.ACKD            2   Port-D Keyboard Acknowledge Bit
KBDSCR.IMASKD          1   Port-D Keyboard Interrupt Mask Bit
KBDSCR.MODED           0   Port-D Keyboard Triggering Sensitivity Bit
KBDIER                0x000D     Port D Keyboard Interrupt Enable Register
KBDIER.KBDIE7          7   Port-D Keyboard Interrupt Enable Bits 7
KBDIER.KBDIE6          6   Port-D Keyboard Interrupt Enable Bits 6
KBDIER.KBDIE5          5   Port-D Keyboard Interrupt Enable Bits 5
KBDIER.KBDIE4          4   Port-D Keyboard Interrupt Enable Bits 4
KBDIER.KBDIE3          3   Port-D Keyboard Interrupt Enable Bits 3
KBDIER.KBDIE2          2   Port-D Keyboard Interrupt Enable Bits 2
KBDIER.KBDIE1          1   Port-D Keyboard Interrupt Enable Bits 1
KBDIER.KBDIE0          0   Port-D Keyboard Interrupt Enable Bits 0
KBESCR                0x000E     Port E Keyboard Status and Control Register
KBESCR.KEYEF           3   Port-E Keyboard Flag Bit
KBESCR.ACKE            2   Port-E Keyboard Acknowledge Bit
KBESCR.IMASKE          1   Port-E Keyboard Interrupt Mask Bit
KBESCR.MODEE           0   Port-E Keyboard Triggering Sensitivity Bit
KBEIER                0x000F     Port E Keyboard Interrupt Enable Register
KBEIER.PEPE3           7   Port-E Pull-up Enable Bits 3
KBEIER.PEPE2           6   Port-E Pull-up Enable Bits 2
KBEIER.PEPE1           5   Port-E Pull-up Enable Bits 1
KBEIER.PEPE0           4   Port-E Pull-up Enable Bits 0
KBEIER.KBEIE3          3   Port-E Keyboard Interrupt Enable Bits 3
KBEIER.KBEIE2          2   Port-E Keyboard Interrupt Enable Bits 2
KBEIER.KBEIE1          1   Port-E Keyboard Interrupt Enable Bits 1
KBEIER.KBEIE0          0   Port-E Keyboard Interrupt Enable Bits 0
TSC                   0x0010     TIM Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
UNUSED0011            0x0011     UNUSED
TCNTH                 0x0012     TIM Counter Register High
TCNTL                 0x0013     TIM Counter Register Low
TMODH                 0x0014     TIM Counter Modulo Register High
TMODL                 0x0015     TIM Counter Modulo Register Low
TSC0                  0x0016     TIM Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit
TSC0.MS0B              5   Mode Select Bit B
TSC0.MS0A              4   Mode Select Bit B
TSC0.ELS0B             3   Edge/Level Select Bits
TSC0.ELS0A             2   Edge/Level Select Bits
TSC0.TOV0              1   Toggle-On-Overflow Bit
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0017     TIM Channel 0 Register High
TCH0L                 0x0018     TIM Channel 0 Register Low
TSC1                  0x0019     TIM Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 0 Flag Bit            
TSC1.CH1IE             6   Channel 0 Interrupt Enable Bit
TSC1.MS1A              4   Mode Select Bit B               
TSC1.ELS1B             3   Edge/Level Select Bits          
TSC1.ELS1A             2   Edge/Level Select Bits          
TSC1.TOV1              1   Toggle-On-Overflow Bit          
TSC1.CH1MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH1H                 0x001A     TIM Channel 1 Register High
TCH1L                 0x001B     TIM Channel 1 Register Low
EOIER                 0x001C     PORT E Optical Interface Enable Register
EOIER.YREF2            7   Reference Voltage Selection Y 2
EOIER.YREF1            6   Reference Voltage Selection Y 1
EOIER.YREF0            5   Reference Voltage Selection Y 0
EOIER.XREF2            4   Reference Voltage Selection X 2
EOIER.XREF1            3   Reference Voltage Selection X 1
EOIER.XREF0            2   Reference Voltage Selection X 0
EOIER.OIEY             1   Optical Interface Enable Y
EOIER.OIEX             0   Optical Interface Enable X
POC                   0x001D     Port Option Control Register
POC.LDD                5   LED Direct Drive Control
POC.PCP                2   Port C Pullup Enable
POC.PBP                1   Port B Pullup Enable
POC.PAP                0   Port A Pullup Enable
ISCR                  0x001E     IRQ Status and Control Register
ISCR.IRQF1             3   IRQ1 Flag
ISCR.ACK1              2   IRQ1 Interrupt Request Acknowledge Bit
ISCR.IMASK1            1   IRQ1 Interrupt Mask Bit
ISCR.MODE1             0   IRQ1 Edge/Level Select Bit
CONFIG                0x001F     Configuration Register
CONFIG.SSREC           3   Short stop recovery bit
CONFIG.COPRS           2   COP reset period selection bit
CONFIG.STOP            1   STOP instruction enable bit
CONFIG.COPD            0   COP disable bit
DE0D0                 0x0020     USB Embedded Device Endpoint 0 Data Register 0
DE0D0.DE0R07_DE0T07    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D0.DE0R06_DE0T06    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D0.DE0R05_DE0T05    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D0.DE0R04_DE0T04    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D0.DE0R03_DE0T03    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D0.DE0R02_DE0T02    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D0.DE0R01_DE0T01    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D0.DE0R00_DE0T00    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE0D1                 0x0021     USB Embedded Device Endpoint 0 Data Register 1
DE0D1.DE0R17_DE0T17    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D1.DE0R16_DE0T16    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D1.DE0R15_DE0T15    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D1.DE0R14_DE0T14    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D1.DE0R13_DE0T13    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D1.DE0R12_DE0T12    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D1.DE0R11_DE0T11    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D1.DE0R10_DE0T10    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE0D2                 0x0022     USB Embedded Device Endpoint 0 Data Register 2
DE0D2.DE0R27_DE0T27    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D2.DE0R26_DE0T26    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D2.DE0R25_DE0T25    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D2.DE0R24_DE0T24    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D2.DE0R23_DE0T23    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D2.DE0R22_DE0T22    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D2.DE0R21_DE0T21    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D2.DE0R20_DE0T20    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE0D3                 0x0023     USB Embedded Device Endpoint 0 Data Register 3
DE0D3.DE0R37_DE0T37    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D3.DE0R36_DE0T36    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D3.DE0R35_DE0T35    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D3.DE0R34_DE0T34    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D3.DE0R33_DE0T33    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D3.DE0R32_DE0T32    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D3.DE0R31_DE0T31    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D3.DE0R30_DE0T30    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE0D4                 0x0024     USB Embedded Device Endpoint 0 Data Register 4
DE0D4.DE0R47_DE0T47    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D4.DE0R46_DE0T46    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D4.DE0R45_DE0T45    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D4.DE0R44_DE0T44    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D4.DE0R43_DE0T43    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D4.DE0R42_DE0T42    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D4.DE0R41_DE0T41    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D4.DE0R40_DE0T40    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE0D5                 0x0025     USB Embedded Device Endpoint 0 Data Register 5
DE0D5.DE0R57_DE0T57    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D5.DE0R56_DE0T56    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D5.DE0R55_DE0T55    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D5.DE0R54_DE0T54    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D5.DE0R53_DE0T53    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D5.DE0R52_DE0T52    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D5.DE0R51_DE0T51    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D5.DE0R50_DE0T50    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE0D6                 0x0026     USB Embedded Device Endpoint 0 Data Register 6
DE0D6.DE0R67_DE0T67    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D6.DE0R66_DE0T66    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D6.DE0R65_DE0T65    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D6.DE0R64_DE0T64    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D6.DE0R63_DE0T63    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D6.DE0R62_DE0T62    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D6.DE0R61_DE0T61    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D6.DE0R60_DE0T60    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE0D7                 0x0027     USB Embedded Device Endpoint 0 Data Register 7
DE0D7.DE0R77_DE0T77    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D7.DE0R76_DE0T76    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D7.DE0R75_DE0T75    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D7.DE0R74_DE0T74    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D7.DE0R73_DE0T73    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D7.DE0R72_DE0T72    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D7.DE0R71_DE0T71    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D7.DE0R70_DE0T70    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE1D0                 0x0028     USB Embedded Device Endpoint 1_2 Data Register 0
DE1D0.DE1T07           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D0.DE1T06           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D0.DE1T05           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D0.DE1T04           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D0.DE1T03           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D0.DE1T02           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D0.DE1T01           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D0.DE1T00           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
DE1D1                 0x0029     USB Embedded Device Endpoint 1_2 Data Register 1
DE1D1.DE1T17           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D1.DE1T16           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D1.DE1T15           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D1.DE1T14           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D1.DE1T13           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D1.DE1T12           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D1.DE1T11           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D1.DE1T10           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
DE1D2                 0x002A     USB Embedded Device Endpoint 1_2 Data Register 2
DE1D2.DE1T27           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D2.DE1T26           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D2.DE1T25           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D2.DE1T24           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D2.DE1T23           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D2.DE1T22           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D2.DE1T21           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D2.DE1T20           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
DE1D3                 0x002B     USB Embedded Device Endpoint 1_2 Data Register 3
DE1D3.DE1T37           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D3.DE1T36           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D3.DE1T35           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D3.DE1T34           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D3.DE1T33           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D3.DE1T32           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D3.DE1T31           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D3.DE1T30           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
DE1D4                 0x002C     USB Embedded Device Endpoint 1_2 Data Register 4
DE1D4.DE1T47           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D4.DE1T46           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D4.DE1T45           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D4.DE1T44           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D4.DE1T43           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D4.DE1T42           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D4.DE1T41           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D4.DE1T40           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
DE1D5                 0x002D     USB Embedded Device Endpoint 1_2 Data Register 5
DE1D5.DE1T57           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D5.DE1T56           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D5.DE1T55           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D5.DE1T54           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D5.DE1T53           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D5.DE1T52           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D5.DE1T51           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D5.DE1T50           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
DE1D6                 0x002E     USB Embedded Device Endpoint 1_2 Data Register 6
DE1D6.DE1T67           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D6.DE1T66           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D6.DE1T65           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D6.DE1T64           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D6.DE1T63           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D6.DE1T62           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D6.DE1T61           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D6.DE1T60           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
DE1D7                 0x002F     USB Embedded Device Endpoint 1_2 Data Register 7
DE1D7.DE1T77           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D7.DE1T76           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D7.DE1T75           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D7.DE1T74           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D7.DE1T73           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D7.DE1T72           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D7.DE1T71           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D7.DE1T70           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
HE0D0                 0x0030     USB HUB Endpoint 0 Data Register 0
HE0D0.HE0R07_HE0T07    7   HUB Endpoint 0 Receive/Transmit Data Buffer 7
HE0D0.HE0R06_HE0T06    6   HUB Endpoint 0 Receive/Transmit Data Buffer 6
HE0D0.HE0R05_HE0T05    5   HUB Endpoint 0 Receive/Transmit Data Buffer 5
HE0D0.HE0R04_HE0T04    4   HUB Endpoint 0 Receive/Transmit Data Buffer 4
HE0D0.HE0R03_HE0T03    3   HUB Endpoint 0 Receive/Transmit Data Buffer 3
HE0D0.HE0R02_HE0T02    2   HUB Endpoint 0 Receive/Transmit Data Buffer 2
HE0D0.HE0R01_HE0T01    1   HUB Endpoint 0 Receive/Transmit Data Buffer 1
HE0D0.HE0R00_HE0T00    0   HUB Endpoint 0 Receive/Transmit Data Buffer 0
HE0D1                 0x0031     USB HUB Endpoint 0 Data Register 1
HE0D1.HE0R17_HE0T17    7   HUB Endpoint 0 Receive/Transmit Data Buffer 7
HE0D1.HE0R16_HE0T16    6   HUB Endpoint 0 Receive/Transmit Data Buffer 6
HE0D1.HE0R15_HE0T15    5   HUB Endpoint 0 Receive/Transmit Data Buffer 5
HE0D1.HE0R14_HE0T14    4   HUB Endpoint 0 Receive/Transmit Data Buffer 4
HE0D1.HE0R13_HE0T13    3   HUB Endpoint 0 Receive/Transmit Data Buffer 3
HE0D1.HE0R12_HE0T12    2   HUB Endpoint 0 Receive/Transmit Data Buffer 2
HE0D1.HE0R11_HE0T11    1   HUB Endpoint 0 Receive/Transmit Data Buffer 1
HE0D1.HE0R10_HE0T10    0   HUB Endpoint 0 Receive/Transmit Data Buffer 0
HE0D2                 0x0032     USB HUB Endpoint 0 Data Register 2
HE0D2.HE0R27_HE0T27    7   HUB Endpoint 0 Receive/Transmit Data Buffer 7
HE0D2.HE0R26_HE0T26    6   HUB Endpoint 0 Receive/Transmit Data Buffer 6
HE0D2.HE0R25_HE0T25    5   HUB Endpoint 0 Receive/Transmit Data Buffer 5
HE0D2.HE0R24_HE0T24    4   HUB Endpoint 0 Receive/Transmit Data Buffer 4
HE0D2.HE0R23_HE0T23    3   HUB Endpoint 0 Receive/Transmit Data Buffer 3
HE0D2.HE0R22_HE0T22    2   HUB Endpoint 0 Receive/Transmit Data Buffer 2
HE0D2.HE0R21_HE0T21    1   HUB Endpoint 0 Receive/Transmit Data Buffer 1
HE0D2.HE0R20_HE0T20    0   HUB Endpoint 0 Receive/Transmit Data Buffer 0
HE0D3                 0x0033     USB HUB Endpoint 0 Data Register 3
HE0D3.HE0R37_HE0T37    7   HUB Endpoint 0 Receive/Transmit Data Buffer 7
HE0D3.HE0R36_HE0T36    6   HUB Endpoint 0 Receive/Transmit Data Buffer 6
HE0D3.HE0R35_HE0T35    5   HUB Endpoint 0 Receive/Transmit Data Buffer 5
HE0D3.HE0R34_HE0T34    4   HUB Endpoint 0 Receive/Transmit Data Buffer 4
HE0D3.HE0R33_HE0T33    3   HUB Endpoint 0 Receive/Transmit Data Buffer 3
HE0D3.HE0R32_HE0T32    2   HUB Endpoint 0 Receive/Transmit Data Buffer 2
HE0D3.HE0R31_HE0T31    1   HUB Endpoint 0 Receive/Transmit Data Buffer 1
HE0D3.HE0R30_HE0T30    0   HUB Endpoint 0 Receive/Transmit Data Buffer 0
HE0D4                 0x0034     USB HUB Endpoint 0 Data Register 4
HE0D4.HE0R47_HE0T47    7   HUB Endpoint 0 Receive/Transmit Data Buffer 7
HE0D4.HE0R46_HE0T46    6   HUB Endpoint 0 Receive/Transmit Data Buffer 6
HE0D4.HE0R45_HE0T45    5   HUB Endpoint 0 Receive/Transmit Data Buffer 5
HE0D4.HE0R44_HE0T44    4   HUB Endpoint 0 Receive/Transmit Data Buffer 4
HE0D4.HE0R43_HE0T43    3   HUB Endpoint 0 Receive/Transmit Data Buffer 3
HE0D4.HE0R42_HE0T42    2   HUB Endpoint 0 Receive/Transmit Data Buffer 2
HE0D4.HE0R41_HE0T41    1   HUB Endpoint 0 Receive/Transmit Data Buffer 1
HE0D4.HE0R40_HE0T40    0   HUB Endpoint 0 Receive/Transmit Data Buffer 0
HE0D5                 0x0035     USB HUB Endpoint 0 Data Register 5
HE0D5.HE0R57_HE0T57    7   HUB Endpoint 0 Receive/Transmit Data Buffer 7
HE0D5.HE0R56_HE0T56    6   HUB Endpoint 0 Receive/Transmit Data Buffer 6
HE0D5.HE0R55_HE0T55    5   HUB Endpoint 0 Receive/Transmit Data Buffer 5
HE0D5.HE0R54_HE0T54    4   HUB Endpoint 0 Receive/Transmit Data Buffer 4
HE0D5.HE0R53_HE0T53    3   HUB Endpoint 0 Receive/Transmit Data Buffer 3
HE0D5.HE0R52_HE0T52    2   HUB Endpoint 0 Receive/Transmit Data Buffer 2
HE0D5.HE0R51_HE0T51    1   HUB Endpoint 0 Receive/Transmit Data Buffer 1
HE0D5.HE0R50_HE0T50    0   HUB Endpoint 0 Receive/Transmit Data Buffer 0
HE0D6                 0x0036     USB HUB Endpoint 0 Data Register 6
HE0D6.HE0R67_HE0T67    7   HUB Endpoint 0 Receive/Transmit Data Buffer 7
HE0D6.HE0R66_HE0T66    6   HUB Endpoint 0 Receive/Transmit Data Buffer 6
HE0D6.HE0R65_HE0T65    5   HUB Endpoint 0 Receive/Transmit Data Buffer 5
HE0D6.HE0R64_HE0T64    4   HUB Endpoint 0 Receive/Transmit Data Buffer 4
HE0D6.HE0R63_HE0T63    3   HUB Endpoint 0 Receive/Transmit Data Buffer 3
HE0D6.HE0R62_HE0T62    2   HUB Endpoint 0 Receive/Transmit Data Buffer 2
HE0D6.HE0R61_HE0T61    1   HUB Endpoint 0 Receive/Transmit Data Buffer 1
HE0D6.HE0R60_HE0T60    0   HUB Endpoint 0 Receive/Transmit Data Buffer 0
HE0D7                 0x0037     USB HUB Endpoint 0 Data Register 7
HE0D7.HE0R77_HE0T77    7   HUB Endpoint 0 Receive/Transmit Data Buffer 7
HE0D7.HE0R76_HE0T76    6   HUB Endpoint 0 Receive/Transmit Data Buffer 6
HE0D7.HE0R75_HE0T75    5   HUB Endpoint 0 Receive/Transmit Data Buffer 5
HE0D7.HE0R74_HE0T74    4   HUB Endpoint 0 Receive/Transmit Data Buffer 4
HE0D7.HE0R73_HE0T73    3   HUB Endpoint 0 Receive/Transmit Data Buffer 3
HE0D7.HE0R72_HE0T72    2   HUB Endpoint 0 Receive/Transmit Data Buffer 2
HE0D7.HE0R71_HE0T71    1   HUB Endpoint 0 Receive/Transmit Data Buffer 1
HE0D7.HE0R70_HE0T70    0   HUB Endpoint 0 Receive/Transmit Data Buffer 0
UNUSED0038            0x0038     UNUSED
UNUSED0039            0x0039     UNUSED
PCTL                  0x003A     PLL Control Register
PCTL.PLLIE             7   PLL Interrupt Enable Bit
PCTL.PLLF              6   PLL Interrupt Flag Bit
PCTL.PLLON             5   PLL On Bit
PCTL.BCS               4   Base Clock Select Bit
PCTL.PRE1              3   Prescaler program bits 1
PCTL.PRE0              2   Prescaler program bits 0
PBWC                  0x003B     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               5   Acquisition Mode Bit
PMSH                  0x003C     PLL Multiplier Select Register High
PMSH.MUL11             3   Multiplier select bits 11
PMSH.MUL10             2   Multiplier select bits 10
PMSH.MUL9              1   Multiplier select bits 9
PMSH.MUL8              0   Multiplier select bits 8
PMSL                  0x003D     PLL Multiplier Select Register Low
PMSL.MUL7              7   Multiplier select bits 7
PMSL.MUL6              6   Multiplier select bits 6
PMSL.MUL5              5   Multiplier select bits 5
PMSL.MUL4              4   Multiplier select bits 4
PMSL.MUL3              3   Multiplier select bits 3
PMSL.MUL2              2   Multiplier select bits 2
PMSL.MUL1              1   Multiplier select bits 1
PMSL.MUL0              0   Multiplier select bits 0
UNUSED003E            0x003E     UNUSED
PRDS                  0x003F     PLL Reference Divider Select Register
PRDS.RDS3              3   Reference Divider Select Bit 3
PRDS.RDS2              2   Reference Divider Select Bit 2
PRDS.RDS1              1   Reference Divider Select Bit 1
PRDS.RDS0              0   Reference Divider Select Bit 0
KBFSCR                0x0040     Port F Keyboard Status and Control Register
KBFSCR.KEYFF           3   Port-F Keyboard Flag Bit
KBFSCR.ACKF            2   Port-F Keyboard Acknowledge Bit
KBFSCR.IMASKF          1   Port-F Keyboard Interrupt Mask Bit
KBFSCR.MODEF           0   Port-F Keyboard Triggering Sensitivity Bit
KBFIER                0x0041     Port F Keyboard Interrupt Enable Register
KBFIER.KBFIE7          7   Port-F Keyboard Interrupt Enable Bits 7
KBFIER.KBFIE6          6   Port-F Keyboard Interrupt Enable Bits 6
KBFIER.KBFIE5          5   Port-F Keyboard Interrupt Enable Bits 5
KBFIER.KBFIE4          4   Port-F Keyboard Interrupt Enable Bits 4
KBFIER.KBFIE3          3   Port-F Keyboard Interrupt Enable Bits 3
KBFIER.KBFIE2          2   Port-F Keyboard Interrupt Enable Bits 2
KBFIER.KBFIE1          1   Port-F Keyboard Interrupt Enable Bits 1
KBFIER.KBFIE0          0   Port-F Keyboard Interrupt Enable Bits 0
PFPER                 0x0042     Port F Pull-up Enable Register
PFPER.PFPE7            7   Port F pull-up enable bits 7
PFPER.PFPE6            6   Port F pull-up enable bits 6
PFPER.PFPE5            5   Port F pull-up enable bits 5
PFPER.PFPE4            4   Port F pull-up enable bits 4
PFPER.PFPE3            3   Port F pull-up enable bits 3
PFPER.PFPE2            2   Port F pull-up enable bits 2
PFPER.PFPE1            1   Port F pull-up enable bits 1
PFPER.PFPE0            0   Port F pull-up enable bits 0
UNUSED0043            0x0043     UNUSED
UNUSED0044            0x0044     UNUSED
UNUSED0045            0x0045     UNUSED
UNUSED0046            0x0046     UNUSED
DCR2                  0x0047     USB Embedded Device Control Register 2
DCR2.ENABLE2           3   Embedded Device Endpoint 2 Enable
DCR2.ENABLE1           2   Embedded Device Endpoint 1 Enable
DCR2.DSTALL2           1   Embedded Device Endpoint 2 Force Stall Bit
DCR2.DSTALL1           0   Embedded Device Endpoint 1 Force Stall Bit
DADDR                 0x0048     USB Embedded Device Address Register
DADDR.DEVEN            7   Enable USB Embedded Device
DADDR.DADD6            6   USB Embedded Device Function Address 6
DADDR.DADD5            5   USB Embedded Device Function Address 5
DADDR.DADD4            4   USB Embedded Device Function Address 4
DADDR.DADD3            3   USB Embedded Device Function Address 3
DADDR.DADD2            2   USB Embedded Device Function Address 2
DADDR.DADD1            1   USB Embedded Device Function Address 1
DADDR.DADD0            0   USB Embedded Device Function Address 0
DIR0                  0x0049     USB Embedded Device Interrupt Register 0
DIR0.TXD0F             7   Embedded Device Endpoint 0 Data Transmit Flag
DIR0.RXD0F             6   Embedded Device Endpoint 0 Data Receive Flag
DIR0.TXD0IE            3   Embedded Device Endpoint 0 Transmit Interrupt Enable
DIR0.RXD0IE            2   Embedded Device Endpoint 0 Receive Interrupt Enable
DIR0.TXD0FR            1   Embedded Device Endpoint 0 Transmit Flag Reset
DIR0.RXD0FR            0   Embedded Device Endpoint 0 Receive Flag Reset
DIR1                  0x004A     USB Embedded Device Interrupt Register 1
DIR1.TXD1F             7   Embedded Device Endpoint 1/2 Data Transmit Flag
DIR1.TXD1IE            3   Embedded Device Endpoint 1/2 Transmit Interrupt Enable
DIR1.TXD1FR            1   Embedded Device Endpoint 1/2 Transmit Flag Reset
DCR0                  0x004B     USB Embedded Device Control Register 0
DCR0.T0SEQ             7   Embedded Device Endpoint 0 Transmit Sequence Bit
DCR0.DSTALL0           6   Embedded Device Endpoint 0 Force Stall Bit
DCR0.TX0E              5   Embedded Device Endpoint 0 Transmit Enable
DCR0.RX0E              4   Embedded Device Endpoint 0 Receive Enable
DCR0.TP0SIZ3           3   Embedded Device Endpoint 0 Transmit Data Packet Size 3
DCR0.TP0SIZ2           2   Embedded Device Endpoint 0 Transmit Data Packet Size 2
DCR0.TP0SIZ1           1   Embedded Device Endpoint 0 Transmit Data Packet Size 1
DCR0.TP0SIZ0           0   Embedded Device Endpoint 0 Transmit Data Packet Size 0
DCR1                  0x004C     USB Embedded Device Control Register 1
DCR1.T1SEQ             7   Embedded Device Endpoint 1/2 Transmit Sequence Bit
DCR1.ENDADD            6   Endpoint Address Select
DCR1.TX1E              5   Embedded Device Endpoint 1/2 Transmit Enable
DCR1.TP1SIZ3           3   Embedded Device Endpoint 1/2 Transmit Data Packet Size 3
DCR1.TP1SIZ2           2   Embedded Device Endpoint 1/2 Transmit Data Packet Size 2
DCR1.TP1SIZ1           1   Embedded Device Endpoint 1/2 Transmit Data Packet Size 1
DCR1.TP1SIZ0           0   Embedded Device Endpoint 1/2 Transmit Data Packet Size 0
DSR                   0x004D     USB Embedded Device Status Register
DSR.DRSEQ              7   Embedded Device Endpoint 0 Receive Sequence Bit
DSR.DSETUP             6   Embedded Device SETUP Token Detect Bit
DSR.DTX1ST             5   Embedded Device Transmit First Flag
DSR.DTX1STR            4   Clear Transmit First Flag
DSR.RP0SIZ3            3   Embedded Device Endpoint 0 Receive Data Packet Size 3
DSR.RP0SIZ2            2   Embedded Device Endpoint 0 Receive Data Packet Size 2
DSR.RP0SIZ1            1   Embedded Device Endpoint 0 Receive Data Packet Size 1
DSR.RP0SIZ0            0   Embedded Device Endpoint 0 Receive Data Packet Size 0
UNUSED004E            0x004E     UNUSED
UNUSED004F            0x004F     UNUSED
UNUSED0050            0x0050     UNUSED
HDP1CR                0x0051     USB HUB Downstream Port 1 Control Register
HDP1CR.PEN1            7   Downstream Port Enable Control Bit
HDP1CR.LOWSP1          6   Full Speed / Low Speed Port Control Bit
HDP1CR.RST1            5   Force Reset to the Downstream Port
HDP1CR.RESUM1          4   Force Resume to the Downstream Port
HDP1CR.SUSP1           3   Downstream Port Selective Suspend Bit
HDP1CR.D1_PL           1   Downstream Port Differential Data
HDP1CR.D1_MIN          0   Downstream Port Differential Data
HDP2CR                0x0052     USB HUB Downstream Port 2 Control Register
HDP2CR.PEN2            7   Downstream Port Enable Control Bit     
HDP2CR.LOWSP2          6   Full Speed / Low Speed Port Control Bit
HDP2CR.RST2            5   Force Reset to the Downstream Port     
HDP2CR.RESUM2          4   Force Resume to the Downstream Port    
HDP2CR.SUSP2           3   Downstream Port Selective Suspend Bit  
HDP2CR.D2_PL           1   Downstream Port Differential Data      
HDP2CR.D2_MIN          0   Downstream Port Differential Data      
HDP3CR                0x0053     USB HUB Downstream Port 3 Control Register
HDP3CR.PEN3            7   Downstream Port Enable Control Bit     
HDP3CR.LOWSP3          6   Full Speed / Low Speed Port Control Bit
HDP3CR.RST3            5   Force Reset to the Downstream Port     
HDP3CR.RESUM3          4   Force Resume to the Downstream Port    
HDP3CR.SUSP3           3   Downstream Port Selective Suspend Bit  
HDP3CR.D3_PL           1   Downstream Port Differential Data      
HDP3CR.D3_MIN          0   Downstream Port Differential Data      
HDP4CR                0x0054     USB HUB Downstream Port 4 Control Register
HDP4CR.PEN4            7   Downstream Port Enable Control Bit     
HDP4CR.LOWSP4          6   Full Speed / Low Speed Port Control Bit
HDP4CR.RST4            5   Force Reset to the Downstream Port     
HDP4CR.RESUM4          4   Force Resume to the Downstream Port    
HDP4CR.SUSP4           3   Downstream Port Selective Suspend Bit  
HDP4CR.D4_PL           1   Downstream Port Differential Data      
HDP4CR.D4_MIN          0   Downstream Port Differential Data      
UNUSED0055            0x0055     UNUSED
SIETIR                0x0056     USB SIE Timing Interrupt Register
SIETIR.SOFF            7   Start Of Frame Detect Flag
SIETIR.EOF2F           6   The second End Of Frame Point Flag
SIETIR.EOPF            5   End of Packet Detect Flag
SIETIR.TRANF           4   Bus Signal Transition Detect Flag
SIETIR.SOFIE           3   Start Of Frame Interrupt Enable
SIETIR.EOF2IE          2   The Second End of Frame Point Interrupt Enable
SIETIR.EOPIE           1   End of Packet Detect Interrupt Enable
SIETIR.TRANIE          0   Bus Signal Transition Detect Interrupt Enable
SIETSR                0x0057     USB SIE Timing Status Register
SIETSR.RSTF            7   USB Reset Flag
SIETSR.RSTFR           6   Clear Reset Indicator Bit
SIETSR.LOCKF           5   USB Frame Timer Locked
SIETSR.LOCKFR          4   Clear Frame Timer Locked Flag
SIETSR.SOFFR           3   Start Of Frame Flag Reset
SIETSR.EOF2FR          2   The Second End of Frame Point Flag Reset
SIETSR.EOPFR           1   End of Packet Flag Reset
SIETSR.TRANFR          0   Bus Signal Transition Flag Reset
HADDR                 0x0058     USB HUB Address Register
HADDR.USBEN            7   USB Module Enable
HADDR.ADD6             6   USB HUB Function Address 6
HADDR.ADD5             5   USB HUB Function Address 5
HADDR.ADD4             4   USB HUB Function Address 4
HADDR.ADD3             3   USB HUB Function Address 3
HADDR.ADD2             2   USB HUB Function Address 2
HADDR.ADD1             1   USB HUB Function Address 1
HADDR.ADD0             0   USB HUB Function Address 0
HIR0                  0x0059     USB HUB Interrupt Register 0
HIR0.TXDF              7   HUB Endpoint 0 Data Transmit Flag
HIR0.RXDF              6   HUB Endpoint 0 Data Receive Flag
HIR0.TXDIE             3   HUB Endpoint 0 Transmit Interrupt Enable
HIR0.RXDIE             2   HUB Endpoint 0 Receive Interrupt Enable
HIR0.TXDFR             1   HUB Endpoint 0 Transmit Flag Reset
HIR0.RXDFR             0   HUB Endpoint 0 Receive Flag Reset
UNUSED005A            0x005A     UNUSED
HCR0                  0x005B     USB HUB Control Register 0
HCR0.TSEQ              7   HUB Endpoint 0 Transmit Sequence Bit
HCR0.STALL0            6   HUB Endpoint 0 Force Stall Bit
HCR0.TXE               5   HUB Endpoint 0 Transmit Enable
HCR0.RXE               4   HUB Endpoint 0 Receive Enable
HCR0.TPSIZ3            3   HUB Endpoint 0 Transmit Data Packet Size 3
HCR0.TPSIZ2            2   HUB Endpoint 0 Transmit Data Packet Size 2
HCR0.TPSIZ1            1   HUB Endpoint 0 Transmit Data Packet Size 1
HCR0.TPSIZ0            0   HUB Endpoint 0 Transmit Data Packet Size 0
HCDR                  0x005C     USB HUB Endpoint1 Control & Data Register
HCDR.STALL1            7   HUB Endpoint 1 Force Stall Bit
HCDR.PNEW              6   Port New Status Change
HCDR.PCHG5             5   HUB and Port Status Change Bits 5
HCDR.PCHG4             4   HUB and Port Status Change Bits 4
HCDR.PCHG3             3   HUB and Port Status Change Bits 3
HCDR.PCHG2             2   HUB and Port Status Change Bits 2
HCDR.PCHG1             1   HUB and Port Status Change Bits 1
HCDR.PCHG0             0   HUB and Port Status Change Bits 0
HSR                   0x005D     USB HUB Status Register
HSR.RSEQ               7   HUB Endpoint 0 Receive Sequence Bit
HSR.SETUP              6   HUB SETUP Token Detect Bit
HSR.TX1ST              5   HUB Transmit First Flag
HSR.TX1STR             4   Clear HUB Transmit First Flag
HSR.RPSIZ3             3   HUB Endpoint 0 Receive Data Packet Size 3
HSR.RPSIZ2             2   HUB Endpoint 0 Receive Data Packet Size 2
HSR.RPSIZ1             1   HUB Endpoint 0 Receive Data Packet Size 1
HSR.RPSIZ0             0   HUB Endpoint 0 Receive Data Packet Size 0
HRPCR                 0x005E     USB HUB Root Port Control Register
HRPCR.RESUM0           4   Force Resume to the Root Port
HRPCR.SUSPND           3   USB Suspend Control Bit
HRPCR.D0_PL            1   Root Port Differential Data
HRPCR.D0_MIN           0   Root Port Differential Data
UNUSED005F            0x005F     UNUSED
BSR                   0xFE00     Break Status Register
BSR.SBSW               1   SIM Break Stop/Wait
RSR                   0xFE01     Reset Status Register
RSR.POR                7   Power-On Reset Bit
RSR.PIN                6   External Reset Bit
RSR.COP                5   Computer Operating Properly Reset Bit
RSR.ILOP               4   Illegal Opcode Reset Bit
RSR.ILAD               3   Illegal Address Reset Bit (opcode fetches only)
RSR.USB                2   Universal Serial Bus Reset Bit
ReservFE02            0xFE02     Reserved
BFCR                  0xFE03     Break Flag Control Register
BFCR.BCFE              7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF6               7   Interrupt Flags 6
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF2               3   Interrupt Flags 2
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF11              4   Interrupt Flags 11
INT2.IF10              3   Interrupt Flags 10
INT2.IF9               2   Interrupt Flags 9
INT2.IF8               1   Interrupt Flags 8
INT2.IF7               0   Interrupt Flags 7
ReservFE06            0xFE06     Reserved
ReservFE07            0xFE07     Reserved
UNUSEDFE08            0xFE08     UNUSED
UNUSEDFE09            0xFE09     UNUSED
UNUSEDFE0A            0xFE0A     UNUSED
UNUSEDFE0B            0xFE0B     UNUSED
BRKH                  0xFE0C     Break Address Register High
BRKL                  0xFE0D     Break Address Register Low
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
ReservFF8D            0xFF8D     Reserved
COPCTL                0xFFFF     COP Control Register


.68HC08MR4
; MC68HC908MR8/D  http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=68HC08MR4&nodeId=01M98634
; MC68HC908MR8.pdf

; RAM=192 
; ROM=4K 
; EPROM=0
; EEPROM=0


; MEMORY MAP
area DATA FSR		   0x0000:0x0060
area DATA RAM		   0x0060:0x0120
area BSS  UNIMPLEMENTED	   0x0120:0xEE00
area DATA ROM		   0xEE00:0xFE00
area DATA FSR_1		   0xFE00:0xFE10
area DATA MONITOR_ROM	   0xFE10:0xFF49
area BSS  UNIMPLEMENTED	   0xFF49:0xFFD2
area DATA USER_VEC	   0xFFD2:0x10000


; Interrupt and reset vector assignments
interrupt __RESET     0xFFFE       Reset vector
interrupt SWI         0xFFFC       SWI vector
interrupt IRQ         0xFFFA       IRQ vector
interrupt PLL         0xFFF8       PLL vector
interrupt FAULT_1     0xFFF6       FAULT 1
interrupt FAULT_4     0xFFF0       FAULT 4
interrupt PWMMC       0xFFEE       PWMMC vector
interrupt TIMA_CH0    0xFFEC       TIMA channel 0 vector
interrupt TIMA_CH1    0xFFEA       TIMA channel 1 vector
interrupt TIMA        0xFFE4       TIMA overflow vector
interrupt TIMB_CH0    0xFFE2       TIMB channel 0 vector
interrupt TIMB_CH1    0xFFE0       TIMB channel 1 vector
interrupt TIMB        0xFFDE       TIMB overflow vector
interrupt A_D         0xFFDC       A/D vector
interrupt SCI_E       0xFFD6       SCI error vector
interrupt SCI_R       0xFFD4       SCI receive vector
interrupt SCI_T       0xFFD2       SCI transmit vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register Read
PTA.PTA6               6   Port A Data Bit 6
PTA.PTA5               5   Port A Data Bit 5
PTA.PTA4               4   Port A Data Bit 4
PTA.PTA3               3   Port A Data Bit 3
PTA.PTA2               2   Port A Data Bit 2
PTA.PTA1               1   Port A Data Bit 1
PTA.PTA0               0   Port A Data Bit 0
PTB                   0x0001     Port B Data Register
PTB.PTB6               6   Port B Data Bit 6
PTB.PTB5               5   Port B Data Bit 5
PTB.PTB4               4   Port B Data Bit 4
PTB.PTB3               3   Port B Data Bit 3
PTB.PTB2               2   Port B Data Bit 2
PTB.PTB1               1   Port B Data Bit 1
PTB.PTB0               0   Port B Data Bit 0
PTC                   0x0002     Port C Data Register
PTC.PTC1               1   Port C Data Bit 1
PTC.PTC0               0   Port C Data Bit 0
UNUSED0003            0x0003     UNUSED
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA6             6   Data Direction Register A Bit 6
DDRA.DDRA5             5   Data Direction Register A Bit 5
DDRA.DDRA4             4   Data Direction Register A Bit 4
DDRA.DDRA3             3   Data Direction Register A Bit 3
DDRA.DDRA2             2   Data Direction Register A Bit 2
DDRA.DDRA1             1   Data Direction Register A Bit 1
DDRA.DDRA0             0   Data Direction Register A Bit 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB6             6   Data Direction Register B Bit 6
DDRB.DDRB5             5   Data Direction Register B Bit 5
DDRB.DDRB4             4   Data Direction Register B Bit 4
DDRB.DDRB3             3   Data Direction Register B Bit 3
DDRB.DDRB2             2   Data Direction Register B Bit 2
DDRB.DDRB1             1   Data Direction Register B Bit 1
DDRB.DDRB0             0   Data Direction Register B Bit 0
DDRC                  0x0006     Data Direction Register C
DDRC.DDRC1             1   Data Direction Register C Bit 1
DDRC.DDRC0             0   Data Direction Register C Bit 0
UNUSED0007            0x0007     UNUSED
UNUSED0008            0x0008     UNUSED
UNUSED0009            0x0009     UNUSED
UNUSED000A            0x000A     UNUSED
UNUSED000B            0x000B     UNUSED
UNUSED000C            0x000C     UNUSED
UNUSED000D            0x000D     UNUSED
TASC                  0x000E     TIMA Status_Control Register
TASC.TOF               7   TIMA Overflow Flag Bit
TASC.TOIE              6   TIMA Overflow Interrupt Enable Bit
TASC.TSTOP             5   TIMA Stop Bit
TASC.TRST              4   TIMA Reset Bit
TASC.PS2               2   Prescaler Select Bits 2
TASC.PS1               1   Prescaler Select Bits 1
TASC.PS0               0   Prescaler Select Bits 0
TACNTH                0x000F     TIMA Counter Register High
TACNTL                0x0010     TIMA Counter Register Low
TAMODH                0x0011     TIMA Counter Modulo Register High
TAMODL                0x0012     TIMA Counter Modulo Register Low
TASC0                 0x0013     TIMA Channel 0 Status_Control Register
TASC0.CH0F             7   Channel 0 Flag Bit
TASC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TASC0.MS0B             5   Mode Select Bit B
TASC0.MS0A             4   Mode Select Bit A
TASC0.ELS0B            3   Edge/Level Select Bits
TASC0.ELS0A            2   Edge/Level Select Bits
TASC0.TOV0             1   Toggle-On-Overflow Bit
TASC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TACH0H                0x0014     TIMA Channel 0 Register High
TACH0L                0x0015     TIMA Channel 0 Register Low
TASC1                 0x0016     TIMA Channel 1 Status_Control Register
TASC1.CH1F             7   Channel 1 Flag Bit            
TASC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TASC1.MS1A             4   Mode Select Bit A               
TASC1.ELS1B            3   Edge/Level Select Bits          
TASC1.ELS1A            2   Edge/Level Select Bits          
TASC1.TOV1             1   Toggle-On-Overflow Bit          
TASC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TACH1H                0x0017     TIMA Channel 1 Register High
TACH1L                0x0018     TIMA Channel 1 Register Low
UNUSED0019            0x0019     UNUSED
UNUSED001A            0x001A     UNUSED
RESERV001B            0x001B     RESERVED
MOR                   0x001F     MC68HC08MR4 Mask Option Register
MOR.EDGE               7   Edge-Align Enable Bit
MOR.BOTNEG             6   Bottom-Side PWM Polarity Bit
MOR.TOPNEG             5   Top-Side PWM Polarity Bit
MOR.INDEP              4   Independent Mode Enable Bit
MOR.LVIRST             3   LVI Power Enable Bit
MOR.LVIPWR             2   LVI Reset Enable Bit
MOR.STOPE              1   STOP Enable Bit
MOR.COPD               0   COP Disable Bit
PCTL1                 0x0020     PWM Control Register 1
PCTL1.DISX             7   Software Disable for Bank X Bit
PCTL1.DISY             6   Software Disable for Bank Y Bit
PCTL1.PWMINT           5   PWM Interrupt Enable Bit
PCTL1.PWMF             4   PWM Reload Flag
PCTL1.LDOK             1   Load OK Bit
PCTL1.PWMEN            0   PWM Module Enable Bit
PCTL2                 0x0021     PWM Control Register 2
PCTL2.LDFQ1            7   PWM Load Frequency Bits
PCTL2.LDFQ0            6   PWM Load Frequency Bits
PCTL2.SEL12            4   Top/Bottom Correction Bit for PWM Pair 1 (PWMs 1 and 2)
PCTL2.SEL34            3   Top/Bottom Correction Bit for PWM Pair 2 (PWMs 3 and 4)
PCTL2.SEL56            2   Top/Bottom Correction Bit for PWM Pair 3 (PWMs 5 and 6)
PCTL2.PRSC1            1   PWM Prescaler Bits 1
PCTL2.PRSC0            0   PWM Prescaler Bits 0
FCR                   0x0022     Fault Control Register
FCR.FINT4              7   Fault 4 Interrupt Enable Bit
FCR.FMODE4             6   Fault Mode Selection for Fault Pin 4 Bit
FCR.FINT1              1   Fault 1 Interrupt Enable Bit
FCR.FMODE1             0   Fault Mode Selection for Fault Pin 1 Bit
_FSR_                 0x0023     Fault Status Register
_FSR_.FPIN4            7   State of Fault Pin 4 Bit
_FSR_.FFLAG4           6   Fault Event Flag 4
_FSR_.FPIN1            1   State of Fault Pin 1
_FSR_.FFLAG1           0   Fault Event Flag 1
FTACK                 0x0024     Fault Acknowledge Register
FTACK.FTACK4           6   Fault Acknowledge 4 Bit
FTACK.FTACK1           0   Fault Acknowledge 1 Bit
PWMOUT                0x0025     PWM Output Control
PWMOUT.OUTCTL          6
PWMOUT.OUT6            5
PWMOUT.OUT5            4
PWMOUT.OUT4            3
PWMOUT.OUT3            2
PWMOUT.OUT2            1
PWMOUT.OUT1            0
PCNTH                 0x0026     PWM Counter Register High
PCNTL                 0x0027     PWM Counter Register Low
PMODH                 0x0028     PWM Counter Modulo Register High
PMODL                 0x0029     PWM Counter Modulo Register Low
PVAL1H                0x002A     PWM 1 Value Register High
PVAL1L                0x002B     PWM 1 Value Register Low
PVAL2H                0x002C     PWM 2 Value Register High
PVAL2L                0x002D     PWM 2 Value Register Low
PVAL3H                0x002E     PWM 3 Value Register High
PVAL3L                0x002F     PWM 3 Value Register Low
PVAL4H                0x0030     PWM 4 Value Register High
PVAL4L                0x0031     PWM 4 Value Register Low
PMVAL5H               0x0032     PWM 5 Value Register High
PVAL5L                0x0033     PWM 5 Value Register Low
PVAL6H                0x0034     PWM 6 Value Register High
PMVAL6L               0x0035     PWM 6 Value Register Low
DEADTM                0x0036     Dead-Time Write-Once Register
DISMAP                0x0037     PWM Disable Mapping Write-Once Register
SCC1                  0x0038     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit
SCC1.ENSCI             6   Enable SCI Bit
SCC1.TXINV             5   Transmit Inversion Bit
SCC1.M                 4   Mode (Character Length) Bit
SCC1.WAKE              3   Wakeup Condition Bit
SCC1.ILTY              2   Idle Line Type Bit
SCC1.PEN               1   Parity Enable Bit
SCC1.PTY               0   Parity Bit
SCC2                  0x0039     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit
SCC2.ILIE              4   Idle Line Interrupt Enable Bit
SCC2.TE                3   Transmitter Enable Bit
SCC2.RE                2   Receiver Enable Bit
SCC2.RWU               1   Receiver Wakeup Bit
SCC2.SBK               0   Send Break Bit
SCC3                  0x003A     SCI Control Register 3
SCC3.R8                7   Received Bit 8
SCC3.T8                6   Transmitted Bit 8
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit
SCS1                  0x003B     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit
SCS1.TC                6   Transmission Complete Bit
SCS1.SCRF              5   SCI Receiver Full Bit
SCS1.IDLE              4   Receiver Idle Bit
SCS1.OR                3   Receiver Overrun Bit
SCS1.NF                2   Receiver Noise Flag Bit
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit
SCS2                  0x003C     SCI Status Register 2
SCS2.BKF               1   Break Flag Bit
SCS2.RPF               0   -Reception-in-Progress Flag Bit
SCDR                  0x003D     SCI Data Register
SCDR.R7_T7             7   Receive/Transmit Data Bit 7
SCDR.R6_T6             6   Receive/Transmit Data Bit 6
SCDR.R5_T5             5   Receive/Transmit Data Bit 5
SCDR.R4_T4             4   Receive/Transmit Data Bit 4
SCDR.R3_T3             3   Receive/Transmit Data Bit 3
SCDR.R2_T2             2   Receive/Transmit Data Bit 2
SCDR.R1_T1             1   Receive/Transmit Data Bit 1
SCDR.R0_T0             0   Receive/Transmit Data Bit 0
SCBR                  0x003E     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2
SCBR.SCR1              1   SCI Baud Rate Select Bits 1
SCBR.SCR0              0   SCI Baud Rate Select Bits 0
ISCR                  0x003F     IRQ Status_Control Register
ISCR.IRQF              3   IRQ Flag
ISCR.ACK1              2   IRQ Interrupt Request Acknowledge Bit
ISCR.IMASK1            1   IRQ Interrupt Mask Bit
ISCR.MODE1             0   IRQ Edge/Level Select Bit
ADSCR                 0x0040     ADC Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADRH                  0x0041     ADC Data Register High
ADRH.AD9               1
ADRH.AD8               0
ADRL                  0x0042     ADC Data Register Low
ADRL.AD7               7
ADRL.AD6               6
ADRL.AD5               5
ADRL.AD4               4
ADRL.AD3               3
ADRL.AD2               2
ADRL.AD1               1
ADRL.AD0               0
ADCLK                 0x0043     ADC Clock Register
ADCLK.ADIV2            7   ADC Clock Prescaler Bits 2
ADCLK.ADIV1            6   ADC Clock Prescaler Bits 1
ADCLK.ADIV0            5   ADC Clock Prescaler Bits 0
ADCLK.ADICLK           4   ADC Input Clock Select Bit
ADCLK.MODE1            3   Modes of Result Justification Bits 1
ADCLK.MODE0            2   Modes of Result Justification Bits 0
UNUSED0044            0x0044     UNUSED
UNUSED0045            0x0045     UNUSED
UNUSED0046            0x0046     UNUSED
UNUSED0047            0x0047     UNUSED
UNUSED0048            0x0048     UNUSED
UNUSED0049            0x0049     UNUSED
UNUSED004A            0x004A     UNUSED
UNUSED004B            0x004B     UNUSED
UNUSED004C            0x004C     UNUSED
UNUSED004D            0x004D     UNUSED
UNUSED004E            0x004E     UNUSED
UNUSED004F            0x004F     UNUSED
UNUSED0050            0x0050     UNUSED
TBSC                  0x0051     TIMB Status_Control Register
TBSC.TOF               7   TIMB Overflow Flag Bit
TBSC.TOIE              6   TIMB Overflow Interrupt Enable Bit
TBSC.TSTOP             5   TIMB Stop Bit
TBSC.TRST              4   TIMB Reset Bit
TBSC.PS2               2   Prescaler Select Bits 2
TBSC.PS1               1   Prescaler Select Bits 1
TBSC.PS0               0   Prescaler Select Bits 0
TBCNTH                0x0052     TIMB Counter Register High
TBCNTL                0x0053     TIMB Counter Register Low
TBMODH                0x0054     TIMB Counter Modulo Register High
TBMODL                0x0055     TIMB Counter Modulo Register Low
TBSC0                 0x0056     TIMB Channel 0 Status_Control Register
TBSC0.CH0F             7   Channel 0 Flag Bit
TBSC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TBSC0.MS0B             5   Mode Select Bit B             	
TBSC0.MS0A             4   Mode Select Bit A
TBSC0.ELS0B            3   Edge/Level Select Bits
TBSC0.ELS0A            2   Edge/Level Select Bits
TBSC0.TOV0             1   Toggle-On-Overflow Bit
TBSC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TBCH0H                0x0057     TIMB Channel 0 Register High
TBCH0L                0x0058     TIMB Channel 0 Register Low
TBSC1                 0x0059     TIMB Channel 1 Status_Control Register
TBSC1.CH1F             7   Channel 1 Flag Bit            
TBSC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TBSC1.MS1A             4   Mode Select Bit A               
TBSC1.ELS1B            3   Edge/Level Select Bits          
TBSC1.ELS1A            2   Edge/Level Select Bits          
TBSC1.TOV1             1   Toggle-On-Overflow Bit          
TBSC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TBCH1H                0x005A     TIMB Channel 1 Register High
TBCH1L                0x005B     TIMB Channel 1 Register Low
PCTL                  0x005C     PLL Control Register
PCTL.PLLIE             7   PLL Interrupt Enable Bit
PCTL.PLLF              6   PLL Interrupt Flag Bit
PCTL.PLLON             5   PLL On Bit
PCTL.BCS               4   Base Clock Select Bit
PBWC                  0x005D     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               5   Acquisition Mode Bit
PBWC.XLD               4   Crystal Loss Detect Bit
PPG                   0x005E     PLL Programming Register
PPG.MUL7               7   Multiplier Select Bits 7
PPG.MUL6               6   Multiplier Select Bits 6
PPG.MUL5               5   Multiplier Select Bits 5
PPG.MUL4               4   Multiplier Select Bits 4
PPG.VRS7               3   VCO Range Select Bits 7
PPG.VRS6               2   VCO Range Select Bits 6
PPG.VRS5               1   VCO Range Select Bits 5
PPG.VRS4               0   VCO Range Select Bits 4
Reserv005F            0x005F     RESERVED
SBSR                  0xFE00     SIM Break Status Register
SBSR.SBSW              1   Break Wait Bit
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Bit
SRSR.PIN               6   External Reset Bit
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit (opcode fetches only)
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
BRKH                  0xFE0C     Break Address Register High
BRKL                  0xFE0D     Break Address Register Low
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
LVISCR                0xFE0F     LVI Status and Control Register
LVISCR.LVIOUT          7   LVI Output Bit
LVISCR.TRPSEL          5   LVI Trip Select Bit
ReservFFD8            0xFFD8     Reserved
ReservFFD9            0xFFD9     Reserved
ReservFFDA            0xFFDA     Reserved
ReservFFDB            0xFFDB     Reserved
ReservFFE6            0xFFE6     Reserved
ReservFFE7            0xFFE7     Reserved
ReservFFE8            0xFFE8     Reserved
ReservFFE9            0xFFE9     Reserved
ReservFFF2            0xFFF2     Reserved
ReservFFF3            0xFFF3     Reserved
ReservFFF4            0xFFF4     Reserved
ReservFFF5            0xFFF5     Reserved
COPCTL                0xFFFF     COP Control Register


.68HC08QA24
; MC68HC08QA24/D  http://e-www.motorola.com/brdata/PDFDB/docs/MC68HC08QA24.pdf
; MC68HC08QA24.pdf

; RAM=768 24,064 
; ROM=24064 
; EEPROM=512


; MEMORY MAP
area DATA FSR		   0x0000:0x003B
area BSS  UNIMPLEMENTED	   0x003B:0x0040
area DATA RAM		   0x0040:0x0340
area BSS  RESERVED	   0x0340:0x0342
area BSS  UNIMPLEMENTED	   0x0342:0x0500
area DATA CAN_CONTROL	   0x0500:0x0520
area BSS  RESERVED	   0x0520:0x0540
area DATA CAN_MESSAGE	   0x0540:0x0580
area BSS  UNIMPLEMENTED	   0x0580:0x0800
area DATA EEPROM	   0x0800:0x0A00
area BSS  RESERVED	   0x0A00:0x0A02
area BSS  UNIMPLEMENTED	   0x0A02:0xA000
area DATA ROM		   0xA000:0xFE00
area DATA FSR_1		   0xFE00:0xFE20
area DATA MONITOR_ROM	   0xFE20:0xFF00
area BSS  UNIMPLEMENTED	   0xFF00:0xFFD8
area DATA USER_VEC	   0xFFD8:0x10000


; Interrupt and reset vector assignments
interrupt __RESET       0xFFFE       Reset Vector
interrupt SWI           0xFFFC       SWI Vector
interrupt IRQ           0xFFFA       IRQ Vector
interrupt PLL           0xFFF8       PLL Vector
interrupt TIM_A_CH0     0xFFF6       TIM A Channel 0 Vector
interrupt TIM_A_CH1     0xFFF4       TIM A Channel 1 Vector
interrupt TIM_A         0xFFF2       TIM A Overflow Vector
interrupt TIM_B_CH0     0xFFF0       TIM B Channel 0 Vector
interrupt TIM_B_CH1     0xFFEE       TIM B Channel 1 Vector
interrupt TIM_B         0xFFEC       TIM B Overflow Vector
interrupt SPI_R         0xFFEA       SPI Receive Vector
interrupt SPI_T         0xFFE8       SPI Transmit Vector
interrupt SCI_E         0xFFE6       SCI Error Vector
interrupt SCI_R         0xFFE4       SCI Receive Vector
interrupt SCI_T         0xFFE2       SCI Transmit Vector
interrupt ADC           0xFFE0       ADC Vector
interrupt CAN_W         0xFFDE       CAN Wakeup Vector
interrupt CAN_E         0xFFDC       CAN Error Vector
interrupt CAN_R         0xFFDA       CAN Receive Vector
interrupt CAN_T         0xFFD8       CAN Transmit Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bit 7
PTA.PTA6               6   Port A Data Bit 6
PTA.PTA5               5   Port A Data Bit 5
PTA.PTA4               4   Port A Data Bit 4
PTA.PTA3               3   Port A Data Bit 3
PTA.PTA2               2   Port A Data Bit 2
PTA.PTA1               1   Port A Data Bit 1
PTA.PTA0               0   Port A Data Bit 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bit 7
PTB.PTB6               6   Port B Data Bit 6
PTB.PTB5               5   Port B Data Bit 5
PTB.PTB4               4   Port B Data Bit 4
PTB.PTB3               3   Port B Data Bit 3
PTB.PTB2               2   Port B Data Bit 2
PTB.PTB1               1   Port B Data Bit 1
PTB.PTB0               0   Port B Data Bit 0
PTC                   0x0002     Port C Data Register
PTC.PTC4               4   Port C Data Bit 4
PTC.PTC3               3   Port C Data Bit 3
PTC.PTC2               2   Port C Data Bit 2
PTC.PTC1               1   Port C Data Bit 1
PTC.PTC0               0   Port C Data Bit 0
PTD                   0x0003     Port D Data Register
PTD.PTD5               5   Port D Data Bit 5
PTD.PTD4               4   Port D Data Bit 4
PTD.PTD3               3   Port D Data Bit 3
PTD.PTD2               2   Port D Data Bit 2
PTD.PTD1               1   Port D Data Bit 1
PTD.PTD0               0   Port D Data Bit 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bit 7
DDRA.DDRA6             6   Data Direction Register A Bit 6
DDRA.DDRA5             5   Data Direction Register A Bit 5
DDRA.DDRA4             4   Data Direction Register A Bit 4
DDRA.DDRA3             3   Data Direction Register A Bit 3
DDRA.DDRA2             2   Data Direction Register A Bit 2
DDRA.DDRA1             1   Data Direction Register A Bit 1
DDRA.DDRA0             0   Data Direction Register A Bit 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bit 7
DDRB.DDRB6             6   Data Direction Register B Bit 6
DDRB.DDRB5             5   Data Direction Register B Bit 5
DDRB.DDRB4             4   Data Direction Register B Bit 4
DDRB.DDRB3             3   Data Direction Register B Bit 3
DDRB.DDRB2             2   Data Direction Register B Bit 2
DDRB.DDRB1             1   Data Direction Register B Bit 1
DDRB.DDRB0             0   Data Direction Register B Bit 0
DDRC                  0x0006     Data Direction Register C
DDRC.MCLKEN            7   MCLK Enable Bit
DDRC.DDRC4             3   Data Direction Register C Bit 3
DDRC.DDRC3             2   Data Direction Register C Bit 2
DDRC.DDRC2             1   Data Direction Register C Bit 1
DDRC.DDRC1             0   Data Direction Register C Bit 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD5             5   Data Direction Register D Bit 5
DDRD.DDRD4             4   Data Direction Register D Bit 4
DDRD.DDRD3             3   Data Direction Register D Bit 3
DDRD.DDRD2             2   Data Direction Register D Bit 2
DDRD.DDRD1             1   Data Direction Register D Bit 1
DDRD.DDRD0             0   Data Direction Register D Bit 0
PTE                   0x0008     Port E Data Register
PTE.PTE7               7   Port E Data Bit 7
PTE.PTE6               6   Port E Data Bit 6
PTE.PTE5               5   Port E Data Bit 5
PTE.PTE4               4   Port E Data Bit 4
PTE.PTE3               3   Port E Data Bit 3
PTE.PTE2               2   Port E Data Bit 2
PTE.PTE1               1   Port E Data Bit 1
PTE.PTE0               0   Port E Data Bit 0
PTF                   0x0009     Port F Data Register
PTF.PTF3               3   Port F Data Bit 3
PTF.PTF2               2   Port F Data Bit 2
PTF.PTF1               1   Port F Data Bit 1
PTF.PTF0               0   Port F Data Bit 0
Reserv000A            0x000A     RESERVED
Reserv000B            0x000B     RESERVED
DDRE                  0x000C     Data Direction Register E
DDRE.DDRE7             7   Data Direction Register E Bit 7
DDRE.DDRE6             6   Data Direction Register E Bit 6
DDRE.DDRE5             5   Data Direction Register E Bit 5
DDRE.DDRE4             4   Data Direction Register E Bit 4
DDRE.DDRE3             3   Data Direction Register E Bit 3
DDRE.DDRE2             2   Data Direction Register E Bit 2
DDRE.DDRE1             1   Data Direction Register E Bit 1
DDRE.DDRE0             0   Data Direction Register E Bit 0
DDRF                  0x000D     Data Direction Register F
DDRF.DDRF3             3   Data Direction Register F Bit 3
DDRF.DDRF2             2   Data Direction Register F Bit 2
DDRF.DDRF1             1   Data Direction Register F Bit 1
DDRF.DDRF0             0   Data Direction Register F Bit 0
Reserv000E            0x000E     RESERVED
Reserv000F            0x000F     RESERVED
SPCR                  0x0010     SPI Control Register
SPCR.SPRIE             7   SPI Receiver Interrupt Enable Bit
SPCR.SPMSTR            5   SPI Master Bit
SPCR.CPOL              4   Clock Polarity Bit
SPCR.CPHA              3   Clock Polarity Bit
SPCR.SPWOM             2   SPI Wired-OR Mode Bit
SPCR.SPE               1   SPI Enable Bit
SPCR.SPTIE             0   SPI Transmit Interrupt Enable Bit
SPSCR                 0x0011     SPI Status and Control Register
SPSCR.SPRF             7   SPI Receiver Full Bit      
SPSCR.ERRIE            6   Error Interrupt Enable Bit 
SPSCR.OVRF             5   Overflow Bit               
SPSCR.MODF             4   Mode Fault Bit             
SPSCR.SPTE             3   SPI Transmitter Empty Bit  
SPSCR.MODFEN           2   Mode Fault Enable Bit      
SPSCR.SPR1             1   SPI Baud Rate Select Bits 1
SPSCR.SPR0             0   SPI Baud Rate Select Bits 0
SPDR                  0x0012     SPI Data Register
SPDR.R7_T7             7   Receive/Transmit Data Bit 7
SPDR.R6_T6             6   Receive/Transmit Data Bit 6
SPDR.R5_T5             5   Receive/Transmit Data Bit 5
SPDR.R4_T4             4   Receive/Transmit Data Bit 4
SPDR.R3_T3             3   Receive/Transmit Data Bit 3
SPDR.R2_T2             2   Receive/Transmit Data Bit 2
SPDR.R1_T1             1   Receive/Transmit Data Bit 1
SPDR.R0_T0             0   Receive/Transmit Data Bit 0
SCC1                  0x0013     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit
SCC1.ENSCI             6   Enable SCI Bit
SCC1.TXINV             5   Transmit Inversion Bit
SCC1.M                 4   Mode (Character Length) Bit
SCC1.WAKE              3   Wakeup Condition Bit
SCC1.ILTY              2   Idle Line Type Bit
SCC1.PEN               1   Parity Enable Bit
SCC1.PTY               0   Parity Bit
SCC2                  0x0014     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit
SCC2.ILIE              4   Idle Line Interrupt Enable Bit
SCC2.TE                3   Transmitter Enable Bit
SCC2.RE                2   Receiver Enable Bit
SCC2.RWU               1   Receiver Wakeup Bit
SCC2.SBK               0   Send Break Bit
SCC3                  0x0015     SCI Control Register 3
SCC3.R8                7   Received Bit 8
SCC3.T8                6   Transmitted Bit 8
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit
SCS1                  0x0016     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit
SCS1.TC                6   Transmission Complete Bit
SCS1.SCRF              5   SCI Receiver Full Bit
SCS1.IDLE              4   Receiver Idle Bit
SCS1.OR                3   Receiver Overrun Bit
SCS1.NF                2   Receiver Noise Flag Bit
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit
SCS2                  0x0017     SCI Status Register 2
SCS2.BKF               1   Break Flag Bit
SCS2.RPF               0   Reception-in-Progress Flag Bit
SCDR                  0x0018     SCI Data Register
SCDR.R7_T7             7   Receive/Transmit Data Bit 7
SCDR.R6_T6             6   Receive/Transmit Data Bit 6
SCDR.R5_T5             5   Receive/Transmit Data Bit 5
SCDR.R4_T4             4   Receive/Transmit Data Bit 4
SCDR.R3_T3             3   Receive/Transmit Data Bit 3
SCDR.R2_T2             2   Receive/Transmit Data Bit 2
SCDR.R1_T1             1   Receive/Transmit Data Bit 1
SCDR.R0_T0             0   Receive/Transmit Data Bit 0
SCBR                  0x0019     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2
SCBR.SCR1              1   SCI Baud Rate Select Bits 1
SCBR.SCR0              0   SCI Baud Rate Select Bits 0
ISCR                  0x001A     IRQ Status and Control Register
ISCR.IRQF              3   IRQ Flag
ISCR.ACK               2   IRQ Interrupt Request Acknowledge Bit
ISCR.IMASK             1   IRQ Interrupt Mask Bit
ISCR.MODE              0   IRQ Edge/Level Select Bit
Reserv001B            0x001B     RESERVED
PCTL                  0x001C     PLL Control Register
PCTL.PLLIE             7   PLL Interrupt Enable Bit
PCTL.PLLF              6   PLL Flag Bit
PCTL.PLLON             5   PLL On Bit
PCTL.BCS               4   Base Clock Select Bit
PBWC                  0x001D     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               5   Acquisition Mode Bit
PBWC.XLD               4   Crystal Loss Detect Bit
PPG                   0x001E     PLL Programming Register
PPG.MUL7               7   Multiplier Select Bits 7
PPG.MUL6               6   Multiplier Select Bits 6
PPG.MUL5               5   Multiplier Select Bits 5
PPG.MUL4               4   Multiplier Select Bits 4
PPG.VRS7               3   VCO Range Select Bits 7
PPG.VRS6               2   VCO Range Select Bits 6
PPG.VRS5               1   VCO Range Select Bits 5
PPG.VRS4               0   VCO Range Select Bits 4
MOR                   0x001F     Mask Option Register
MOR.LVISTOP            7   LVI Stop Mode Enable Bit
MOR.ROMSEC             6   ROM Security Bit
MOR.LVIRST             5   Low-Voltage Inhibit Reset Bit
MOR.LVIPWR             4   LVI Power Enable Bit
MOR.SSREC              3   Short Stop Recovery Bit
MOR.COPS               2   COP Short Timeout Bit
MOR.STOP               1   STOP Instruction Enable Bit
MOR.COPD               0   COP Disable Bit
TASC                  0x0020     TIMA Status and Control Register
TASC.TOF               7   TIMA Overflow Flag Bit
TASC.TOIE              6   TIMA Overflow Interrupt Enable Bit
TASC.TSTOP             5   TIMA Stop Bit
TASC.TRST              4   TIMA Reset Bit
TASC.PS2               2   Prescaler Select Bits 2
TASC.PS1               1   Prescaler Select Bits 1
TASC.PS0               0   Prescaler Select Bits 0
Reserv0021            0x0021     RESERVED
TACNTH                0x0022     TIMA Counter Register High
TACNTL                0x0023     TIMA Counter Register Low
TAMODH                0x0024     TIMA Modulo Register High
TAMODL                0x0025     TIMA Modulo Register Low
TASC0                 0x0026     TIMA Channel 0 Status and Control Register
TASC0.CH0F             7   Channel 0 Flag Bit
TASC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TASC0.MS0B             5   Mode Select Bit B
TASC0.MS0A             4   Mode Select Bit A
TASC0.ELS0B            3   Edge/Level Select Bits
TASC0.ELS0A            2   Edge/Level Select Bits
TASC0.TOV0             1   Toggle-On-Overflow Bit
TASC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TACH0H                0x0027     TIMA Channel 0 Register High
TACH0L                0x0028     TIMA Channel 0 Register Low
TASC1                 0x0029     TIMA Channel 1 Status and Control Register
TASC1.CH1F             7   Channel 1 Flag Bit            
TASC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TASC1.MS1A             4   Mode Select Bit A               
TASC1.ELS1B            3   Edge/Level Select Bits          
TASC1.ELS1A            2   Edge/Level Select Bits          
TASC1.TOV1             1   Toggle-On-Overflow Bit          
TASC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TACH1H                0x002A     TIMA Channel 1 Register High
TACH1L                0x002B     TIMA Channel 1 Register Low
TBSC                  0x002C     TIMB Status and Control Register
TBSC.TOF               7   TIMB Overflow Flag Bit
TBSC.TOIE              6   TIMB Overflow Interrupt Enable Bit
TBSC.TSTOP             5   TIMB Stop Bit
TBSC.TRST              4   TIMB Reset Bit
TBSC.PS2               2   Prescaler Select Bits 2
TBSC.PS1               1   Prescaler Select Bits 1
TBSC.PS0               0   Prescaler Select Bits 0
Reserv002D            0x002D     RESERVED
TBCNTH                0x002E     TIMB Counter Register High
TBCNTL                0x002F     TIMB Counter Register Low
TBMODH                0x0030     TIMB Modulo Register High
TBMODL                0x0031     TIMB Modulo Register Low
TBSC0                 0x0032     TIMB Channel 0 Status and Control Register
TBSC0.CH0F             7   Channel 0 Flag Bit
TBSC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TBSC0.MS0B             5   Mode Select Bit B
TBSC0.MS0A             4   Mode Select Bit A
TBSC0.ELS0B            3   Edge/Level Select Bits
TBSC0.ELS0A            2   Edge/Level Select Bits
TBSC0.TOV0             1   Toggle-On-Overflow Bit
TBSC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TBCH0H                0x0033     TIMB Channel 0 Register
TBCH0L                0x0034     TIMB Channel 0 Register Low
TBSC1                 0x0035     TIMB Channel 1 Status and Control Register
TBSC1.CH1F             7   Channel 1 Flag Bit            
TBSC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TBSC1.MS1A             4   Mode Select Bit A               
TBSC1.ELS1B            3   Edge/Level Select Bits          
TBSC1.ELS1A            2   Edge/Level Select Bits          
TBSC1.TOV1             1   Toggle-On-Overflow Bit          
TBSC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TBCH1H                0x0036     TIMB Channel 1 Register High
TBCH1L                0x0037     TIMB Channel 1 Register Low
ADSCR                 0x0038     Analog-to-Digital Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADR                   0x0039     Analog-to-Digital Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADICLK                0x003A     Analog-to-Digital Input Clock Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bits 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bits 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bits 0
ADICLK.ADICLK          4   ADC Input Clock Register Bit
CMCR0                 0x0500     CAN Module Control Register 0
CMCR0.SYNCH            4   Synchronized Status Bit
CMCR0.TLNKEN           3   Timer Enable Flag
CMCR0.SLPAK            2   Sleep Mode Acknowledge Flag
CMCR0.SLPRQ            1   Sleep Request, Go to Internal Sleep Mode Flag
CMCR0.SFTRES           0   Soft Reset Bit
CMCR1                 0x0501     CAN Module Control Register 1
CMCR1.LOOPB            2   Loop Back Self-Test Mode Bit
CMCR1.WUPM             1   Wakeup Mode Flag
CMCR1.CLKSRC           0   Clock Source Flag
CBTR0                 0x0502     CAN Bus Timing Register 0
CBTR0.SJW1             7   Synchronization Jump Width Bits 1
CBTR0.SJW0             6   Synchronization Jump Width Bits 0
CBTR0.BRP5             5   Baud Rate Prescaler Bits 5
CBTR0.BRP4             4   Baud Rate Prescaler Bits 4
CBTR0.BRP3             3   Baud Rate Prescaler Bits 3
CBTR0.BRP2             2   Baud Rate Prescaler Bits 2
CBTR0.BRP1             1   Baud Rate Prescaler Bits 1
CBTR0.BRP0             0   Baud Rate Prescaler Bits 0
CBTR1                 0x0503     CAN Bus Timing Register 1
CBTR1.SAMP             7   Sampling Bit
CBTR1.TSEG22           6   Time Segment Bits 22
CBTR1.TSEG21           5   Time Segment Bits 21
CBTR1.TSEG20           4   Time Segment Bits 20
CBTR1.TSEG13           3   Time Segment Bits 13
CBTR1.TSEG12           2   Time Segment Bits 12
CBTR1.TSEG11           1   Time Segment Bits 11
CBTR1.TSEG10           0   Time Segment Bits 10
CRFLG                 0x0504     CAN Receiver Flag Register
CRFLG.WUPF             7   Wakeup Interrupt Flag
CRFLG.RWRNIF           6   Receiver Warning Interrupt Flag
CRFLG.TWRNIF           5   Transmitter Warning Interrupt Flag
CRFLG.RERRIF           4   Receiver Error Passive Interrupt Flag
CRFLG.TERRIF           3   Transmitter Error Passive Interrupt Flag
CRFLG.BOFFIF           2   Bus-Off Interrupt Flag
CRFLG.OVRIF            1   Overrun Interrupt Flag
CRFLG.RXF              0   Receive Buffer Full Flag
CRIER                 0x0505     CAN Receiver Interrupt Enable Register
CRIER.WUPIE            7   Wakeup Interrupt Enable Bit
CRIER.RWRNIE           6   Receiver Warning Interrupt Enable Bit
CRIER.TWRNIE           5   Transmitter Warning Interrupt Enable Bit
CRIER.RERRIE           4   Receiver Error Passive Interrupt Enable Bit
CRIER.TERRIE           3   Transmitter Error Passive Interrupt Enable Bit
CRIER.BOFFIE           2   Bus-Off Interrupt Enable Bit
CRIER.OVRIE            1   Overrun Interrupt Enable Bit
CRIER.RXFIE            0   Receiver Full Interrupt Enable Bit
CTFLG                 0x0506     CAN Transmitter Flag Register
CTFLG.ABTAK2           6   Abort Acknowledge Flag 2
CTFLG.ABTAK1           5   Abort Acknowledge Flag 1
CTFLG.ABTAK0           4   Abort Acknowledge Flag 0
CTFLG.TXE2             2   Transmitter Empty Flag 2
CTFLG.TXE1             1   Transmitter Empty Flag 1
CTFLG.TXE0             0   Transmitter Empty Flag 0
CTCR                  0x0507     CAN Transmitter Control Register
CTCR.ABTRQ2            6   Abort Request Flags 2
CTCR.ABTRQ1            5   Abort Request Flags 1
CTCR.ABTRQ0            4   Abort Request Flags 0
CTCR.TXEIE2            2   Transmitter Empty Interrupt Enable Bits 2
CTCR.TXEIE1            1   Transmitter Empty Interrupt Enable Bits 1
CTCR.TXEIE0            0   Transmitter Empty Interrupt Enable Bits 0
CIDAC                 0x0508     CAN Identifier Acceptance Control Register
CIDAC.IDAM1            5   Identifier Acceptance Mode Flags 1
CIDAC.IDAM0            4   Identifier Acceptance Mode Flags 0
CIDAC.IDHIT1           1   Identifier Acceptance Hit Indicator Flags 1
CIDAC.IDHIT0           0   Identifier Acceptance Hit Indicator Flags 0
Reserv0509            0x0509     RESERVED
Reserv050A            0x050A     RESERVED
Reserv050B            0x050B     RESERVED
Reserv050C            0x050C     RESERVED
Reserv050D            0x050D     RESERVED
CRXERR                0x050E     CAN Receiver Error Counter Register
CRXERR.RXERR7          7
CRXERR.RXERR6          6
CRXERR.RXERR5          5
CRXERR.RXERR4          4
CRXERR.RXERR3          3
CRXERR.RXERR2          2
CRXERR.RXERR1          1
CRXERR.RXERR0          0
CTXERR                0x050F     CAN Transmitter Error Counter Register
CTXERR.TXERR7          7
CTXERR.TXERR6          6
CTXERR.TXERR5          5
CTXERR.TXERR4          4
CTXERR.TXERR3          3
CTXERR.TXERR2          2
CTXERR.TXERR1          1
CTXERR.TXERR0          0
CIDAR0                0x0510     CAN Identifier Acceptance Register 0
CIDAR0.AC7             7   Acceptance Code Bits 7
CIDAR0.AC6             6   Acceptance Code Bits 6
CIDAR0.AC5             5   Acceptance Code Bits 5
CIDAR0.AC4             4   Acceptance Code Bits 4
CIDAR0.AC3             3   Acceptance Code Bits 3
CIDAR0.AC2             2   Acceptance Code Bits 2
CIDAR0.AC1             1   Acceptance Code Bits 1
CIDAR0.AC0             0   Acceptance Code Bits 0
CIDAR1                0x0511     CAN Identifier Acceptance Register 1
CIDAR1.AC7             7   Acceptance Code Bits 7
CIDAR1.AC6             6   Acceptance Code Bits 6
CIDAR1.AC5             5   Acceptance Code Bits 5
CIDAR1.AC4             4   Acceptance Code Bits 4
CIDAR1.AC3             3   Acceptance Code Bits 3
CIDAR1.AC2             2   Acceptance Code Bits 2
CIDAR1.AC1             1   Acceptance Code Bits 1
CIDAR1.AC0             0   Acceptance Code Bits 0
CIDAR2                0x0512     CAN Identifier Acceptance Register 2
CIDAR2.AC7             7   Acceptance Code Bits 7
CIDAR2.AC6             6   Acceptance Code Bits 6
CIDAR2.AC5             5   Acceptance Code Bits 5
CIDAR2.AC4             4   Acceptance Code Bits 4
CIDAR2.AC3             3   Acceptance Code Bits 3
CIDAR2.AC2             2   Acceptance Code Bits 2
CIDAR2.AC1             1   Acceptance Code Bits 1
CIDAR2.AC0             0   Acceptance Code Bits 0
CIDAR3                0x0513     CAN Identifier Acceptance Register 3
CIDAR3.AC7             7   Acceptance Code Bits 7
CIDAR3.AC6             6   Acceptance Code Bits 6
CIDAR3.AC5             5   Acceptance Code Bits 5
CIDAR3.AC4             4   Acceptance Code Bits 4
CIDAR3.AC3             3   Acceptance Code Bits 3
CIDAR3.AC2             2   Acceptance Code Bits 2
CIDAR3.AC1             1   Acceptance Code Bits 1
CIDAR3.AC0             0   Acceptance Code Bits 0
CIDMR0                0x0514     CAN Identifier Mask Register 0
CIDMR0.AM7             7   Acceptance Mask Bits 7
CIDMR0.AM6             6   Acceptance Mask Bits 6
CIDMR0.AM5             5   Acceptance Mask Bits 5
CIDMR0.AM4             4   Acceptance Mask Bits 4
CIDMR0.AM3             3   Acceptance Mask Bits 3
CIDMR0.AM2             2   Acceptance Mask Bits 2
CIDMR0.AM1             1   Acceptance Mask Bits 1
CIDMR0.AM0             0   Acceptance Mask Bits 0
CIDMR1                0x0515     CAN Identifier Mask Register 1
CIDMR1.AM7             7   Acceptance Mask Bits 7
CIDMR1.AM6             6   Acceptance Mask Bits 6
CIDMR1.AM5             5   Acceptance Mask Bits 5
CIDMR1.AM4             4   Acceptance Mask Bits 4
CIDMR1.AM3             3   Acceptance Mask Bits 3
CIDMR1.AM2             2   Acceptance Mask Bits 2
CIDMR1.AM1             1   Acceptance Mask Bits 1
CIDMR1.AM0             0   Acceptance Mask Bits 0
CIDMR0                0x0516     CAN Identifier Mask Register 0
CIDMR0.AM7             7   Acceptance Mask Bits 7
CIDMR0.AM6             6   Acceptance Mask Bits 6
CIDMR0.AM5             5   Acceptance Mask Bits 5
CIDMR0.AM4             4   Acceptance Mask Bits 4
CIDMR0.AM3             3   Acceptance Mask Bits 3
CIDMR0.AM2             2   Acceptance Mask Bits 2
CIDMR0.AM1             1   Acceptance Mask Bits 1
CIDMR0.AM0             0   Acceptance Mask Bits 0
CIDMR1                0x0517     CAN Identifier Mask Register 1
CIDMR1.AM7             7   Acceptance Mask Bits 7
CIDMR1.AM6             6   Acceptance Mask Bits 6
CIDMR1.AM5             5   Acceptance Mask Bits 5
CIDMR1.AM4             4   Acceptance Mask Bits 4
CIDMR1.AM3             3   Acceptance Mask Bits 3
CIDMR1.AM2             2   Acceptance Mask Bits 2
CIDMR1.AM1             1   Acceptance Mask Bits 1
CIDMR1.AM0             0   Acceptance Mask Bits 0
CRIDR0                0x0540     CAN Receive Identifier Register 0
CRIDR0.ID28            7
CRIDR0.ID27            6
CRIDR0.ID26            5
CRIDR0.ID25            4
CRIDR0.ID24            3
CRIDR0.ID23            2
CRIDR0.ID22            1
CRIDR0.ID21            0
CRIDR1                0x0541     CAN Receive Identifier Register 1
CRIDR1.ID20            7
CRIDR1.ID19            6
CRIDR1.ID18            5
CRIDR1.SRR             4   Substitute Remote Request Bit
CRIDR1.IDE             3   ID Extended Flag
CRIDR1.ID17            2
CRIDR1.ID16            1
CRIDR1.ID15            0
CRIDR2                0x0542     CAN Receive Identifier Register 2
CRIDR2.ID14            7
CRIDR2.ID13            6
CRIDR2.ID12            5
CRIDR2.ID11            4
CRIDR2.ID10            3
CRIDR2.ID9             2
CRIDR2.ID8             1
CRIDR2.ID7             0
CRIDR3                0x0543     CAN Receive Identifier Register 3
CRIDR3.ID6             7
CRIDR3.ID5             6
CRIDR3.ID4             5
CRIDR3.ID3             4
CRIDR3.ID2             3
CRIDR3.ID1             2
CRIDR3.ID0             1
CRIDR3.RTR             0   Remote Transmission Request Flag
CRDSR0                0x0544     CAN Receiver Data Segment Register 0
CRDSR0.DB7             7
CRDSR0.DB6             6
CRDSR0.DB5             5
CRDSR0.DB4             4
CRDSR0.DB3             3
CRDSR0.DB2             2
CRDSR0.DB1             1
CRDSR0.DB0             0
CRDSR1                0x0545     CAN Receiver Data Segment Register 1
CRDSR1.DB7             7
CRDSR1.DB6             6
CRDSR1.DB5             5
CRDSR1.DB4             4
CRDSR1.DB3             3
CRDSR1.DB2             2
CRDSR1.DB1             1
CRDSR1.DB0             0
CRDSR2                0x0546     CAN Receiver Data Segment Register 2
CRDSR2.DB7             7
CRDSR2.DB6             6
CRDSR2.DB5             5
CRDSR2.DB4             4
CRDSR2.DB3             3
CRDSR2.DB2             2
CRDSR2.DB1             1
CRDSR2.DB0             0
CRDSR3                0x0547     CAN Receiver Data Segment Register 3
CRDSR3.DB7             7
CRDSR3.DB6             6
CRDSR3.DB5             5
CRDSR3.DB4             4
CRDSR3.DB3             3
CRDSR3.DB2             2
CRDSR3.DB1             1
CRDSR3.DB0             0
CRDSR4                0x0548     CAN Receiver Data Segment Register 4
CRDSR4.DB7             7
CRDSR4.DB6             6
CRDSR4.DB5             5
CRDSR4.DB4             4
CRDSR4.DB3             3
CRDSR4.DB2             2
CRDSR4.DB1             1
CRDSR4.DB0             0
CRDSR5                0x0549     CAN Receiver Data Segment Register 5
CRDSR5.DB7             7
CRDSR5.DB6             6
CRDSR5.DB5             5
CRDSR5.DB4             4
CRDSR5.DB3             3
CRDSR5.DB2             2
CRDSR5.DB1             1
CRDSR5.DB0             0
CRDSR6                0x054A     CAN Receiver Data Segment Register 6
CRDSR6.DB7             7
CRDSR6.DB6             6
CRDSR6.DB5             5
CRDSR6.DB4             4
CRDSR6.DB3             3
CRDSR6.DB2             2
CRDSR6.DB1             1
CRDSR6.DB0             0
CRDSR7                0x054B     CAN Receiver Data Segment Register 7
CRDSR7.DB7             7
CRDSR7.DB6             6
CRDSR7.DB5             5
CRDSR7.DB4             4
CRDSR7.DB3             3
CRDSR7.DB2             2
CRDSR7.DB1             1
CRDSR7.DB0             0
CRDLR                 0x054C     CAN Receiver Data Length Register
CRDLR.DB7              7
CRDLR.DB6              6
CRDLR.DB5              5
CRDLR.DB4              4
CRDLR.DB3              3
CRDLR.DB2              2
CRDLR.DB1              1
CRDLR.DB0              0
Reserv054D            0x054D     RESERVED
Reserv054E            0x054E     RESERVED
Reserv054F            0x054F     RESERVED
CT0IDR0               0x0550     CAN Transmit 0 Identifier Register 0
CT0IDR0.ID28           7
CT0IDR0.ID27           6
CT0IDR0.ID26           5
CT0IDR0.ID25           4
CT0IDR0.ID24           3
CT0IDR0.ID23           2
CT0IDR0.ID22           1
CT0IDR0.ID21           0
CT0IDR1               0x0551     CAN Transmit 0 Identifier Register 1
CT0IDR1.ID20           7
CT0IDR1.ID19           6
CT0IDR1.ID18           5
CT0IDR1.SRR            4   Substitute Remote Request Bit
CT0IDR1.IDE            3   ID Extended Flag
CT0IDR1.ID17           2
CT0IDR1.ID16           1
CT0IDR1.ID15           0
CT0IDR2               0x0552     CAN Transmit 0 Identifier Register 2
CT0IDR2.ID14           7
CT0IDR2.ID13           6
CT0IDR2.ID12           5
CT0IDR2.ID11           4
CT0IDR2.ID10           3
CT0IDR2.ID9            2
CT0IDR2.ID8            1
CT0IDR2.ID7            0
CT0IDR3               0x0553     CAN Transmit 0 Identifier Register 3
CT0IDR3.ID6            7
CT0IDR3.ID5            6
CT0IDR3.ID4            5
CT0IDR3.ID3            4
CT0IDR3.ID2            3
CT0IDR3.ID1            2
CT0IDR3.ID0            1
CT0IDR3.RTR            0   Remote Transmission Request Flag
CT0DSR0               0x0554     CAN Transmit 0 Data Segment Register 0
CT0DSR0.DB7            7
CT0DSR0.DB6            6
CT0DSR0.DB5            5
CT0DSR0.DB4            4
CT0DSR0.DB3            3
CT0DSR0.DB2            2
CT0DSR0.DB1            1
CT0DSR0.DB0            0
CT0DSR1               0x0555     CAN Transmit 0 Data Segment Register 1
CT0DSR1.DB7            7
CT0DSR1.DB6            6
CT0DSR1.DB5            5
CT0DSR1.DB4            4
CT0DSR1.DB3            3
CT0DSR1.DB2            2
CT0DSR1.DB1            1
CT0DSR1.DB0            0
CT0DSR2               0x0556     CAN Transmit 0 Data Segment Register 2
CT0DSR2.DB7            7
CT0DSR2.DB6            6
CT0DSR2.DB5            5
CT0DSR2.DB4            4
CT0DSR2.DB3            3
CT0DSR2.DB2            2
CT0DSR2.DB1            1
CT0DSR2.DB0            0
CT0DSR3               0x0557     CAN Transmit 0 Data Segment Register 3
CT0DSR3.DB7            7
CT0DSR3.DB6            6
CT0DSR3.DB5            5
CT0DSR3.DB4            4
CT0DSR3.DB3            3
CT0DSR3.DB2            2
CT0DSR3.DB1            1
CT0DSR3.DB0            0
CT0DSR4               0x0558     CAN Transmit 0 Data Segment Register 4
CT0DSR4.DB7            7
CT0DSR4.DB6            6
CT0DSR4.DB5            5
CT0DSR4.DB4            4
CT0DSR4.DB3            3
CT0DSR4.DB2            2
CT0DSR4.DB1            1
CT0DSR4.DB0            0
CT0DSR5               0x0559     CAN Transmit 0 Data Segment Register 5
CT0DSR5.DB7            7
CT0DSR5.DB6            6
CT0DSR5.DB5            5
CT0DSR5.DB4            4
CT0DSR5.DB3            3
CT0DSR5.DB2            2
CT0DSR5.DB1            1
CT0DSR5.DB0            0
CT0DSR6               0x055A     CAN Transmit 0 Data Segment Register 6
CT0DSR6.DB7            7
CT0DSR6.DB6            6
CT0DSR6.DB5            5
CT0DSR6.DB4            4
CT0DSR6.DB3            3
CT0DSR6.DB2            2
CT0DSR6.DB1            1
CT0DSR6.DB0            0
CT0DSR7               0x055B     CAN Transmit 0 Data Segment Register 7
CT0DSR7.DB7            7
CT0DSR7.DB6            6
CT0DSR7.DB5            5
CT0DSR7.DB4            4
CT0DSR7.DB3            3
CT0DSR7.DB2            2
CT0DSR7.DB1            1
CT0DSR7.DB0            0
CT0DLR                0x055C     CAN Transmit 0 Data Length Register
CT0DLR.DB7             7
CT0DLR.DB6             6
CT0DLR.DB5             5
CT0DLR.DB4             4
CT0DLR.DB3             3
CT0DLR.DB2             2
CT0DLR.DB1             1
CT0DLR.DB0             0
CT0TBPR               0x055D     CAN Transmit 0 Buffer Priority Register
CT0TBPR.DB7            7
CT0TBPR.DB6            6
CT0TBPR.DB5            5
CT0TBPR.DB4            4
CT0TBPR.DB3            3
CT0TBPR.DB2            2
CT0TBPR.DB1            1
CT0TBPR.DB0            0
Reserv055E            0x055E     RESERVED
Reserv055F            0x055F     RESERVED
CT1IDR0               0x0560     CAN Transmit 1 Identifier Register 0
CT1IDR0.ID28           7
CT1IDR0.ID27           6
CT1IDR0.ID26           5
CT1IDR0.ID25           4
CT1IDR0.ID24           3
CT1IDR0.ID23           2
CT1IDR0.ID22           1
CT1IDR0.ID21           0
CT1IDR1               0x0561     CAN Transmit 1 Identifier Register 1
CT1IDR1.ID20           7
CT1IDR1.ID19           6
CT1IDR1.ID18           5
CT1IDR1.SRR            4   Substitute Remote Request Bit
CT1IDR1.IDE            3   ID Extended Flag
CT1IDR1.ID17           2
CT1IDR1.ID16           1
CT1IDR1.ID15           0
CT1IDR2               0x0562     CAN Transmit 1 Identifier Register 2
CT1IDR2.ID14           7
CT1IDR2.ID13           6
CT1IDR2.ID12           5
CT1IDR2.ID11           4
CT1IDR2.ID10           3
CT1IDR2.ID9            2
CT1IDR2.ID8            1
CT1IDR2.ID7            0
CT1IDR3               0x0563     CAN Transmit 1 Identifier Register 3
CT1IDR3.ID6            7
CT1IDR3.ID5            6
CT1IDR3.ID4            5
CT1IDR3.ID3            4
CT1IDR3.ID2            3
CT1IDR3.ID1            2
CT1IDR3.ID0            1
CT1IDR3.RTR            0   Remote Transmission Request Flag
CT1DSR0               0x0564     CAN Transmit 1 Data Segment Register 0
CT1DSR0.DB7            7
CT1DSR0.DB6            6
CT1DSR0.DB5            5
CT1DSR0.DB4            4
CT1DSR0.DB3            3
CT1DSR0.DB2            2
CT1DSR0.DB1            1
CT1DSR0.DB0            0
CT1DSR1               0x0565     CAN Transmit 1 Data Segment Register 1
CT1DSR1.DB7            7
CT1DSR1.DB6            6
CT1DSR1.DB5            5
CT1DSR1.DB4            4
CT1DSR1.DB3            3
CT1DSR1.DB2            2
CT1DSR1.DB1            1
CT1DSR1.DB0            0
CT1DSR2               0x0566     CAN Transmit 1 Data Segment Register 2
CT1DSR2.DB7            7
CT1DSR2.DB6            6
CT1DSR2.DB5            5
CT1DSR2.DB4            4
CT1DSR2.DB3            3
CT1DSR2.DB2            2
CT1DSR2.DB1            1
CT1DSR2.DB0            0
CT1DSR3               0x0567     CAN Transmit 1 Data Segment Register 3
CT1DSR3.DB7            7
CT1DSR3.DB6            6
CT1DSR3.DB5            5
CT1DSR3.DB4            4
CT1DSR3.DB3            3
CT1DSR3.DB2            2
CT1DSR3.DB1            1
CT1DSR3.DB0            0
CT1DSR4               0x0568     CAN Transmit 1 Data Segment Register 4
CT1DSR4.DB7            7
CT1DSR4.DB6            6
CT1DSR4.DB5            5
CT1DSR4.DB4            4
CT1DSR4.DB3            3
CT1DSR4.DB2            2
CT1DSR4.DB1            1
CT1DSR4.DB0            0
CT1DSR5               0x0569     CAN Transmit 1 Data Segment Register 5
CT1DSR5.DB7            7
CT1DSR5.DB6            6
CT1DSR5.DB5            5
CT1DSR5.DB4            4
CT1DSR5.DB3            3
CT1DSR5.DB2            2
CT1DSR5.DB1            1
CT1DSR5.DB0            0
CT1DSR6               0x056A     CAN Transmit 1 Data Segment Register 6
CT1DSR6.DB7            7
CT1DSR6.DB6            6
CT1DSR6.DB5            5
CT1DSR6.DB4            4
CT1DSR6.DB3            3
CT1DSR6.DB2            2
CT1DSR6.DB1            1
CT1DSR6.DB0            0
CT1DSR7               0x056B     CAN Transmit 1 Data Segment Register 7
CT1DSR7.DB7            7
CT1DSR7.DB6            6
CT1DSR7.DB5            5
CT1DSR7.DB4            4
CT1DSR7.DB3            3
CT1DSR7.DB2            2
CT1DSR7.DB1            1
CT1DSR7.DB0            0
CT1DLR                0x056C     CAN Transmit 1 Data Length Register
CT1DLR.DB7             7
CT1DLR.DB6             6
CT1DLR.DB5             5
CT1DLR.DB4             4
CT1DLR.DB3             3
CT1DLR.DB2             2
CT1DLR.DB1             1
CT1DLR.DB0             0
CT1TBPR               0x056D     CAN Transmit 1 Buffer Priority Register
CT1TBPR.DB7            7
CT1TBPR.DB6            6
CT1TBPR.DB5            5
CT1TBPR.DB4            4
CT1TBPR.DB3            3
CT1TBPR.DB2            2
CT1TBPR.DB1            1
CT1TBPR.DB0            0
Reserv056E            0x056E     RESERVED
Reserv056F            0x056F     RESERVED
CT2IDR0               0x0570     CAN Transmit 2 Identifier Register 0
CT2IDR0.ID28           7
CT2IDR0.ID27           6
CT2IDR0.ID26           5
CT2IDR0.ID25           4
CT2IDR0.ID24           3
CT2IDR0.ID23           2
CT2IDR0.ID22           1
CT2IDR0.ID21           0
CT2IDR1               0x0571     CAN Transmit 2 Identifier Register 1
CT2IDR1.ID20           7
CT2IDR1.ID19           6
CT2IDR1.ID18           5
CT2IDR1.SRR            4   Substitute Remote Request Bit
CT2IDR1.IDE            3   ID Extended Flag
CT2IDR1.ID17           2
CT2IDR1.ID16           1
CT2IDR1.ID15           0
CT2IDR2               0x0572     CAN Transmit 2 Identifier Register 2
CT2IDR2.ID14           7
CT2IDR2.ID13           6
CT2IDR2.ID12           5
CT2IDR2.ID11           4
CT2IDR2.ID10           3
CT2IDR2.ID9            2
CT2IDR2.ID8            1
CT2IDR2.ID7            0
CT2IDR3               0x0573     CAN Transmit 2 Identifier Register 3
CT2IDR3.ID6            7
CT2IDR3.ID5            6
CT2IDR3.ID4            5
CT2IDR3.ID3            4
CT2IDR3.ID2            3
CT2IDR3.ID1            2
CT2IDR3.ID0            1
CT2IDR3.RTR            0   Remote Transmission Request Flag
CT2DSR0               0x0574     CAN Transmit 2 Data Segment Register 0
CT2DSR0.DB7            7
CT2DSR0.DB6            6
CT2DSR0.DB5            5
CT2DSR0.DB4            4
CT2DSR0.DB3            3
CT2DSR0.DB2            2
CT2DSR0.DB1            1
CT2DSR0.DB0            0
CT2DSR1               0x0575     CAN Transmit 2 Data Segment Register 1
CT2DSR1.DB7            7
CT2DSR1.DB6            6
CT2DSR1.DB5            5
CT2DSR1.DB4            4
CT2DSR1.DB3            3
CT2DSR1.DB2            2
CT2DSR1.DB1            1
CT2DSR1.DB0            0
CT2DSR2               0x0576     CAN Transmit 2 Data Segment Register 2
CT2DSR2.DB7            7
CT2DSR2.DB6            6
CT2DSR2.DB5            5
CT2DSR2.DB4            4
CT2DSR2.DB3            3
CT2DSR2.DB2            2
CT2DSR2.DB1            1
CT2DSR2.DB0            0
CT2DSR3               0x0577     CAN Transmit 2 Data Segment Register 3
CT2DSR3.DB7            7
CT2DSR3.DB6            6
CT2DSR3.DB5            5
CT2DSR3.DB4            4
CT2DSR3.DB3            3
CT2DSR3.DB2            2
CT2DSR3.DB1            1
CT2DSR3.DB0            0
CT2DSR4               0x0578     CAN Transmit 2 Data Segment Register 4
CT2DSR4.DB7            7
CT2DSR4.DB6            6
CT2DSR4.DB5            5
CT2DSR4.DB4            4
CT2DSR4.DB3            3
CT2DSR4.DB2            2
CT2DSR4.DB1            1
CT2DSR4.DB0            0
CT2DSR5               0x0579     CAN Transmit 2 Data Segment Register 5
CT2DSR5.DB7            7
CT2DSR5.DB6            6
CT2DSR5.DB5            5
CT2DSR5.DB4            4
CT2DSR5.DB3            3
CT2DSR5.DB2            2
CT2DSR5.DB1            1
CT2DSR5.DB0            0
CT2DSR6               0x057A     CAN Transmit 2 Data Segment Register 6
CT2DSR6.DB7            7
CT2DSR6.DB6            6
CT2DSR6.DB5            5
CT2DSR6.DB4            4
CT2DSR6.DB3            3
CT2DSR6.DB2            2
CT2DSR6.DB1            1
CT2DSR6.DB0            0
CT2DSR7               0x057B     CAN Transmit 2 Data Segment Register 7
CT2DSR7.DB7            7
CT2DSR7.DB6            6
CT2DSR7.DB5            5
CT2DSR7.DB4            4
CT2DSR7.DB3            3
CT2DSR7.DB2            2
CT2DSR7.DB1            1
CT2DSR7.DB0            0
CT2DLR                0x057C     CAN Transmit 2 Data Length Register
CT2DLR.DB7             7
CT2DLR.DB6             6
CT2DLR.DB5             5
CT2DLR.DB4             4
CT2DLR.DB3             3
CT2DLR.DB2             2
CT2DLR.DB1             1
CT2DLR.DB0             0
CT2TBPR               0x057D     CAN Transmit 2 Buffer Priority Register
CT2TBPR.DB7            7
CT2TBPR.DB6            6
CT2TBPR.DB5            5
CT2TBPR.DB4            4
CT2TBPR.DB3            3
CT2TBPR.DB2            2
CT2TBPR.DB1            1
CT2TBPR.DB0            0
Reserv057E            0x057E     RESERVED
Reserv057F            0x057F     RESERVED
SBSR                  0xFE00     SIM Break Status Register
SBSR.SBSW              1   SIM Break Stop/Wait Bit
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Bit
SRSR.PIN               6   External Reset Bit
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit (opcode fetches only)
SRSR.EDC               2   Illegal Address Reset Bit (opcode fetches only)
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
ReservFE04            0xFE04     RESERVED
ReservFE05            0xFE05     RESERVED
ReservFE06            0xFE06     RESERVED
ReservFE07            0xFE07     RESERVED
EDCR                  0xFE09     EDC Control Register
EDCR.SFLTB             7   Set FLT Pin
EDCR.FDB               2   Force Data Bus Bit
EDCR.FABH              1   Force Address Bus High Bit
EDCR.FABL              0   Force Address Bus Low Bit
BRKH                  0xFE0C     Break Address Register High
BRKL                  0xFE0D     Break Address Register Low
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
LVISR                 0xFE0F     LVI Status Register
LVISR.LVIOUT           7   LVI Output Bit
EENVR                 0xFE1C     EEPROM Non-Volatile Register
EENVR.EERA             7   EEPROM Redundant Array Bit
EENVR.EEBP3            3   EEPROM Block Protection Bits 3
EENVR.EEBP2            2   EEPROM Block Protection Bits 2
EENVR.EEBP1            1   EEPROM Block Protection Bits 1
EENVR.EEBP0            0   EEPROM Block Protection Bits 0
EECR                  0xFE1D     EEPROM Control Register
EECR.EEBCLK            7   EEPROM Bus Clock Enable Bit
EECR.EEOFF             5   EEPROM Power Down Bit
EECR.EERAS1            4   EEPROM Erase Bits 1
EECR.EERAS0            3   EEPROM Erase Bits 0
EECR.EELAT             2   EEPROM Latch Control Bit
EECR.EEPGM             0   EEPROM Program/Erase Enable Bit
ReservFE1E            0xFE1E     RESERVED
EEACR                 0xFE1F     EEPROM Array Control Register
EEACR.EERA             7   EEPROM Redundant Array Bit
EEACR.EEBP3            3   EEPROM Block Protection Bits 3
EEACR.EEBP2            2   EEPROM Block Protection Bits 2
EEACR.EEBP1            1   EEPROM Block Protection Bits 1
EEACR.EEBP0            0   EEPROM Block Protection Bits 0
ReservFF80            0xFF80     RESERVED
COPCTL                0xFFFF     COP Control Register


.68HC08RC16
; MC68HC08RC16/D     http://e-www.motorola.com/brdata/PDFDB/docs/MC68HC08RC16.pdf
; MC68HC08RC16.pdf

; RAM=352  
; ROM=16384
; EPROM=0
; EEPROM=0


; MEMORY MAP
area DATA FSR		  0x0000:0x0020
area DATA RAM		  0x0020:0x0180
area BSS  UNIMPLEMENTED	  0x0180:0xBE00
area DATA ROM		  0xBE00:0xFE00
area DATA FSR_1		  0xFE00:0xFE10
area DATA MONITOR_ROM	  0xFE10:0xFF00
area BSS  UNIMPLEMENTED	  0xFF00:0xFFF4
area DATA USER_VEC	  0xFFF4:0x10000


; Interrupt and reset vector assignments
interrupt __RESET     0xFFFE       Reset vector
interrupt SWI         0xFFFC       SWI vector
interrupt IRQ1        0xFFFA       IRQ1 vector
interrupt CMT         0xFFF8       CMT vector
interrupt TIM         0xFFF6       TIM overflow vector
interrupt KBRD        0xFFF4       Keyboard vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bit 7
PTA.PTA6               6   Port A Data Bit 6
PTA.PTA5               5   Port A Data Bit 5
PTA.PTA4               4   Port A Data Bit 4
PTA.PTA3               3   Port A Data Bit 3
PTA.PTA2               2   Port A Data Bit 2
PTA.PTA1               1   Port A Data Bit 1
PTA.PTA0               0   Port A Data Bit 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bit 7
PTB.PTB6               6   Port B Data Bit 6
PTB.PTB5               5   Port B Data Bit 5
PTB.PTB4               4   Port B Data Bit 4
PTB.PTB3               3   Port B Data Bit 3
PTB.PTB2               2   Port B Data Bit 2
PTB.PTB1               1   Port B Data Bit 1
PTB.PTB0               0   Port B Data Bit 0
PTC                   0x0002     Port C Data Register
PTC.PTC3               3   Port C Data Bit 3
PTC.PTC2               2   Port C Data Bit 2
PTC.PTC1               1   Port C Data Bit 1
PTC.PTC0               0   Port C Data Bit 0
UNUSED0003            0x0003     UNUSED
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bit 7
DDRA.DDRA6             6   Data Direction Register A Bit 6
DDRA.DDRA5             5   Data Direction Register A Bit 5
DDRA.DDRA4             4   Data Direction Register A Bit 4
DDRA.DDRA3             3   Data Direction Register A Bit 3
DDRA.DDRA2             2   Data Direction Register A Bit 2
DDRA.DDRA1             1   Data Direction Register A Bit 1
DDRA.DDRA0             0   Data Direction Register A Bit 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bit 7
DDRB.DDRB6             6   Data Direction Register B Bit 6
DDRB.DDRB5             5   Data Direction Register B Bit 5
DDRB.DDRB4             4   Data Direction Register B Bit 4
DDRB.DDRB3             3   Data Direction Register B Bit 3
DDRB.DDRB2             2   Data Direction Register B Bit 2
DDRB.DDRB1             1   Data Direction Register B Bit 1
DDRB.DDRB0             0   Data Direction Register B Bit 0
DDRC                  0x0006     Data Direction Register C
DDRC.DDRC3             3   Data Direction Register C Bit 3
DDRC.DDRC2             2   Data Direction Register C Bit 2
DDRC.DDRC1             1   Data Direction Register C Bit 1
DDRC.DDRC0             0   Data Direction Register C Bit 0
UNUSED0007            0x0007     UNUSED
UNUSED0008            0x0008     UNUSED
UNUSED0009            0x0009     UNUSED
UNUSED000A            0x000A     UNUSED
UNUSED000B            0x000B     UNUSED
UNUSED000C            0x000C     UNUSED
KBSCR                 0x000D     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
KBIER                 0x000E     Keyboard Interrupt Enable Register
KBIER.KBIE7            7   Keyboard Interrupt Enable Bits 7
KBIER.KBIE6            6   Keyboard Interrupt Enable Bits 6
KBIER.KBIE5            5   Keyboard Interrupt Enable Bits 5
KBIER.KBIE4            4   Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Keyboard Interrupt Enable Bits 0
ISCR                  0x000F     IRQ Status and Control Register
ISCR.IRQF1             3   IRQ1 Flag
ISCR.ACK1              2   IRQ1 Interrupt Request Acknowledge Bit
ISCR.IMASK1            1   IRQ1 Interrupt Mask Bit
ISCR.MODE1             0   IRQ1 Edge/Level Select Bit
CCH1                  0x0010     CMT Carrier Generator High Data Register 1
CCH1.IROLN             7   IRO Latch Control Bit
CCH1.CMTPOL            6   CMT Output Polarity Bit
CCH1.PH5               5   Primary Carrier High Time Data Values 5
CCH1.PH4               4   Primary Carrier High Time Data Values 4
CCH1.PH3               3   Primary Carrier High Time Data Values 3
CCH1.PH2               2   Primary Carrier High Time Data Values 2
CCH1.PH1               1   Primary Carrier High Time Data Values 1
CCH1.PH0               0   Primary Carrier High Time Data Values 0
CCL1                  0x0011     CMT Carrier Generator Low Data Register 1
CCL1.IROLP             7   IRO Latch Control Bit
CCL1.PL5               5   Primary Carrier Low Time Data Values 5
CCL1.PL4               4   Primary Carrier Low Time Data Values 4
CCL1.PL3               3   Primary Carrier Low Time Data Values 3
CCL1.PL2               2   Primary Carrier Low Time Data Values 2
CCL1.PL1               1   Primary Carrier Low Time Data Values 1
CCL1.PL0               0   Primary Carrier Low Time Data Values 0
CCH2                  0x0012     CMT Carrier Generator High Data Register 2
CCH2.SH5               5   Secondary Carrier High Time Data Values 5
CCH2.SH4               4   Secondary Carrier High Time Data Values 4
CCH2.SH3               3   Secondary Carrier High Time Data Values 3
CCH2.SH2               2   Secondary Carrier High Time Data Values 2
CCH2.SH1               1   Secondary Carrier High Time Data Values 1
CCH2.SH0               0   Secondary Carrier High Time Data Values 0
CCL2                  0x0013     CMT Carrier Generator Low Data Register 2
CCL2.SL5               5   Secondary Carrier Low Time Data Values 5
CCL2.SL4               4   Secondary Carrier Low Time Data Values 4
CCL2.SL3               3   Secondary Carrier Low Time Data Values 3
CCL2.SL2               2   Secondary Carrier Low Time Data Values 2
CCL2.SL1               1   Secondary Carrier Low Time Data Values 1
CCL2.SL0               0   Secondary Carrier Low Time Data Values 0
CMCS                  0x0014     CMT Modulator Control and Status Register
CMCS.EOCF              7   End-of-Cycle Status Flag
CMCS.DIV2              6   Divide-by-Two Prescaler Bit
CMCS.EXSPC             4   Extended Space Enable Bit
CMCS.BASE              3   Baseband Enable Bit
CMCS.MODE              2   Mode Select Bit
CMCS.EOCIE             1   End-of-Cycle Interrupt Enable Bit
CMCS.MCGEN             0   Modulator and Carrier Generator Enable Bit
CMD1                  0x0015     CMT Modulator Data Register 1
CMD1.MB11              7
CMD1.MB10              6
CMD1.MB9               5
CMD1.MB8               4
CMD1.SB11              3
CMD1.SB10              2
CMD1.SB9               1
CMD1.SB8               0
CMD2                  0x0016     CMT Modulator Data Register 2
CMD2.MB7               7
CMD2.MB6               6
CMD2.MB5               5
CMD2.MB4               4
CMD2.MB3               3
CMD2.MB2               2
CMD2.MB1               1
CMD2.MB0               0
CMD3                  0x0017     CMT Modulator Data Register 3
CMD3.SB7               7
CMD3.SB6               6
CMD3.SB5               5
CMD3.SB4               4
CMD3.SB3               3
CMD3.SB2               2
CMD3.SB1               1
CMD3.SB0               0
TSC                   0x0018     TIM0I Status and Control Register
TSC.TOF                7   TIM0I Overflow Flag Bit
TSC.TOIE               6   TIM0I Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM0I Stop Bit
TSC.TRST               4   TIM0I Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
TCNTH                 0x0019     TIM0I Counter Register High
TCNTL                 0x001A     TIM0I Counter Register Low
TMODH                 0x001B     TIM0I Counter Modulo Register High
TMODL                 0x001C     TIM0I Counter Modulo Register Low
LVISR                 0x001D     LVI Status Register
LVISR.LOWV             5   LVI Low Indicator Bit
UNUSED001E            0x001E     UNUSED
MOR                   0x001F     Mask Option Register
MOR.ROMSEC             4   ROM Security Bit
MOR.SSREC              3   Short Stop Recovery Bit
MOR.COPRS              2   COP Rate Select Bit
MOR.STOP               1   STOP Instruction Enable Bit
MOR.COPD               0   COP Disable Bit
BSR                   0xFE00     Break Status Register
BSR.BW_Note            1   Break Wait Bit
RSR                   0xFE01     Reset Status Register
RSR.POR                7   Power-On Reset Flag
RSR.PIN                6   External Reset Flag
RSR.COP                5   Computer Operating Properly Reset Bit
RSR.ILOP               4   Illegal Opcode Reset Bit
RSR.ILAD               3   Illegal Address Reset Bit
RSR.LPRST              1   Low-Power Mode Reset Bit
UNUSEDFE02            0xFE02     UNUSED
BFCR                  0xFE03     Break Flag Control Register
BFCR.BCFE              7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF6               7   Interrupt Flags 6
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF2               3   Interrupt Flags 2
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flags 14
INT2.IF13              6   Interrupt Flags 13
INT2.IF12              5   Interrupt Flags 12
INT2.IF11              4   Interrupt Flags 11
INT2.IF10              3   Interrupt Flags 10
INT2.IF9               2   Interrupt Flags 9
INT2.IF8               1   Interrupt Flags 8
INT2.IF7               0   Interrupt Flags 7
ReservFE06            0xFE06     RESERVED
UNUSEDFE07            0xFE07     UNUSED
ReservFE08            0xFE08     RESERVED
UNUSEDFE09            0xFE09     UNUSED
UNUSEDFE0A            0xFE0A     UNUSED
UNUSEDFE0B            0xFE0B     UNUSED
BRKH                  0xFE0C     Break Address Register High
BRKL                  0xFE0D     Break Address Register Low
BSCR                  0xFE0E     Break Status and Control Register
BSCR.BRKE              7   Break Enable Bit
BSCR.BRKA              6   Break Active Bit
COPCTL                0xFFFF     COP Control Register


.68HC708KH12
; MC68HC08KH12/H  http://
; MC68HC08KH12.pdf


; MEMORY MAP
area DATA FSR               0x0000:0x0060
area DATA RAM               0x0060:0x01E0
area BSS  UNIMPLEMENTED     0x01E0:0xD000
area DATA OTPROM            0xD000:0xFE00
area DATA FSR_1             0xFE00:0xFE10
area DATA MONITOR_ROM       0xFE10:0xFF00
area BSS  UNIMPLEMENTED     0xFF00:0xFFE6
area DATA USER_VEC          0xFFE6:0x10000


; Interrupt and reset vector assignments
interrupt __RESET        0xFFFE       Reset Vector
interrupt SWI            0xFFFC       SWI Vector
interrupt IRQ1           0xFFFA       IRQ1 Vector
interrupt USB_SIE_T      0xFFF8       USB SIE Timing Interrupt Vector
interrupt USB_HUB_E      0xFFF6       USB HUB Endpoint Interrupt Vector
interrupt USB_DEV        0xFFF4       USB Device Endpoint Interrupt Vector
interrupt TIM_CH0        0xFFF2       TIM Channel 0 Vector
interrupt TIM_CH1        0xFFF0       TIM Channel 1 Vector
interrupt TIM            0xFFEE       TIM Overflow Vector
interrupt Port_E         0xFFEC       Port-E Keyboard Vector
interrupt Port_D         0xFFEA       Port-D Keyboard Vector
interrupt Port_F         0xFFE8       Port-F Keyboard Vector
interrupt PLL            0xFFE6       PLL Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bit 7
PTA.PTA6               6   Port A Data Bit 6
PTA.PTA5               5   Port A Data Bit 5
PTA.PTA4               4   Port A Data Bit 4
PTA.PTA3               3   Port A Data Bit 3
PTA.PTA2               2   Port A Data Bit 2
PTA.PTA1               1   Port A Data Bit 1
PTA.PTA0               0   Port A Data Bit 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bit 7
PTB.PTB6               6   Port B Data Bit 6
PTB.PTB5               5   Port B Data Bit 5
PTB.PTB4               4   Port B Data Bit 4
PTB.PTB3               3   Port B Data Bit 3
PTB.PTB2               2   Port B Data Bit 2
PTB.PTB1               1   Port B Data Bit 1
PTB.PTB0               0   Port B Data Bit 0
PTC                   0x0002     Port C Data Register
PTC.PTC4               4   Port C Data Bit 4
PTC.PTC3               3   Port C Data Bit 3
PTC.PTC2               2   Port C Data Bit 2
PTC.PTC1               1   Port C Data Bit 1
PTC.PTC0               0   Port C Data Bit 0
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bit 7
PTD.PTD6               6   Port D Data Bit 6
PTD.PTD5               5   Port D Data Bit 5
PTD.PTD4               4   Port D Data Bit 4
PTD.PTD3               3   Port D Data Bit 3
PTD.PTD2               2   Port D Data Bit 2
PTD.PTD1               1   Port D Data Bit 1
PTD.PTD0               0   Port D Data Bit 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bit 7
DDRA.DDRA6             6   Data Direction Register A Bit 6
DDRA.DDRA5             5   Data Direction Register A Bit 5
DDRA.DDRA4             4   Data Direction Register A Bit 4
DDRA.DDRA3             3   Data Direction Register A Bit 3
DDRA.DDRA2             2   Data Direction Register A Bit 2
DDRA.DDRA1             1   Data Direction Register A Bit 1
DDRA.DDRA0             0   Data Direction Register A Bit 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bit 7
DDRB.DDRB6             6   Data Direction Register B Bit 6
DDRB.DDRB5             5   Data Direction Register B Bit 5
DDRB.DDRB4             4   Data Direction Register B Bit 4
DDRB.DDRB3             3   Data Direction Register B Bit 3
DDRB.DDRB2             2   Data Direction Register B Bit 2
DDRB.DDRB1             1   Data Direction Register B Bit 1
DDRB.DDRB0             0   Data Direction Register B Bit 0
DDRC                  0x0006     Data Direction Register C
DDRC.DDRC4             4   Data Direction Register C Bit 4
DDRC.DDRC3             3   Data Direction Register C Bit 3
DDRC.DDRC2             2   Data Direction Register C Bit 2
DDRC.DDRC1             1   Data Direction Register C Bit 1
DDRC.DDRC0             0   Data Direction Register C Bit 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bit 7
DDRD.DDRD6             6   Data Direction Register D Bit 6
DDRD.DDRD5             5   Data Direction Register D Bit 5
DDRD.DDRD4             4   Data Direction Register D Bit 4
DDRD.DDRD3             3   Data Direction Register D Bit 3
DDRD.DDRD2             2   Data Direction Register D Bit 2
DDRD.DDRD1             1   Data Direction Register D Bit 1
DDRD.DDRD0             0   Data Direction Register D Bit 0
PTE                   0x0008     Port E Data Register
PTE.PTE4               4   Port E Data Bit 4
PTE.PTE3               3   Port E Data Bit 3
PTE.PTE2               2   Port E Data Bit 2
PTE.PTE1               1   Port E Data Bit 1
PTE.PTE0               0   Port E Data Bit 0
PTF                   0x0009     Port F Data Register
PTF.PTF7               7   Port F Data Bit 7
PTF.PTF6               6   Port F Data Bit 6
PTF.PTF5               5   Port F Data Bit 5
PTF.PTF4               4   Port F Data Bit 4
PTF.PTF3               3   Port F Data Bit 3
PTF.PTF2               2   Port F Data Bit 2
PTF.PTF1               1   Port F Data Bit 1
PTF.PTF0               0   Port F Data Bit 0
DDRE                  0x000A     Data Direction Register E
DDRE.DDRE4             4   Data Direction Register E Bit 4
DDRE.DDRE3             3   Data Direction Register E Bit 3
DDRE.DDRE2             2   Data Direction Register E Bit 2
DDRE.DDRE1             1   Data Direction Register E Bit 1
DDRE.DDRE0             0   Data Direction Register E Bit 0
DDRF                  0x000B     Data Direction Register F
DDRF.DDRF7             7   Data Direction Register F Bit 7
DDRF.DDRF6             6   Data Direction Register F Bit 6
DDRF.DDRF5             5   Data Direction Register F Bit 5
DDRF.DDRF4             4   Data Direction Register F Bit 4
DDRF.DDRF3             3   Data Direction Register F Bit 3
DDRF.DDRF2             2   Data Direction Register F Bit 2
DDRF.DDRF1             1   Data Direction Register F Bit 1
DDRF.DDRF0             0   Data Direction Register F Bit 0
KBDSCR                0x000C     Port D Keyboard Status and Control Register
KBDSCR.KEYDF           3   Port-D Keyboard Flag Bit
KBDSCR.ACKD            2   Port-D Keyboard Acknowledge Bit
KBDSCR.IMASKD          1   Port-D Keyboard Interrupt Mask Bit
KBDSCR.MODED           0   Port-D Keyboard Triggering Sensitivity Bit
KBDIER                0x000D     Port D Keyboard Interrupt Enable Register
KBDIER.KBDIE7          7   Port-D Keyboard Interrupt Enable Bits 7
KBDIER.KBDIE6          6   Port-D Keyboard Interrupt Enable Bits 6
KBDIER.KBDIE5          5   Port-D Keyboard Interrupt Enable Bits 5
KBDIER.KBDIE4          4   Port-D Keyboard Interrupt Enable Bits 4
KBDIER.KBDIE3          3   Port-D Keyboard Interrupt Enable Bits 3
KBDIER.KBDIE2          2   Port-D Keyboard Interrupt Enable Bits 2
KBDIER.KBDIE1          1   Port-D Keyboard Interrupt Enable Bits 1
KBDIER.KBDIE0          0   Port-D Keyboard Interrupt Enable Bits 0
KBESCR                0x000E     Port E Keyboard Status and Control Register
KBESCR.KEYEF           3   Port-E Keyboard Flag Bit
KBESCR.ACKE            2   Port-E Keyboard Acknowledge Bit
KBESCR.IMASKE          1   Port-E Keyboard Interrupt Mask Bit
KBESCR.MODEE           0   Port-E Keyboard Triggering Sensitivity Bit
KBEIER                0x000F     Port E Keyboard Interrupt Enable Register
KBEIER.PEPE3           7   Port-E Pull-up Enable Bits 3
KBEIER.PEPE2           6   Port-E Pull-up Enable Bits 2
KBEIER.PEPE1           5   Port-E Pull-up Enable Bits 1
KBEIER.PEPE0           4   Port-E Pull-up Enable Bits 0
KBEIER.KBEIE3          3   Port-E Keyboard Interrupt Enable Bits 3
KBEIER.KBEIE2          2   Port-E Keyboard Interrupt Enable Bits 2
KBEIER.KBEIE1          1   Port-E Keyboard Interrupt Enable Bits 1
KBEIER.KBEIE0          0   Port-E Keyboard Interrupt Enable Bits 0
TSC                   0x0010     TIM Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
UNUSED0011            0x0011     UNUSED
TCNTH                 0x0012     TIM Counter Register High
TCNTL                 0x0013     TIM Counter Register Low
TMODH                 0x0014     TIM Counter Modulo Register High
TMODL                 0x0015     TIM Counter Modulo Register Low
TSC0                  0x0016     TIM Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit
TSC0.MS0B              5   Mode Select Bit B
TSC0.MS0A              4   Mode Select Bit B
TSC0.ELS0B             3   Edge/Level Select Bits
TSC0.ELS0A             2   Edge/Level Select Bits
TSC0.TOV0              1   Toggle-On-Overflow Bit
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0017     TIM Channel 0 Register High
TCH0L                 0x0018     TIM Channel 0 Register Low
TSC1                  0x0019     TIM Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 0 Flag Bit            
TSC1.CH1IE             6   Channel 0 Interrupt Enable Bit
TSC1.MS1A              4   Mode Select Bit B               
TSC1.ELS1B             3   Edge/Level Select Bits          
TSC1.ELS1A             2   Edge/Level Select Bits          
TSC1.TOV1              1   Toggle-On-Overflow Bit          
TSC1.CH1MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH1H                 0x001A     TIM Channel 1 Register High
TCH1L                 0x001B     TIM Channel 1 Register Low
EOIER                 0x001C     PORT E Optical Interface Enable Register
EOIER.YREF2            7   Reference Voltage Selection Y 2
EOIER.YREF1            6   Reference Voltage Selection Y 1
EOIER.YREF0            5   Reference Voltage Selection Y 0
EOIER.XREF2            4   Reference Voltage Selection X 2
EOIER.XREF1            3   Reference Voltage Selection X 1
EOIER.XREF0            2   Reference Voltage Selection X 0
EOIER.OIEY             1   Optical Interface Enable Y
EOIER.OIEX             0   Optical Interface Enable X
POC                   0x001D     Port Option Control Register
POC.LDD                5   LED Direct Drive Control
POC.PCP                2   Port C Pullup Enable
POC.PBP                1   Port B Pullup Enable
POC.PAP                0   Port A Pullup Enable
ISCR                  0x001E     IRQ Status and Control Register
ISCR.IRQF1             3   IRQ1 Flag
ISCR.ACK1              2   IRQ1 Interrupt Request Acknowledge Bit
ISCR.IMASK1            1   IRQ1 Interrupt Mask Bit
ISCR.MODE1             0   IRQ1 Edge/Level Select Bit
CONFIG                0x001F     Configuration Register
CONFIG.SSREC           3   Short stop recovery bit
CONFIG.COPRS           2   COP reset period selection bit
CONFIG.STOP            1   STOP instruction enable bit
CONFIG.COPD            0   COP disable bit
DE0D0                 0x0020     USB Embedded Device Endpoint 0 Data Register 0
DE0D0.DE0R07_DE0T07    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D0.DE0R06_DE0T06    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D0.DE0R05_DE0T05    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D0.DE0R04_DE0T04    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D0.DE0R03_DE0T03    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D0.DE0R02_DE0T02    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D0.DE0R01_DE0T01    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D0.DE0R00_DE0T00    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE0D1                 0x0021     USB Embedded Device Endpoint 0 Data Register 1
DE0D1.DE0R17_DE0T17    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D1.DE0R16_DE0T16    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D1.DE0R15_DE0T15    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D1.DE0R14_DE0T14    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D1.DE0R13_DE0T13    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D1.DE0R12_DE0T12    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D1.DE0R11_DE0T11    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D1.DE0R10_DE0T10    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE0D2                 0x0022     USB Embedded Device Endpoint 0 Data Register 2
DE0D2.DE0R27_DE0T27    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D2.DE0R26_DE0T26    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D2.DE0R25_DE0T25    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D2.DE0R24_DE0T24    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D2.DE0R23_DE0T23    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D2.DE0R22_DE0T22    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D2.DE0R21_DE0T21    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D2.DE0R20_DE0T20    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE0D3                 0x0023     USB Embedded Device Endpoint 0 Data Register 3
DE0D3.DE0R37_DE0T37    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D3.DE0R36_DE0T36    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D3.DE0R35_DE0T35    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D3.DE0R34_DE0T34    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D3.DE0R33_DE0T33    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D3.DE0R32_DE0T32    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D3.DE0R31_DE0T31    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D3.DE0R30_DE0T30    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE0D4                 0x0024     USB Embedded Device Endpoint 0 Data Register 4
DE0D4.DE0R47_DE0T47    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D4.DE0R46_DE0T46    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D4.DE0R45_DE0T45    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D4.DE0R44_DE0T44    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D4.DE0R43_DE0T43    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D4.DE0R42_DE0T42    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D4.DE0R41_DE0T41    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D4.DE0R40_DE0T40    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE0D5                 0x0025     USB Embedded Device Endpoint 0 Data Register 5
DE0D5.DE0R57_DE0T57    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D5.DE0R56_DE0T56    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D5.DE0R55_DE0T55    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D5.DE0R54_DE0T54    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D5.DE0R53_DE0T53    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D5.DE0R52_DE0T52    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D5.DE0R51_DE0T51    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D5.DE0R50_DE0T50    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE0D6                 0x0026     USB Embedded Device Endpoint 0 Data Register 6
DE0D6.DE0R67_DE0T67    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D6.DE0R66_DE0T66    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D6.DE0R65_DE0T65    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D6.DE0R64_DE0T64    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D6.DE0R63_DE0T63    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D6.DE0R62_DE0T62    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D6.DE0R61_DE0T61    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D6.DE0R60_DE0T60    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE0D7                 0x0027     USB Embedded Device Endpoint 0 Data Register 7
DE0D7.DE0R77_DE0T77    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D7.DE0R76_DE0T76    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D7.DE0R75_DE0T75    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D7.DE0R74_DE0T74    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D7.DE0R73_DE0T73    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D7.DE0R72_DE0T72    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D7.DE0R71_DE0T71    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D7.DE0R70_DE0T70    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE1D0                 0x0028     USB Embedded Device Endpoint 1_2 Data Register 0
DE1D0.DE1T07           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D0.DE1T06           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D0.DE1T05           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D0.DE1T04           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D0.DE1T03           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D0.DE1T02           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D0.DE1T01           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D0.DE1T00           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
DE1D1                 0x0029     USB Embedded Device Endpoint 1_2 Data Register 1
DE1D1.DE1T17           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D1.DE1T16           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D1.DE1T15           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D1.DE1T14           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D1.DE1T13           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D1.DE1T12           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D1.DE1T11           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D1.DE1T10           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
DE1D2                 0x002A     USB Embedded Device Endpoint 1_2 Data Register 2
DE1D2.DE1T27           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D2.DE1T26           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D2.DE1T25           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D2.DE1T24           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D2.DE1T23           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D2.DE1T22           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D2.DE1T21           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D2.DE1T20           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
DE1D3                 0x002B     USB Embedded Device Endpoint 1_2 Data Register 3
DE1D3.DE1T37           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D3.DE1T36           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D3.DE1T35           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D3.DE1T34           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D3.DE1T33           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D3.DE1T32           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D3.DE1T31           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D3.DE1T30           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
DE1D4                 0x002C     USB Embedded Device Endpoint 1_2 Data Register 4
DE1D4.DE1T47           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D4.DE1T46           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D4.DE1T45           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D4.DE1T44           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D4.DE1T43           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D4.DE1T42           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D4.DE1T41           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D4.DE1T40           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
DE1D5                 0x002D     USB Embedded Device Endpoint 1_2 Data Register 5
DE1D5.DE1T57           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D5.DE1T56           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D5.DE1T55           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D5.DE1T54           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D5.DE1T53           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D5.DE1T52           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D5.DE1T51           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D5.DE1T50           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
DE1D6                 0x002E     USB Embedded Device Endpoint 1_2 Data Register 6
DE1D6.DE1T67           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D6.DE1T66           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D6.DE1T65           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D6.DE1T64           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D6.DE1T63           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D6.DE1T62           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D6.DE1T61           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D6.DE1T60           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
DE1D7                 0x002F     USB Embedded Device Endpoint 1_2 Data Register 7
DE1D7.DE1T77           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D7.DE1T76           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D7.DE1T75           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D7.DE1T74           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D7.DE1T73           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D7.DE1T72           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D7.DE1T71           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D7.DE1T70           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
HE0D0                 0x0030     USB HUB Endpoint 0 Data Register 0
HE0D0.HE0R07_HE0T07    7   HUB Endpoint 0 Receive/Transmit Data Buffer 7
HE0D0.HE0R06_HE0T06    6   HUB Endpoint 0 Receive/Transmit Data Buffer 6
HE0D0.HE0R05_HE0T05    5   HUB Endpoint 0 Receive/Transmit Data Buffer 5
HE0D0.HE0R04_HE0T04    4   HUB Endpoint 0 Receive/Transmit Data Buffer 4
HE0D0.HE0R03_HE0T03    3   HUB Endpoint 0 Receive/Transmit Data Buffer 3
HE0D0.HE0R02_HE0T02    2   HUB Endpoint 0 Receive/Transmit Data Buffer 2
HE0D0.HE0R01_HE0T01    1   HUB Endpoint 0 Receive/Transmit Data Buffer 1
HE0D0.HE0R00_HE0T00    0   HUB Endpoint 0 Receive/Transmit Data Buffer 0
HE0D1                 0x0031     USB HUB Endpoint 0 Data Register 1
HE0D1.HE0R17_HE0T17    7   HUB Endpoint 0 Receive/Transmit Data Buffer 7
HE0D1.HE0R16_HE0T16    6   HUB Endpoint 0 Receive/Transmit Data Buffer 6
HE0D1.HE0R15_HE0T15    5   HUB Endpoint 0 Receive/Transmit Data Buffer 5
HE0D1.HE0R14_HE0T14    4   HUB Endpoint 0 Receive/Transmit Data Buffer 4
HE0D1.HE0R13_HE0T13    3   HUB Endpoint 0 Receive/Transmit Data Buffer 3
HE0D1.HE0R12_HE0T12    2   HUB Endpoint 0 Receive/Transmit Data Buffer 2
HE0D1.HE0R11_HE0T11    1   HUB Endpoint 0 Receive/Transmit Data Buffer 1
HE0D1.HE0R10_HE0T10    0   HUB Endpoint 0 Receive/Transmit Data Buffer 0
HE0D2                 0x0032     USB HUB Endpoint 0 Data Register 2
HE0D2.HE0R27_HE0T27    7   HUB Endpoint 0 Receive/Transmit Data Buffer 7
HE0D2.HE0R26_HE0T26    6   HUB Endpoint 0 Receive/Transmit Data Buffer 6
HE0D2.HE0R25_HE0T25    5   HUB Endpoint 0 Receive/Transmit Data Buffer 5
HE0D2.HE0R24_HE0T24    4   HUB Endpoint 0 Receive/Transmit Data Buffer 4
HE0D2.HE0R23_HE0T23    3   HUB Endpoint 0 Receive/Transmit Data Buffer 3
HE0D2.HE0R22_HE0T22    2   HUB Endpoint 0 Receive/Transmit Data Buffer 2
HE0D2.HE0R21_HE0T21    1   HUB Endpoint 0 Receive/Transmit Data Buffer 1
HE0D2.HE0R20_HE0T20    0   HUB Endpoint 0 Receive/Transmit Data Buffer 0
HE0D3                 0x0033     USB HUB Endpoint 0 Data Register 3
HE0D3.HE0R37_HE0T37    7   HUB Endpoint 0 Receive/Transmit Data Buffer 7
HE0D3.HE0R36_HE0T36    6   HUB Endpoint 0 Receive/Transmit Data Buffer 6
HE0D3.HE0R35_HE0T35    5   HUB Endpoint 0 Receive/Transmit Data Buffer 5
HE0D3.HE0R34_HE0T34    4   HUB Endpoint 0 Receive/Transmit Data Buffer 4
HE0D3.HE0R33_HE0T33    3   HUB Endpoint 0 Receive/Transmit Data Buffer 3
HE0D3.HE0R32_HE0T32    2   HUB Endpoint 0 Receive/Transmit Data Buffer 2
HE0D3.HE0R31_HE0T31    1   HUB Endpoint 0 Receive/Transmit Data Buffer 1
HE0D3.HE0R30_HE0T30    0   HUB Endpoint 0 Receive/Transmit Data Buffer 0
HE0D4                 0x0034     USB HUB Endpoint 0 Data Register 4
HE0D4.HE0R47_HE0T47    7   HUB Endpoint 0 Receive/Transmit Data Buffer 7
HE0D4.HE0R46_HE0T46    6   HUB Endpoint 0 Receive/Transmit Data Buffer 6
HE0D4.HE0R45_HE0T45    5   HUB Endpoint 0 Receive/Transmit Data Buffer 5
HE0D4.HE0R44_HE0T44    4   HUB Endpoint 0 Receive/Transmit Data Buffer 4
HE0D4.HE0R43_HE0T43    3   HUB Endpoint 0 Receive/Transmit Data Buffer 3
HE0D4.HE0R42_HE0T42    2   HUB Endpoint 0 Receive/Transmit Data Buffer 2
HE0D4.HE0R41_HE0T41    1   HUB Endpoint 0 Receive/Transmit Data Buffer 1
HE0D4.HE0R40_HE0T40    0   HUB Endpoint 0 Receive/Transmit Data Buffer 0
HE0D5                 0x0035     USB HUB Endpoint 0 Data Register 5
HE0D5.HE0R57_HE0T57    7   HUB Endpoint 0 Receive/Transmit Data Buffer 7
HE0D5.HE0R56_HE0T56    6   HUB Endpoint 0 Receive/Transmit Data Buffer 6
HE0D5.HE0R55_HE0T55    5   HUB Endpoint 0 Receive/Transmit Data Buffer 5
HE0D5.HE0R54_HE0T54    4   HUB Endpoint 0 Receive/Transmit Data Buffer 4
HE0D5.HE0R53_HE0T53    3   HUB Endpoint 0 Receive/Transmit Data Buffer 3
HE0D5.HE0R52_HE0T52    2   HUB Endpoint 0 Receive/Transmit Data Buffer 2
HE0D5.HE0R51_HE0T51    1   HUB Endpoint 0 Receive/Transmit Data Buffer 1
HE0D5.HE0R50_HE0T50    0   HUB Endpoint 0 Receive/Transmit Data Buffer 0
HE0D6                 0x0036     USB HUB Endpoint 0 Data Register 6
HE0D6.HE0R67_HE0T67    7   HUB Endpoint 0 Receive/Transmit Data Buffer 7
HE0D6.HE0R66_HE0T66    6   HUB Endpoint 0 Receive/Transmit Data Buffer 6
HE0D6.HE0R65_HE0T65    5   HUB Endpoint 0 Receive/Transmit Data Buffer 5
HE0D6.HE0R64_HE0T64    4   HUB Endpoint 0 Receive/Transmit Data Buffer 4
HE0D6.HE0R63_HE0T63    3   HUB Endpoint 0 Receive/Transmit Data Buffer 3
HE0D6.HE0R62_HE0T62    2   HUB Endpoint 0 Receive/Transmit Data Buffer 2
HE0D6.HE0R61_HE0T61    1   HUB Endpoint 0 Receive/Transmit Data Buffer 1
HE0D6.HE0R60_HE0T60    0   HUB Endpoint 0 Receive/Transmit Data Buffer 0
HE0D7                 0x0037     USB HUB Endpoint 0 Data Register 7
HE0D7.HE0R77_HE0T77    7   HUB Endpoint 0 Receive/Transmit Data Buffer 7
HE0D7.HE0R76_HE0T76    6   HUB Endpoint 0 Receive/Transmit Data Buffer 6
HE0D7.HE0R75_HE0T75    5   HUB Endpoint 0 Receive/Transmit Data Buffer 5
HE0D7.HE0R74_HE0T74    4   HUB Endpoint 0 Receive/Transmit Data Buffer 4
HE0D7.HE0R73_HE0T73    3   HUB Endpoint 0 Receive/Transmit Data Buffer 3
HE0D7.HE0R72_HE0T72    2   HUB Endpoint 0 Receive/Transmit Data Buffer 2
HE0D7.HE0R71_HE0T71    1   HUB Endpoint 0 Receive/Transmit Data Buffer 1
HE0D7.HE0R70_HE0T70    0   HUB Endpoint 0 Receive/Transmit Data Buffer 0
UNUSED0038            0x0038     UNUSED
UNUSED0039            0x0039     UNUSED
PCTL                  0x003A     PLL Control Register
PCTL.PLLIE             7   PLL Interrupt Enable Bit
PCTL.PLLF              6   PLL Interrupt Flag Bit
PCTL.PLLON             5   PLL On Bit
PCTL.BCS               4   Base Clock Select Bit
PCTL.PRE1              3   Prescaler program bits 1
PCTL.PRE0              2   Prescaler program bits 0
PBWC                  0x003B     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               5   Acquisition Mode Bit
PMSH                  0x003C     PLL Multiplier Select Register High
PMSH.MUL11             3   Multiplier select bits 11
PMSH.MUL10             2   Multiplier select bits 10
PMSH.MUL9              1   Multiplier select bits 9
PMSH.MUL8              0   Multiplier select bits 8
PMSL                  0x003D     PLL Multiplier Select Register Low
PMSL.MUL7              7   Multiplier select bits 7
PMSL.MUL6              6   Multiplier select bits 6
PMSL.MUL5              5   Multiplier select bits 5
PMSL.MUL4              4   Multiplier select bits 4
PMSL.MUL3              3   Multiplier select bits 3
PMSL.MUL2              2   Multiplier select bits 2
PMSL.MUL1              1   Multiplier select bits 1
PMSL.MUL0              0   Multiplier select bits 0
UNUSED003E            0x003E     UNUSED
PRDS                  0x003F     PLL Reference Divider Select Register
PRDS.RDS3              3   Reference Divider Select Bit 3
PRDS.RDS2              2   Reference Divider Select Bit 2
PRDS.RDS1              1   Reference Divider Select Bit 1
PRDS.RDS0              0   Reference Divider Select Bit 0
KBFSCR                0x0040     Port F Keyboard Status and Control Register
KBFSCR.KEYFF           3   Port-F Keyboard Flag Bit
KBFSCR.ACKF            2   Port-F Keyboard Acknowledge Bit
KBFSCR.IMASKF          1   Port-F Keyboard Interrupt Mask Bit
KBFSCR.MODEF           0   Port-F Keyboard Triggering Sensitivity Bit
KBFIER                0x0041     Port F Keyboard Interrupt Enable Register
KBFIER.KBFIE7          7   Port-F Keyboard Interrupt Enable Bits 7
KBFIER.KBFIE6          6   Port-F Keyboard Interrupt Enable Bits 6
KBFIER.KBFIE5          5   Port-F Keyboard Interrupt Enable Bits 5
KBFIER.KBFIE4          4   Port-F Keyboard Interrupt Enable Bits 4
KBFIER.KBFIE3          3   Port-F Keyboard Interrupt Enable Bits 3
KBFIER.KBFIE2          2   Port-F Keyboard Interrupt Enable Bits 2
KBFIER.KBFIE1          1   Port-F Keyboard Interrupt Enable Bits 1
KBFIER.KBFIE0          0   Port-F Keyboard Interrupt Enable Bits 0
PFPER                 0x0042     Port F Pull-up Enable Register
PFPER.PFPE7            7   Port F pull-up enable bits 7
PFPER.PFPE6            6   Port F pull-up enable bits 6
PFPER.PFPE5            5   Port F pull-up enable bits 5
PFPER.PFPE4            4   Port F pull-up enable bits 4
PFPER.PFPE3            3   Port F pull-up enable bits 3
PFPER.PFPE2            2   Port F pull-up enable bits 2
PFPER.PFPE1            1   Port F pull-up enable bits 1
PFPER.PFPE0            0   Port F pull-up enable bits 0
UNUSED0043            0x0043     UNUSED
UNUSED0044            0x0044     UNUSED
UNUSED0045            0x0045     UNUSED
UNUSED0046            0x0046     UNUSED
DCR2                  0x0047     USB Embedded Device Control Register 2
DCR2.ENABLE2           3   Embedded Device Endpoint 2 Enable
DCR2.ENABLE1           2   Embedded Device Endpoint 1 Enable
DCR2.DSTALL2           1   Embedded Device Endpoint 2 Force Stall Bit
DCR2.DSTALL1           0   Embedded Device Endpoint 1 Force Stall Bit
DADDR                 0x0048     USB Embedded Device Address Register
DADDR.DEVEN            7   Enable USB Embedded Device
DADDR.DADD6            6   USB Embedded Device Function Address 6
DADDR.DADD5            5   USB Embedded Device Function Address 5
DADDR.DADD4            4   USB Embedded Device Function Address 4
DADDR.DADD3            3   USB Embedded Device Function Address 3
DADDR.DADD2            2   USB Embedded Device Function Address 2
DADDR.DADD1            1   USB Embedded Device Function Address 1
DADDR.DADD0            0   USB Embedded Device Function Address 0
DIR0                  0x0049     USB Embedded Device Interrupt Register 0
DIR0.TXD0F             7   Embedded Device Endpoint 0 Data Transmit Flag
DIR0.RXD0F             6   Embedded Device Endpoint 0 Data Receive Flag
DIR0.TXD0IE            3   Embedded Device Endpoint 0 Transmit Interrupt Enable
DIR0.RXD0IE            2   Embedded Device Endpoint 0 Receive Interrupt Enable
DIR0.TXD0FR            1   Embedded Device Endpoint 0 Transmit Flag Reset
DIR0.RXD0FR            0   Embedded Device Endpoint 0 Receive Flag Reset
DIR1                  0x004A     USB Embedded Device Interrupt Register 1
DIR1.TXD1F             7   Embedded Device Endpoint 1/2 Data Transmit Flag
DIR1.TXD1IE            3   Embedded Device Endpoint 1/2 Transmit Interrupt Enable
DIR1.TXD1FR            1   Embedded Device Endpoint 1/2 Transmit Flag Reset
DCR0                  0x004B     USB Embedded Device Control Register 0
DCR0.T0SEQ             7   Embedded Device Endpoint 0 Transmit Sequence Bit
DCR0.DSTALL0           6   Embedded Device Endpoint 0 Force Stall Bit
DCR0.TX0E              5   Embedded Device Endpoint 0 Transmit Enable
DCR0.RX0E              4   Embedded Device Endpoint 0 Receive Enable
DCR0.TP0SIZ3           3   Embedded Device Endpoint 0 Transmit Data Packet Size 3
DCR0.TP0SIZ2           2   Embedded Device Endpoint 0 Transmit Data Packet Size 2
DCR0.TP0SIZ1           1   Embedded Device Endpoint 0 Transmit Data Packet Size 1
DCR0.TP0SIZ0           0   Embedded Device Endpoint 0 Transmit Data Packet Size 0
DCR1                  0x004C     USB Embedded Device Control Register 1
DCR1.T1SEQ             7   Embedded Device Endpoint 1/2 Transmit Sequence Bit
DCR1.ENDADD            6   Endpoint Address Select
DCR1.TX1E              5   Embedded Device Endpoint 1/2 Transmit Enable
DCR1.TP1SIZ3           3   Embedded Device Endpoint 1/2 Transmit Data Packet Size 3
DCR1.TP1SIZ2           2   Embedded Device Endpoint 1/2 Transmit Data Packet Size 2
DCR1.TP1SIZ1           1   Embedded Device Endpoint 1/2 Transmit Data Packet Size 1
DCR1.TP1SIZ0           0   Embedded Device Endpoint 1/2 Transmit Data Packet Size 0
DSR                   0x004D     USB Embedded Device Status Register
DSR.DRSEQ              7   Embedded Device Endpoint 0 Receive Sequence Bit
DSR.DSETUP             6   Embedded Device SETUP Token Detect Bit
DSR.DTX1ST             5   Embedded Device Transmit First Flag
DSR.DTX1STR            4   Clear Transmit First Flag
DSR.RP0SIZ3            3   Embedded Device Endpoint 0 Receive Data Packet Size 3
DSR.RP0SIZ2            2   Embedded Device Endpoint 0 Receive Data Packet Size 2
DSR.RP0SIZ1            1   Embedded Device Endpoint 0 Receive Data Packet Size 1
DSR.RP0SIZ0            0   Embedded Device Endpoint 0 Receive Data Packet Size 0
UNUSED004E            0x004E     UNUSED
UNUSED004F            0x004F     UNUSED
UNUSED0050            0x0050     UNUSED
HDP1CR                0x0051     USB HUB Downstream Port 1 Control Register
HDP1CR.PEN1            7   Downstream Port Enable Control Bit
HDP1CR.LOWSP1          6   Full Speed / Low Speed Port Control Bit
HDP1CR.RST1            5   Force Reset to the Downstream Port
HDP1CR.RESUM1          4   Force Resume to the Downstream Port
HDP1CR.SUSP1           3   Downstream Port Selective Suspend Bit
HDP1CR.D1_PL           1   Downstream Port Differential Data
HDP1CR.D1_MIN          0   Downstream Port Differential Data
HDP2CR                0x0052     USB HUB Downstream Port 2 Control Register
HDP2CR.PEN2            7   Downstream Port Enable Control Bit     
HDP2CR.LOWSP2          6   Full Speed / Low Speed Port Control Bit
HDP2CR.RST2            5   Force Reset to the Downstream Port     
HDP2CR.RESUM2          4   Force Resume to the Downstream Port    
HDP2CR.SUSP2           3   Downstream Port Selective Suspend Bit  
HDP2CR.D2_PL           1   Downstream Port Differential Data      
HDP2CR.D2_MIN          0   Downstream Port Differential Data      
HDP3CR                0x0053     USB HUB Downstream Port 3 Control Register
HDP3CR.PEN3            7   Downstream Port Enable Control Bit     
HDP3CR.LOWSP3          6   Full Speed / Low Speed Port Control Bit
HDP3CR.RST3            5   Force Reset to the Downstream Port     
HDP3CR.RESUM3          4   Force Resume to the Downstream Port    
HDP3CR.SUSP3           3   Downstream Port Selective Suspend Bit  
HDP3CR.D3_PL           1   Downstream Port Differential Data      
HDP3CR.D3_MIN          0   Downstream Port Differential Data      
HDP4CR                0x0054     USB HUB Downstream Port 4 Control Register
HDP4CR.PEN4            7   Downstream Port Enable Control Bit     
HDP4CR.LOWSP4          6   Full Speed / Low Speed Port Control Bit
HDP4CR.RST4            5   Force Reset to the Downstream Port     
HDP4CR.RESUM4          4   Force Resume to the Downstream Port    
HDP4CR.SUSP4           3   Downstream Port Selective Suspend Bit  
HDP4CR.D4_PL           1   Downstream Port Differential Data      
HDP4CR.D4_MIN          0   Downstream Port Differential Data      
UNUSED0055            0x0055     UNUSED
SIETIR                0x0056     USB SIE Timing Interrupt Register
SIETIR.SOFF            7   Start Of Frame Detect Flag
SIETIR.EOF2F           6   The second End Of Frame Point Flag
SIETIR.EOPF            5   End of Packet Detect Flag
SIETIR.TRANF           4   Bus Signal Transition Detect Flag
SIETIR.SOFIE           3   Start Of Frame Interrupt Enable
SIETIR.EOF2IE          2   The Second End of Frame Point Interrupt Enable
SIETIR.EOPIE           1   End of Packet Detect Interrupt Enable
SIETIR.TRANIE          0   Bus Signal Transition Detect Interrupt Enable
SIETSR                0x0057     USB SIE Timing Status Register
SIETSR.RSTF            7   USB Reset Flag
SIETSR.RSTFR           6   Clear Reset Indicator Bit
SIETSR.LOCKF           5   USB Frame Timer Locked
SIETSR.LOCKFR          4   Clear Frame Timer Locked Flag
SIETSR.SOFFR           3   Start Of Frame Flag Reset
SIETSR.EOF2FR          2   The Second End of Frame Point Flag Reset
SIETSR.EOPFR           1   End of Packet Flag Reset
SIETSR.TRANFR          0   Bus Signal Transition Flag Reset
HADDR                 0x0058     USB HUB Address Register
HADDR.USBEN            7   USB Module Enable
HADDR.ADD6             6   USB HUB Function Address 6
HADDR.ADD5             5   USB HUB Function Address 5
HADDR.ADD4             4   USB HUB Function Address 4
HADDR.ADD3             3   USB HUB Function Address 3
HADDR.ADD2             2   USB HUB Function Address 2
HADDR.ADD1             1   USB HUB Function Address 1
HADDR.ADD0             0   USB HUB Function Address 0
HIR0                  0x0059     USB HUB Interrupt Register 0
HIR0.TXDF              7   HUB Endpoint 0 Data Transmit Flag
HIR0.RXDF              6   HUB Endpoint 0 Data Receive Flag
HIR0.TXDIE             3   HUB Endpoint 0 Transmit Interrupt Enable
HIR0.RXDIE             2   HUB Endpoint 0 Receive Interrupt Enable
HIR0.TXDFR             1   HUB Endpoint 0 Transmit Flag Reset
HIR0.RXDFR             0   HUB Endpoint 0 Receive Flag Reset
UNUSED005A            0x005A     UNUSED
HCR0                  0x005B     USB HUB Control Register 0
HCR0.TSEQ              7   HUB Endpoint 0 Transmit Sequence Bit
HCR0.STALL0            6   HUB Endpoint 0 Force Stall Bit
HCR0.TXE               5   HUB Endpoint 0 Transmit Enable
HCR0.RXE               4   HUB Endpoint 0 Receive Enable
HCR0.TPSIZ3            3   HUB Endpoint 0 Transmit Data Packet Size 3
HCR0.TPSIZ2            2   HUB Endpoint 0 Transmit Data Packet Size 2
HCR0.TPSIZ1            1   HUB Endpoint 0 Transmit Data Packet Size 1
HCR0.TPSIZ0            0   HUB Endpoint 0 Transmit Data Packet Size 0
HCDR                  0x005C     USB HUB Endpoint1 Control & Data Register
HCDR.STALL1            7   HUB Endpoint 1 Force Stall Bit
HCDR.PNEW              6   Port New Status Change
HCDR.PCHG5             5   HUB and Port Status Change Bits 5
HCDR.PCHG4             4   HUB and Port Status Change Bits 4
HCDR.PCHG3             3   HUB and Port Status Change Bits 3
HCDR.PCHG2             2   HUB and Port Status Change Bits 2
HCDR.PCHG1             1   HUB and Port Status Change Bits 1
HCDR.PCHG0             0   HUB and Port Status Change Bits 0
HSR                   0x005D     USB HUB Status Register
HSR.RSEQ               7   HUB Endpoint 0 Receive Sequence Bit
HSR.SETUP              6   HUB SETUP Token Detect Bit
HSR.TX1ST              5   HUB Transmit First Flag
HSR.TX1STR             4   Clear HUB Transmit First Flag
HSR.RPSIZ3             3   HUB Endpoint 0 Receive Data Packet Size 3
HSR.RPSIZ2             2   HUB Endpoint 0 Receive Data Packet Size 2
HSR.RPSIZ1             1   HUB Endpoint 0 Receive Data Packet Size 1
HSR.RPSIZ0             0   HUB Endpoint 0 Receive Data Packet Size 0
HRPCR                 0x005E     USB HUB Root Port Control Register
HRPCR.RESUM0           4   Force Resume to the Root Port
HRPCR.SUSPND           3   USB Suspend Control Bit
HRPCR.D0_PL            1   Root Port Differential Data
HRPCR.D0_MIN           0   Root Port Differential Data
UNUSED005F            0x005F     UNUSED
BSR                   0xFE00     Break Status Register
BSR.SBSW               1   SIM Break Stop/Wait
RSR                   0xFE01     Reset Status Register
RSR.POR                7   Power-On Reset Bit
RSR.PIN                6   External Reset Bit
RSR.COP                5   Computer Operating Properly Reset Bit
RSR.ILOP               4   Illegal Opcode Reset Bit
RSR.ILAD               3   Illegal Address Reset Bit (opcode fetches only)
RSR.USB                2   Universal Serial Bus Reset Bit
ReservFE02            0xFE02     Reserved
BFCR                  0xFE03     Break Flag Control Register
BFCR.BCFE              7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF6               7   Interrupt Flags 6
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF2               3   Interrupt Flags 2
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF11              4   Interrupt Flags 11
INT2.IF10              3   Interrupt Flags 10
INT2.IF9               2   Interrupt Flags 9
INT2.IF8               1   Interrupt Flags 8
INT2.IF7               0   Interrupt Flags 7
ReservFE06            0xFE06     Reserved
ReservFE07            0xFE07     Reserved
UNUSEDFE08            0xFE08     UNUSED
UNUSEDFE09            0xFE09     UNUSED
UNUSEDFE0A            0xFE0A     UNUSED
UNUSEDFE0B            0xFE0B     UNUSED
BRKH                  0xFE0C     Break Address Register High
BRKL                  0xFE0D     Break Address Register Low
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
ReservFF8D            0xFF8D     Reserved
COPCTL                0xFFFF     COP Control Register


.68HC908AB32
; MC68HC908AB32/D  http://
; MC68HC908AB32.pdf


; 32, 256 bytes of user FLASH memory
; EEPROM=512
; RAM=1K
; ROM=307


; MEMORY MAP
area DATA FSR		   0x0000:0x0050
area DATA RAM		   0x0050:0x0450
area BSS  UNIMPLEMENTED	   0x0450:0x0500
area BSS  RESERVED	   0x0500:0x0580
area BSS  UNIMPLEMENTED	   0x0580:0x0800
area DATA EEPROM	   0x0800:0xA000
area BSS  UNIMPLEMENTED	   0xA000:0x8000
area DATA FLASH_Memory	   0x8000:0xFE00
area DATA FSR_1		   0xFE00:0xFE20
area DATA Monitor_ROM	   0xFE20:0xFF53
area BSS  UNIMPLEMENTED	   0xFF53:0xFF7E
area DATA FSR_2		   0xFF7E:0xFF7F
area BSS  UNIMPLEMENTED	   0xFF7F:0xFFC0
area BSS  RESERVED	   0xFFC0:0xFFD0
area DATA USER_VEC	   0xFFD0:0x10000


; Interrupt and reset vector assignments
interrupt __RESET      0xFFFE       Reset Vector
interrupt SWI          0xFFFC       SWI Vector
interrupt IRQ          0xFFFA       IRQ Vector
interrupt PLL          0xFFF8       PLL Vector
interrupt PIT          0xFFF6       Programmable Interrupt Timer
interrupt Timer_A_CH0  0xFFF4       Timer A Channel 0 Vector
interrupt Timer_A_CH1  0xFFF2       Timer A Channel 1 Vector
interrupt Timer_A_CH2  0xFFF0       Timer A Channel 2 Vector
interrupt Timer_A_CH3  0xFFEE       Timer A Channel 3 Vector
interrupt Timer_A      0xFFEC       Timer A Overflow Vector
interrupt Timer_B_CH0  0xFFEA       Timer B Channel 0 Vector
interrupt Timer_B_CH1  0xFFE8       Timer B Channel 1 Vector
interrupt Timer_B      0xFFE6       Timer B Overflow Vector
interrupt SPI_R        0xFFE4       SPI Receive Vector
interrupt SPI_T        0xFFE2       SPI Transmit Vector
interrupt Timer_B_CH2  0xFFE0       Timer B Channel 2 Vector
interrupt Timer_B_CH3  0xFFDE       Timer B Channel 3 Vector
interrupt SCI_Error    0xFFD8       SCI Error Vector
interrupt SCI_R        0xFFD6       SCI Receive Vector
interrupt SCI_T        0xFFD4       SCI Transmit Vector
interrupt KBRD         0xFFD2       Keyboard Vector
interrupt ADC          0xFFD0       ADC Conversion Complete Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bit 7
PTA.PTA6               6   Port A Data Bit 6
PTA.PTA5               5   Port A Data Bit 5
PTA.PTA4               4   Port A Data Bit 4
PTA.PTA3               3   Port A Data Bit 3
PTA.PTA2               2   Port A Data Bit 2
PTA.PTA1               1   Port A Data Bit 1
PTA.PTA0               0   Port A Data Bit 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bit 7
PTB.PTB6               6   Port B Data Bit 6
PTB.PTB5               5   Port B Data Bit 5
PTB.PTB4               4   Port B Data Bit 4
PTB.PTB3               3   Port B Data Bit 3
PTB.PTB2               2   Port B Data Bit 2
PTB.PTB1               1   Port B Data Bit 1
PTB.PTB0               0   Port B Data Bit 0
PTC                   0x0002     Port C Data Register
PTC.PTC5               5   Port C Data Bit 5
PTC.PTC4               4   Port C Data Bit 4
PTC.PTC3               3   Port C Data Bit 3
PTC.PTC2               2   Port C Data Bit 2
PTC.PTC1               1   Port C Data Bit 1
PTC.PTC0               0   Port C Data Bit 0
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bit 7
PTD.PTD6               6   Port D Data Bit 6
PTD.PTD5               5   Port D Data Bit 5
PTD.PTD4               4   Port D Data Bit 4
PTD.PTD3               3   Port D Data Bit 3
PTD.PTD2               2   Port D Data Bit 2
PTD.PTD1               1   Port D Data Bit 1
PTD.PTD0               0   Port D Data Bit 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bit 7
DDRA.DDRA6             6   Data Direction Register A Bit 6
DDRA.DDRA5             5   Data Direction Register A Bit 5
DDRA.DDRA4             4   Data Direction Register A Bit 4
DDRA.DDRA3             3   Data Direction Register A Bit 3
DDRA.DDRA2             2   Data Direction Register A Bit 2
DDRA.DDRA1             1   Data Direction Register A Bit 1
DDRA.DDRA0             0   Data Direction Register A Bit 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bit 7
DDRB.DDRB6             6   Data Direction Register B Bit 6
DDRB.DDRB5             5   Data Direction Register B Bit 5
DDRB.DDRB4             4   Data Direction Register B Bit 4
DDRB.DDRB3             3   Data Direction Register B Bit 3
DDRB.DDRB2             2   Data Direction Register B Bit 2
DDRB.DDRB1             1   Data Direction Register B Bit 1
DDRB.DDRB0             0   Data Direction Register B Bit 0
DDRC                  0x0006     Data Direction Register C
DDRC.MCLKEN            7   T12 System Clock Enable Bit
DDRC.DDRC5             5   Data Direction Register C Bit 5
DDRC.DDRC4             4   Data Direction Register C Bit 4
DDRC.DDRC3             3   Data Direction Register C Bit 3
DDRC.DDRC2             2   Data Direction Register C Bit 2
DDRC.DDRC1             1   Data Direction Register C Bit 1
DDRC.DDRC0             0   Data Direction Register C Bit 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bit 7
DDRD.DDRD6             6   Data Direction Register D Bit 6
DDRD.DDRD5             5   Data Direction Register D Bit 5
DDRD.DDRD4             4   Data Direction Register D Bit 4
DDRD.DDRD3             3   Data Direction Register D Bit 3
DDRD.DDRD2             2   Data Direction Register D Bit 2
DDRD.DDRD1             1   Data Direction Register D Bit 1
DDRD.DDRD0             0   Data Direction Register D Bit 0
PTE                   0x0008     Port E Data Register
PTE.PTE7               7   Port E Data Bit 7
PTE.PTE6               6   Port E Data Bit 6
PTE.PTE5               5   Port E Data Bit 5
PTE.PTE4               4   Port E Data Bit 4
PTE.PTE3               3   Port E Data Bit 3
PTE.PTE2               2   Port E Data Bit 2
PTE.PTE1               1   Port E Data Bit 1
PTE.PTE0               0   Port E Data Bit 0
PTF                   0x0009     Port F Data Register
PTF.PTF7               7   Port F Data Bit 7
PTF.PTF6               6   Port F Data Bit 6
PTF.PTF5               5   Port F Data Bit 5
PTF.PTF4               4   Port F Data Bit 4
PTF.PTF3               3   Port F Data Bit 3
PTF.PTF2               2   Port F Data Bit 2
PTF.PTF1               1   Port F Data Bit 1
PTF.PTF0               0   Port F Data Bit 0
PTG                   0x000A     Port G Data Register
PTG.PTG2               2   Port G Data Bit 2
PTG.PTG1               1   Port G Data Bit 1
PTG.PTG0               0   Port G Data Bit 0
PTH                   0x000B     Port H Data Register
PTH.PTH1               1   Port H Data Bit 1
PTH.PTH0               0   Port H Data Bit 0
DDRE                  0x000C     Data Direction Register E
DDRE.DDRE7             7   Data Direction Register E Bit 7
DDRE.DDRE6             6   Data Direction Register E Bit 6
DDRE.DDRE5             5   Data Direction Register E Bit 5
DDRE.DDRE4             4   Data Direction Register E Bit 4
DDRE.DDRE3             3   Data Direction Register E Bit 3
DDRE.DDRE2             2   Data Direction Register E Bit 2
DDRE.DDRE1             1   Data Direction Register E Bit 1
DDRE.DDRE0             0   Data Direction Register E Bit 0
DDRF                  0x000D     Data Direction Register F
DDRF.DDRF7             7   Data Direction Register F Bit 7
DDRF.DDRF6             6   Data Direction Register F Bit 6
DDRF.DDRF5             5   Data Direction Register F Bit 5
DDRF.DDRF4             4   Data Direction Register F Bit 4
DDRF.DDRF3             3   Data Direction Register F Bit 3
DDRF.DDRF2             2   Data Direction Register F Bit 2
DDRF.DDRF1             1   Data Direction Register F Bit 1
DDRF.DDRF0             0   Data Direction Register F Bit 0
DDRG                  0x000E     Data Direction Register G
DDRG.DDRG2             2   Data Direction Register G Bit 2
DDRG.DDRG1             1   Data Direction Register G Bit 1
DDRG.DDRG0             0   Data Direction Register G Bit 0
DDRH                  0x000F     Data Direction Register H
DDRH.DDRH1             1   Data Direction Register H Bit 1
DDRH.DDRH0             0   Data Direction Register H Bit 0
SPCR                  0x0010     SPI Control Register
SPCR.SPRIE             7   SPI Receiver Interrupt Enable Bit
SPCR.SPMSTR            5   SPI Master Bit
SPCR.CPOL              4   Clock Polarity Bit
SPCR.CPHA              3   Clock Phase Bit
SPCR.SPWOM             2   SPI Wired-OR Mode Bit
SPCR.SPE               1   SPI Enable
SPCR.SPTIE             0   SPI Transmit Interrupt Enable
SPSCR                 0x0011     SPI Status and Control Register
SPSCR.SPRF             7   SPI Receiver Full Bit
SPSCR.ERRIE            6   Error Interrupt Enable Bit
SPSCR.OVRF             5   Overflow Bit
SPSCR.MODF             4   Mode Fault Bit
SPSCR.SPTE             3   SPI Transmitter Empty Bit
SPSCR.MODFEN           2   Mode Fault Enable Bit
SPSCR.SPR1             1   SPI Baud Rate Select Bits 1
SPSCR.SPR0             0   SPI Baud Rate Select Bits 0
SPDR                  0x0012     SPI Data Register
SPDR.R7_T7             7   Receive/Transmit Data Bits 7
SPDR.R6_T6             6   Receive/Transmit Data Bits 6
SPDR.R5_T5             5   Receive/Transmit Data Bits 5
SPDR.R4_T4             4   Receive/Transmit Data Bits 4
SPDR.R3_T3             3   Receive/Transmit Data Bits 3
SPDR.R2_T2             2   Receive/Transmit Data Bits 2
SPDR.R1_T1             1   Receive/Transmit Data Bits 1
SPDR.R0_T0             0   Receive/Transmit Data Bits 0
SCC1                  0x0013     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit
SCC1.ENSCI             6   Enable SCI Bit
SCC1.TXINV             5   Transmit Inversion Bit
SCC1.M                 4   Mode (Character Length) Bit
SCC1.WAKE              3   Wakeup Condition Bit
SCC1.ILTY              2   Idle Line Type Bit
SCC1.PEN               1   Parity Enable Bit
SCC1.PTY               0   Parity Bit
SCC2                  0x0014     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit
SCC2.ILIE              4   Idle Line Interrupt Enable Bit
SCC2.TE                3   Transmitter Enable Bit
SCC2.RE                2   Receiver Enable Bit
SCC2.RWU               1   Receiver Wakeup Bit
SCC2.SBK               0   Send Break Bit
SCC3                  0x0015     SCI Control Register 3
SCC3.R8                7   Received Bit 8
SCC3.T8                6   Transmitted Bit 8
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit
SCS1                  0x0016     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit
SCS1.TC                6   Transmission Complete Bit
SCS1.SCRF              5   SCI Receiver Full Bit
SCS1.IDLE              4   Receiver Idle Bit
SCS1.OR                3   Receiver Overrun Bit
SCS1.NF                2   Receiver Noise Flag Bit
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit
SCS2                  0x0017     SCI Status Register 2
SCS2.BKF               1   Break Flag Bit
SCS2.RPF               0   Reception in Progress Flag Bit
SCDR                  0x0018     SCI Data Register
SCDR.R7_T7             7   Receive/Transmit Data Bits 7
SCDR.R6_T6             6   Receive/Transmit Data Bits 6
SCDR.R5_T5             5   Receive/Transmit Data Bits 5
SCDR.R4_T4             4   Receive/Transmit Data Bits 4
SCDR.R3_T3             3   Receive/Transmit Data Bits 3
SCDR.R2_T2             2   Receive/Transmit Data Bits 2
SCDR.R1_T1             1   Receive/Transmit Data Bits 1
SCDR.R0_T0             0   Receive/Transmit Data Bits 0
SCBR                  0x0019     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2
SCBR.SCR1              1   SCI Baud Rate Select Bits 1
SCBR.SCR0              0   SCI Baud Rate Select Bits 0
ISCR                  0x001A     IRQ Status and Control Register
ISCR.IRQF              3   IRQ Flag
ISCR.ACK               2   IRQ Interrupt Request Acknowledge Bit
ISCR.IMASK             1   IRQ Interrupt Mask Bit
ISCR.MODE              0   IRQ Edge/Level Select Bit
KBSCR                 0x001B     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
PCTL                  0x001C     PLL Control Register
PCTL.PLLIE             7   PLL Interrupt Enable Bit
PCTL.PLLF              6   PLL Interrupt Flag Bit
PCTL.PLLON             5   PLL On Bit
PCTL.BCS               4   Base Clock Select Bit
PBWC                  0x001D     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               5   Acquisition Mode Bit
PBWC.XLD               4   Crystal Loss Detect Bit
PPG                   0x001E     PLL Programming Register
PPG.MUL7               7   Multiplier Select Bits 7
PPG.MUL6               6   Multiplier Select Bits 6
PPG.MUL5               5   Multiplier Select Bits 5
PPG.MUL4               4   Multiplier Select Bits 4
PPG.VRS7               3   VCO Range Select Bits 7
PPG.VRS6               2   VCO Range Select Bits 6
PPG.VRS5               1   VCO Range Select Bits 5
PPG.VRS4               0   VCO Range Select Bits 4
CONFIG1               0x001F     Configuration Register 1
CONFIG1.LVISTOP        7   LVI Enable in Stop Mode Bit
CONFIG1.LVIRSTD        5   LVI Reset Disable Bit
CONFIG1.LVIPWRD        4   LVI Power Disable Bit
CONFIG1.SSREC          3   Short Stop Recovery Bit
CONFIG1.COPRS          2   COP Rate Select Bit
CONFIG1.STOP           1   STOP Instruction Enable Bit
CONFIG1.COPD           0   COP Disable Bit
TASC                  0x0020     Timer A Status and Control Register
TASC.TOF               7   TIMA Overflow Flag Bit
TASC.TOIE              6   TIMA Overflow Interrupt Enable Bit
TASC.TSTOP             5   TIMA Stop Bit
TASC.TRST              4   TIMA Reset Bit
TASC.PS2               2   Prescaler Select Bits 2
TASC.PS1               1   Prescaler Select Bits 1
TASC.PS0               0   Prescaler Select Bits 0
KBIER                 0x0021     Keyboard Interrupt Enable Register
KBIER.KBIE4            4   Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Keyboard Interrupt Enable Bits 0
TACNTH                0x0022     Timer A Counter Register High
TACNTL                0x0023     Timer A Counter Register Low
TAMODH                0x0024     Timer A Counter Modulo Register High
TAMODL                0x0025     Timer A Counter Modulo Register Low
TASC0                 0x0026     Timer A Channel 0 Status and Control Register
TASC0.CH0F             7   Channel 0 Flag Bit
TASC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TASC0.MS0B             5   Mode Select Bit B
TASC0.MS0A             4   Mode Select Bit A
TASC0.ELS0B            3   Edge/Level Select Bits
TASC0.ELS0A            2   Edge/Level Select Bits
TASC0.TOV0             1   Toggle-On-Overflow Bit
TASC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TACH0H                0x0027     Timer A Channel 0 Register High
TACH0L                0x0028     Timer A Channel 0 Register Low
TASC1                 0x0029     Timer A Channel 1 Status and Control Register
TASC1.CH1F             7   Channel 1 Flag Bit            
TASC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TASC1.MS1A             4   Mode Select Bit A               
TASC1.ELS1B            3   Edge/Level Select Bits          
TASC1.ELS1A            2   Edge/Level Select Bits          
TASC1.TOV1             1   Toggle-On-Overflow Bit          
TASC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TACH1H                0x002A     Timer A Channel 1 Register High
TACH1L                0x002B     Timer A Channel 1 Register Low
TASC2                 0x002C     Timer A Channel 2 Status and Control Register
TASC2.CH2F             7   Channel 2 Flag Bit              
TASC2.CH2IE            6   Channel 2 Interrupt Enable Bit  
TASC2.MS2B             5   Mode Select Bit B               
TASC2.MS2A             4   Mode Select Bit A               
TASC2.ELS2B            3   Edge/Level Select Bits          
TASC2.ELS2A            2   Edge/Level Select Bits          
TASC2.TOV2             1   Toggle-On-Overflow Bit          
TASC2.CH2MAX           0   Channel 2 Maximum Duty Cycle Bit
TACH2H                0x002D     Timer A Channel 2 Register High
TACH2L                0x002E     Timer A Channel 2 Register Low
TASC3                 0x002F     Timer A Channel 3 Status and Control Register
TASC3.CH3F             7   Channel 3 Flag Bit              
TASC3.CH3IE            6   Channel 3 Interrupt Enable Bit  
TASC3.MS3A             4   Mode Select Bit A               
TASC3.ELS3B            3   Edge/Level Select Bits          
TASC3.ELS3A            2   Edge/Level Select Bits          
TASC3.TOV3             1   Toggle-On-Overflow Bit          
TASC3.CH3MAX           0   Channel 3 Maximum Duty Cycle Bit
TACH3H                0x0030     Timer A Channel 3 Register High
TACH3L                0x0031     Timer A Channel 3 Register Low
TBSC2                 0x0032     Timer B Channel 2 Status and Control Register
TBSC2.CH2F             7   Channel 2 Flag Bit              
TBSC2.CH2IE            6   Channel 2 Interrupt Enable Bit  
TBSC2.MS2B             5   Mode Select Bit B               
TBSC2.MS2A             4   Mode Select Bit A               
TBSC2.ELS2B            3   Edge/Level Select Bits          
TBSC2.ELS2A            2   Edge/Level Select Bits          
TBSC2.TOV2             1   Toggle-On-Overflow Bit          
TBSC2.CH2MAX           0   Channel 2 Maximum Duty Cycle Bit
TBCH2H                0x0033     Timer B Channel 2 Register High
TBCH2L                0x0034     Timer B Channel 2 Register Low
TBSC3                 0x0035     Timer B Channel 3 Status and Control Register
TBSC3.CH3F             7   Channel 3 Flag Bit              
TBSC3.CH3IE            6   Channel 3 Interrupt Enable Bit  
TBSC3.MS3A             4   Mode Select Bit A               
TBSC3.ELS3B            3   Edge/Level Select Bits          
TBSC3.ELS3A            2   Edge/Level Select Bits          
TBSC3.TOV3             1   Toggle-On-Overflow Bit          
TBSC3.CH3MAX           0   Channel 3 Maximum Duty Cycle Bit
TACH3H                0x0036     Timer B Channel 3 Register High
TBCH3L                0x0037     Timer B Channel 3 Register Low
ADSCR                 0x0038     Analog-to-Digital Status and Control Register
ADSCR.COCO             7   Conversions Complete
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADR                   0x0039     Analog-to-Digital Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADCLK                 0x003A     Analog-to-Digital Clock Register
ADCLK.ADIV2            7   ADC Clock Prescaler Bits 2
ADCLK.ADIV1            6   ADC Clock Prescaler Bits 1
ADCLK.ADIV0            5   ADC Clock Prescaler Bits 0
ADCLK.ADICLK           4   ADC Input Clock Select Bit
RESERV003B            0x003B     RESERVED
RESERV003C            0x003C     RESERVED
PTDPUE                0x003D     Port D Input Pullup Enable Register
PTDPUE.PTDPUE7         7   Port D Input Pullup Enable Bits 7
PTDPUE.PTDPUE6         6   Port D Input Pullup Enable Bits 6
PTDPUE.PTDPUE5         5   Port D Input Pullup Enable Bits 5
PTDPUE.PTDPUE4         4   Port D Input Pullup Enable Bits 4
PTDPUE.PTDPUE3         3   Port D Input Pullup Enable Bits 3
PTDPUE.PTDPUE2         2   Port D Input Pullup Enable Bits 2
PTDPUE.PTDPUE1         1   Port D Input Pullup Enable Bits 1
PTDPUE.PTDPUE0         0   Port D Input Pullup Enable Bits 0
PTFPUE                0x003E     Port F Input Pullup Enable Register
PTFPUE.PTFPUE7         7   Port F Input Pullup Enable Bits 7
PTFPUE.PTFPUE6         6   Port F Input Pullup Enable Bits 6
PTFPUE.PTFPUE5         5   Port F Input Pullup Enable Bits 5
PTFPUE.PTFPUE4         4   Port F Input Pullup Enable Bits 4
PTFPUE.PTFPUE3         3   Port F Input Pullup Enable Bits 3
PTFPUE.PTFPUE2         2   Port F Input Pullup Enable Bits 2
PTFPUE.PTFPUE1         1   Port F Input Pullup Enable Bits 1
PTFPUE.PTFPUE0         0   Port F Input Pullup Enable Bits 0
CONFIG2               0x003F     Configuration Register 2
CONFIG2.EEDIVCLK       6   EEPROM Timebase Divider Clock Select Bit
TBSC                  0x0040     Timer B Status and Control Register
TBSC.TOF               7   TIMB Overflow Flag Bit
TBSC.TOIE              6   TIMB Overflow Interrupt Enable Bit
TBSC.TSTOP             5   TIMB Stop Bit
TBSC.TRST              4   TIMB Reset Bit
TBSC.PS2               2   Prescaler Select Bits 2
TBSC.PS1               1   Prescaler Select Bits 1
TBSC.PS0               0   Prescaler Select Bits 0
TBCNTH                0x0041     Timer B Counter Register High
TBCNTL                0x0042     Timer B Counter Register Low
TBMODH                0x0043     Timer B Counter Modulo Register High
TBMODL                0x0044     Timer B Counter Modulo Register Low
TBSC0                 0x0045     Timer B Channel 0 Status and Control Register
TBSC0.CH0F             7   Channel 0 Flag Bit              
TBSC0.CH0IE            6   Channel 0 Interrupt Enable Bit  
TBSC0.MS0B             5   Mode Select Bit B               
TBSC0.MS0A             4   Mode Select Bit A               
TBSC0.ELS0B            3   Edge/Level Select Bits          
TBSC0.ELS0A            2   Edge/Level Select Bits          
TBSC0.TOV0             1   Toggle-On-Overflow Bit          
TBSC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TBCH0H                0x0046     Timer B Channel 0 Register High
TBCH0L                0x0047     Timer B Channel 0 Register Low
TBSC1                 0x0048     Timer B Channel 1 Status and Control Register
TBSC1.CH1F             7   Channel 1 Flag Bit              
TBSC1.CH1IE            6   Channel 1 Interrupt Enable Bit  
TBSC1.MS1A             4   Mode Select Bit A               
TBSC1.ELS1B            3   Edge/Level Select Bits          
TBSC1.ELS1A            2   Edge/Level Select Bits          
TBSC1.TOV1             1   Toggle-On-Overflow Bit          
TBSC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TBCH1H                0x0049     Timer B Channel 1 Register High
TBCH1L                0x004A     Timer B Channel 1 Register Low
PSC                   0x004B     PIT Status and Control Register
PSC.POF                7   PIT Overflow Flag Bit
PSC.POIE               6   PIT Overflow Interrupt Enable Bit
PSC.PSTOP              5   PIT Stop Bit
PSC.PRST               4   PIT Reset Bit
PSC.PPS2               2   PIT Prescaler Select Bits 2
PSC.PPS1               1   PIT Prescaler Select Bits 1
PSC.PPS0               0   PIT Prescaler Select Bits 0
PCNTH                 0x004C     PIT Counter Register High
PCNTL                 0x004D     PIT Counter Register Low
PMODH                 0x004E     PIT Counter Modulo Register High
PMODL                 0x004F     PIT Counter Modulo Register Low
SBSR                  0xFE00     SIM Break Status Register
SBSR.SBSW              1   SIM Break STOP/WAIT
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Bit
SRSR.PIN               6   External Reset Bit
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit (opcode fetches only)
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
RESERVFE02            0xFE02     RESERVED
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
RESERVFE04            0xFE04     RESERVED
RESERVFE05            0xFE05     RESERVED
RESERVFE06            0xFE06     RESERVED
RESERVFE07            0xFE07     RESERVED
FLCR                  0xFE08     FLASH Control Register
FLCR.HVEN              3   High-Voltage Enable Bit
FLCR.MASS              2   Mass Erase Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
RESERVFE09            0xFE09     RESERVED
RESERVFE0A            0xFE0A     RESERVED
RESERVFE0B            0xFE0B     RESERVED
BRKH                  0xFE0C     Break Address Register High
BRKL                  0xFE0D     Break Address Register Low
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
LVISR                 0xFE0F     Low-Voltage Inhibit Status Register
LVISR.LVIOUT           7   LVI Output Bit
EEDIVHNVR             0xFE10     EEDIV Non-volatile Register High
EEDIVHNVR.EEDIVSECD    7   EEPROM Divider Security Disable
EEDIVHNVR.EEDIV10      2   EEPROM Timebase Prescaler 10   
EEDIVHNVR.EEDIV9       1   EEPROM Timebase Prescaler 9    
EEDIVHNVR.EEDIV8       0   EEPROM Timebase Prescaler 8    
EEDIVLNVR             0xFE11     EEDIV Non-volatile Register Low
EEDIVLNVR.EEDIV7       7   EEPROM Timebase Prescaler 7
EEDIVLNVR.EEDIV6       6   EEPROM Timebase Prescaler 6
EEDIVLNVR.EEDIV5       5   EEPROM Timebase Prescaler 5
EEDIVLNVR.EEDIV4       4   EEPROM Timebase Prescaler 4
EEDIVLNVR.EEDIV3       3   EEPROM Timebase Prescaler 3
EEDIVLNVR.EEDIV2       2   EEPROM Timebase Prescaler 2
EEDIVLNVR.EEDIV1       1   EEPROM Timebase Prescaler 1
EEDIVLNVR.EEDIV0       0   EEPROM Timebase Prescaler 0
EEDIVH                0xFE1A     EE Divider Register High
EEDIVH.EEDIVSECD       7   EEPROM Divider Security Disable
EEDIVH.EEDIV10         2   EEPROM Timebase Prescaler 10
EEDIVH.EEDIV9          1   EEPROM Timebase Prescaler 9
EEDIVH.EEDIV8          0   EEPROM Timebase Prescaler 8
EEDIVL                0xFE1B     EE Divider Register Low
EEDIVL.EEDIV7          7   EEPROM Timebase Prescaler 7
EEDIVL.EEDIV6          6   EEPROM Timebase Prescaler 6
EEDIVL.EEDIV5          5   EEPROM Timebase Prescaler 5
EEDIVL.EEDIV4          4   EEPROM Timebase Prescaler 4
EEDIVL.EEDIV3          3   EEPROM Timebase Prescaler 3
EEDIVL.EEDIV2          2   EEPROM Timebase Prescaler 2
EEDIVL.EEDIV1          1   EEPROM Timebase Prescaler 1
EEDIVL.EEDIV0          0   EEPROM Timebase Prescaler 0
EENVR                 0xFE1C     EEPROM Non-volatile Register
EENVR.CON3             7
EENVR.CON2             6
EENVR.CON1             5
EENVR.EEPRTCT          4   EEPROM Protection Bit        
EENVR.EEBP3            3   EEPROM Block Protection Bit 3
EENVR.EEBP2            2   EEPROM Block Protection Bit 2
EENVR.EEBP1            1   EEPROM Block Protection Bit 1
EENVR.EEBP0            0   EEPROM Block Protection Bit 0
EECR                  0xFE1D     EEPROM Control Register
EECR.EEDUM             7   Dummy Bit
EECR.EEOFF             5   EEPROM Power-Off
EECR.EERAS1            4   Erase/Program Mode Select Bits 1
EECR.EERAS0            3   Erase/Program Mode Select Bits 0
EECR.EELAT             2   EEPROM Latch Control
EECR.AUTO              1   Automatic termination of program/erase cycle
EECR.EEPGM             0   EEPROM Program/Erase Enable
RESERVFE1E            0xFE1E     RESERVED
EEACR                 0xFE1F     EEPROM Array Configuration Register
EEACR.CON3             7
EEACR.CON2             6
EEACR.CON1             5
EEACR.EEPRTCT          4   EEPROM Protection Bit
EEACR.EEBP3            3   EEPROM Block Protection Bits 3
EEACR.EEBP2            2   EEPROM Block Protection Bits 2
EEACR.EEBP1            1   EEPROM Block Protection Bits 1
EEACR.EEBP0            0   EEPROM Block Protection Bits 0
FLBPR                 0xFF7E     FLASH Block Protect Register
FLBPR.BPR7             7   FLASH Block Protect Bits 7
FLBPR.BPR6             6   FLASH Block Protect Bits 6
FLBPR.BPR5             5   FLASH Block Protect Bits 5
FLBPR.BPR4             4   FLASH Block Protect Bits 4
FLBPR.BPR3             3   FLASH Block Protect Bits 3
FLBPR.BPR2             2   FLASH Block Protect Bits 2
FLBPR.BPR1             1   FLASH Block Protect Bits 1
FLBPR.BPR0             0   FLASH Block Protect Bits 0
RESERVFFDA            0xFFDA     RESERVED
RESERVFFDB            0xFFDB     RESERVED
RESERVFFDC            0xFFDC     RESERVED
RESERVFFDD            0xFFDD     RESERVED
COPCTL                0xFFFF     COP Control Register


.68HC908AS32A
; http://

; MEMORY MAP

; Interrupt and reset vector assignments

; INPUT/ OUTPUT PORTS



.68HC908AS60
; MC68HC908AS60/D  http://
; MC68HC908AS60.pdf

; 60 Kbytes of FLASH EEPROM
; 2048 bytes of RAM
; 1024 bytes of EEPROM with protect option
; 38 bytes of user-defined vectors
; 224 bytes of monitor ROM


; MEMORY MAP
area DATA FSR		   0x0000:0x0040
area BSS  UNIMPLEMENTED	   0x0040:0x004B
area DATA FSR_1		   0x004B:0x0050
area DATA RAM_1		   0x0050:0x0450
area DATA FLASH_2	   0x0450:0x0600
area DATA EEPROM_2	   0x0600:0x0800
area DATA EEPROM_1	   0x0800:0x0A00
area DATA RAM_2		   0x0A00:0x0E00
area DATA FLASH_2	   0x0E00:0x8000
area DATA FLASH_1	   0x8000:0xFE00
area DATA FSR_2		   0xFE00:0xFE20
area DATA MONITOR_ROM	   0xFE20:0xFF00
area BSS  UNIMPLEMENTED	   0xFF00:0xFF80
area DATA FSR_3		   0xFF80:0xFF82
area BSS  RESERVED	   0xFF82:0xFFDA
area DATA USER_VEC	   0xFFDA:0x10000


; Interrupt and reset vector assignments
interrupt __RESET     0xFFFE       Reset vector
interrupt SWI         0xFFFC       SWI vector
interrupt IRQ1        0xFFFA       IRQ1 vector
interrupt PLL         0xFFF8       PLL vector
interrupt TIM_A_CH0   0xFFF6       TIM A channel 0 vector
interrupt TIM_A_CH1   0xFFF4       TIM A channel 1 vector
interrupt TIM_A_CH2   0xFFF2       TIM A channel 2 vector
interrupt TIM_A_CH3   0xFFF0       TIM A channel 3 vector
interrupt TIM_A_CH4   0xFFEE       TIM A channel 4 vector
interrupt TIM_A_CH5   0xFFEC       TIM A channel 5 vector
interrupt TIM_A       0xFFEA       TIM A overflow vector
interrupt SPI_R       0xFFE8       SPI receive vector
interrupt SPI_T       0xFFE6       SPI transmit vector
interrupt SCI_E       0xFFE4       SCI error vector
interrupt SCI_R       0xFFE2       SCI receive vector
interrupt SCI_T       0xFFE0       SCI transmit vector
interrupt ADC         0xFFDE       ADC vector
interrupt BDLC        0xFFDC       BDLC vector
interrupt TIM         0xFFDA       TIM vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bit 7
PTA.PTA6               6   Port A Data Bit 6
PTA.PTA5               5   Port A Data Bit 5
PTA.PTA4               4   Port A Data Bit 4
PTA.PTA3               3   Port A Data Bit 3
PTA.PTA2               2   Port A Data Bit 2
PTA.PTA1               1   Port A Data Bit 1
PTA.PTA0               0   Port A Data Bit 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bit 7
PTB.PTB6               6   Port B Data Bit 6
PTB.PTB5               5   Port B Data Bit 5
PTB.PTB4               4   Port B Data Bit 4
PTB.PTB3               3   Port B Data Bit 3
PTB.PTB2               2   Port B Data Bit 2
PTB.PTB1               1   Port B Data Bit 1
PTB.PTB0               0   Port B Data Bit 0
PTC                   0x0002     Port C Data Register
PTC.PTC5               5   Port C Data Bit 5
PTC.PTC4               4   Port C Data Bit 4
PTC.PTC3               3   Port C Data Bit 3
PTC.PTC2               2   Port C Data Bit 2
PTC.PTC1               1   Port C Data Bit 1
PTC.PTC0               0   Port C Data Bit 0
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bit 7
PTD.PTD6               6   Port D Data Bit 6
PTD.PTD5               5   Port D Data Bit 5
PTD.PTD4               4   Port D Data Bit 4
PTD.PTD3               3   Port D Data Bit 3
PTD.PTD2               2   Port D Data Bit 2
PTD.PTD1               1   Port D Data Bit 1
PTD.PTD0               0   Port D Data Bit 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bit 7
DDRA.DDRA6             6   Data Direction Register A Bit 6
DDRA.DDRA5             5   Data Direction Register A Bit 5
DDRA.DDRA4             4   Data Direction Register A Bit 4
DDRA.DDRA3             3   Data Direction Register A Bit 3
DDRA.DDRA2             2   Data Direction Register A Bit 2
DDRA.DDRA1             1   Data Direction Register A Bit 1
DDRA.DDRA0             0   Data Direction Register A Bit 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bit 7
DDRB.DDRB6             6   Data Direction Register B Bit 6
DDRB.DDRB5             5   Data Direction Register B Bit 5
DDRB.DDRB4             4   Data Direction Register B Bit 4
DDRB.DDRB3             3   Data Direction Register B Bit 3
DDRB.DDRB2             2   Data Direction Register B Bit 2
DDRB.DDRB1             1   Data Direction Register B Bit 1
DDRB.DDRB0             0   Data Direction Register B Bit 0
DDRC                  0x0006     Data Direction Register C
DDRC.MCLKEN            7   MCLK Enable Bit
DDRC.DDRC5             5   Data Direction Register C Bit 5
DDRC.DDRC4             4   Data Direction Register C Bit 4
DDRC.DDRC3             3   Data Direction Register C Bit 3
DDRC.DDRC2             2   Data Direction Register C Bit 2
DDRC.DDRC1             1   Data Direction Register C Bit 1
DDRC.DDRC0             0   Data Direction Register C Bit 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bit 7
DDRD.DDRD6             6   Data Direction Register D Bit 6
DDRD.DDRD5             5   Data Direction Register D Bit 5
DDRD.DDRD4             4   Data Direction Register D Bit 4
DDRD.DDRD3             3   Data Direction Register D Bit 3
DDRD.DDRD2             2   Data Direction Register D Bit 2
DDRD.DDRD1             1   Data Direction Register D Bit 1
DDRD.DDRD0             0   Data Direction Register D Bit 0
PTE                   0x0008     Port E Data Register
PTE.PTE7               7   Port E Data Bit 7
PTE.PTE6               6   Port E Data Bit 6
PTE.PTE5               5   Port E Data Bit 5
PTE.PTE4               4   Port E Data Bit 4
PTE.PTE3               3   Port E Data Bit 3
PTE.PTE2               2   Port E Data Bit 2
PTE.PTE1               1   Port E Data Bit 1
PTE.PTE0               0   Port E Data Bit 0
PTF                   0x0009     Port F Data Register
PTF.PTF6               6   Port F Data Bit 6
PTF.PTF5               5   Port F Data Bit 5
PTF.PTF4               4   Port F Data Bit 4
PTF.PTF3               3   Port F Data Bit 3
PTF.PTF2               2   Port F Data Bit 2
PTF.PTF1               1   Port F Data Bit 1
PTF.PTF0               0   Port F Data Bit 0
PTG                   0x000A     Port G Data Register
PTG.PTG2               2   Port G Data Bit 2
PTG.PTG1               1   Port G Data Bit 1
PTG.PTG0               0   Port G Data Bit 0
PTH                   0x000B     Port H Data Register
PTH.PTH1               1   Port H Data Bit 1
PTH.PTH0               0   Port H Data Bit 0
DDRE                  0x000C     Data Direction Register E
DDRE.DDRE7             7   Data Direction Register E Bit 7
DDRE.DDRE6             6   Data Direction Register E Bit 6
DDRE.DDRE5             5   Data Direction Register E Bit 5
DDRE.DDRE4             4   Data Direction Register E Bit 4
DDRE.DDRE3             3   Data Direction Register E Bit 3
DDRE.DDRE2             2   Data Direction Register E Bit 2
DDRE.DDRE1             1   Data Direction Register E Bit 1
DDRE.DDRE0             0   Data Direction Register E Bit 0
DDRF                  0x000D     Data Direction Register F
DDRF.DDRF6             6   Data Direction Register F Bit 6
DDRF.DDRF5             5   Data Direction Register F Bit 5
DDRF.DDRF4             4   Data Direction Register F Bit 4
DDRF.DDRF3             3   Data Direction Register F Bit 3
DDRF.DDRF2             2   Data Direction Register F Bit 2
DDRF.DDRF1             1   Data Direction Register F Bit 1
DDRF.DDRF0             0   Data Direction Register F Bit 0
DDRG                  0x000E     Data Direction Register G
DDRG.DDRG2             2   Data Direction Register G Bit 2
DDRG.DDRG1             1   Data Direction Register G Bit 1
DDRG.DDRG0             0   Data Direction Register G Bit 0
DDRH                  0x000F     Data Direction Register H
DDRH.DDRH1             1   Data Direction Register H Bit 1
DDRH.DDRH0             0   Data Direction Register H Bit 0
SPCR                  0x0010     SPI Control Register
SPCR.SPRIE             7   SPI Receiver Interrupt Enable Bit
SPCR.SPMSTR            5   SPI Master Bit
SPCR.CPOL              4   Clock Polarity Bit
SPCR.CPHA              3   Clock Phase Bit
SPCR.SPWOM             2   SPI Wired-OR Mode Bit
SPCR.SPE               1   SPI Enable Bit
SPCR.SPTIE             0   SPI Transmit Interrupt Enable Bit
SPSCR                 0x0011     SPI Status and Control Register
SPSCR.SPRF             7   SPI Receiver Full Bit
SPSCR.ERRIE            6   Error Interrupt Enable Bit
SPSCR.OVRF             5   Overflow Bit
SPSCR.MODF             4   Mode Fault Bit
SPSCR.SPTE             3   SPI Transmitter Empty Bit
SPSCR.MODFEN           2   Mode Fault Enable Bit
SPSCR.SPR1             1   SPI Baud Rate Select Bits 1
SPSCR.SPR0             0   SPI Baud Rate Select Bits 0
SPDR                  0x0012     SPI Data Register
SPDR.R7_T7             7   Receive/Transmit Data Bits 7
SPDR.R6_T6             6   Receive/Transmit Data Bits 6
SPDR.R5_T5             5   Receive/Transmit Data Bits 5
SPDR.R4_T4             4   Receive/Transmit Data Bits 4
SPDR.R3_T3             3   Receive/Transmit Data Bits 3
SPDR.R2_T2             2   Receive/Transmit Data Bits 2
SPDR.R1_T1             1   Receive/Transmit Data Bits 1
SPDR.R0_T0             0   Receive/Transmit Data Bits 0
SCC1                  0x0013     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit
SCC1.ENSCI             6   Enable SCI Bit
SCC1.TXINV             5   Transmit Inversion Bit
SCC1.M                 4   Mode (Character Length) Bit
SCC1.WAKE              3   Wakeup Condition Bit
SCC1.ILTY              2   Idle Line Type Bit
SCC1.PEN               1   Parity Enable Bit
SCC1.PTY               0   Parity Bit
SCC2                  0x0014     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit
SCC2.ILIE              4   Idle Line Interrupt Enable Bit
SCC2.TE                3   Transmitter Enable Bit
SCC2.RE                2   Receiver Enable Bit
SCC2.RWU               1   Receiver Wakeup Bit
SCC2.SBK               0   Send Break Bit
SCC3                  0x0015     SCI Control Register 3
SCC3.R8                7   Received Bit 8
SCC3.T8                6   Transmitted Bit 8
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit
SCS1                  0x0016     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit
SCS1.TC                6   Transmission Complete Bit
SCS1.SCRF              5   SCI Receiver Full Bit
SCS1.IDLE              4   Receiver Idle Bit
SCS1.OR                3   Receiver Overrun Bit
SCS1.NF                2   Receiver Noise Flag Bit
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit
SCS2                  0x0017     SCI Status Register 2
SCS2.BKF               1   Break Flag Bit
SCS2.RPF               0   Reception-in-Progress Flag Bit
SCDR                  0x0018     SCI Data Register
SCDR.R7_T7             7   Receive/Transmit Data Bits 7
SCDR.R6_T6             6   Receive/Transmit Data Bits 6
SCDR.R5_T5             5   Receive/Transmit Data Bits 5
SCDR.R4_T4             4   Receive/Transmit Data Bits 4
SCDR.R3_T3             3   Receive/Transmit Data Bits 3
SCDR.R2_T2             2   Receive/Transmit Data Bits 2
SCDR.R1_T1             1   Receive/Transmit Data Bits 1
SCDR.R0_T0             0   Receive/Transmit Data Bits 0
SCBR                  0x0019     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2
SCBR.SCR1              1   SCI Baud Rate Select Bits 1
SCBR.SCR0              0   SCI Baud Rate Select Bits 0
ISCR                  0x001A     IRQ Status and Control Register
ISCR.IRQF1             3   IRQ1 Flag Bit
ISCR.ACK1              2   IRQ1 Interrupt Request Acknowledge Bit
ISCR.IMASK1            1   IRQ1 Interrupt Mask Bit
ISCR.MODE1             0   IRQ1 Edge/Level Select Bit
UNUSED001B            0x001B     UNUSED
PCTL                  0x001C     PLL Control Register
PCTL.PLLIE             7   PLL Interrupt Enable Bit
PCTL.PLLF              6   PLL Flag Bit
PCTL.PLLON             5   PLL On Bit
PCTL.BCS               4   Base Clock Select Bit
PBWC                  0x001D     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               5   Acquisition Mode Bit
PBWC.XLD               4   Crystal Loss Detect Bit
PPG                   0x001E     PLL Programming Register
PPG.MUL7               7   Multiplier Select Bits 7
PPG.MUL6               6   Multiplier Select Bits 6
PPG.MUL5               5   Multiplier Select Bits 5
PPG.MUL4               4   Multiplier Select Bits 4
PPG.VRS7               3   VCO Range Select Bits 7
PPG.VRS6               2   VCO Range Select Bits 6
PPG.VRS5               1   VCO Range Select Bits 5
PPG.VRS4               0   VCO Range Select Bits 4
CONFIG1               0x001F     Configuration Write-Once Register
CONFIG1.LVISTOP        7   LVI Stop Mode Enable Bit
CONFIG1.LVIRST         5   LVI Reset Enable Bit
CONFIG1.LVIPWR         4   LVI Power Enable Bit
CONFIG1.SSREC          3   Short Stop Recovery Bit
CONFIG1.COPL           2   COP Long Timeout Bit
CONFIG1.STOP           1   STOP Instruction Enable Bit
CONFIG1.COPD           0   COP Disable Bit
TASC                  0x0020     Timer A Status and Control Register
TASC.TOF               7   TIMA Overflow Flag Bit
TASC.TOIE              6   TIMA Overflow Interrupt Enable Bit
TASC.TSTOP             5   TIMA Stop Bit
TASC.TRST              4   TIMA Reset Bit
TASC.PS2               2   Prescaler Select Bits 2
TASC.PS1               1   Prescaler Select Bits 1
TASC.PS0               0   Prescaler Select Bits 0
UNUSED0021            0x0021     UNUSED
TACNTH                0x0022     Timer A Counter Register High
TACNTL                0x0023     Timer A Counter Register Low
TAMODH                0x0024     Timer A Modulo Register High
TAMODL                0x0025     Timer A Modulo Register Low
TASC0                 0x0026     Timer A Channel 0 Status and Control Register
TASC0.CH0F             7   Channel 0 Flag Bit
TASC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TASC0.MS0B             5   Mode Select Bit B
TASC0.MS0A             4   Mode Select Bit A
TASC0.ELS0B            3   Edge/Level Select Bits
TASC0.ELS0A            2   Edge/Level Select Bits
TASC0.TOV0             1   Toggle-On-Overflow Bit
TASC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TACH0H                0x0027     Timer A Channel 0 Register High
TACH0L                0x0028     Timer A Channel 0 Register Low
TASC1                 0x0029     Timer A Channel 1 Status and Control Register
TASC1.CH1F             7   Channel 1 Flag Bit            
TASC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TASC1.MS1A             4   Mode Select Bit A               
TASC1.ELS1B            3   Edge/Level Select Bits          
TASC1.ELS1A            2   Edge/Level Select Bits          
TASC1.TOV1             1   Toggle-On-Overflow Bit          
TASC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TACH1H                0x002A     Timer A Channel 1 Register High
TACH1L                0x002B     Timer A Channel 1 Register Low
TASC2                 0x002C     Timer A Channel 2 Status and Control Register
TASC2.CH2F             7   Channel 2 Flag Bit              
TASC2.CH2IE            6   Channel 2 Interrupt Enable Bit  
TASC2.MS2B             5   Mode Select Bit B               
TASC2.MS2A             4   Mode Select Bit A               
TASC2.ELS2B            3   Edge/Level Select Bits          
TASC2.ELS2A            2   Edge/Level Select Bits          
TASC2.TOV2             1   Toggle-On-Overflow Bit          
TASC2.CH2MAX           0   Channel 2 Maximum Duty Cycle Bit
TACH2H                0x002D     Timer A Channel 2 Register High
TACH2L                0x002E     Timer A Channel 2 Register Low
TASC3                 0x002F     Timer A Channel 3 Status and Control Register
TASC3.CH3F             7   Channel 3 Flag Bit              
TASC3.CH3IE            6   Channel 3 Interrupt Enable Bit  
TASC3.MS3A             4   Mode Select Bit A               
TASC3.ELS3B            3   Edge/Level Select Bits          
TASC3.ELS3A            2   Edge/Level Select Bits          
TASC3.TOV3             1   Toggle-On-Overflow Bit          
TASC3.CH3MAX           0   Channel 3 Maximum Duty Cycle Bit
TACH3H                0x0030     Timer A Channel 3 Register High
TACH3L                0x0031     Timer A Channel 3 Register Low
TASC4                 0x0032     Timer A Channel 4 Status and Control Register
TASC4.CH4F             7   Channel 4 Flag Bit              
TASC4.CH4IE            6   Channel 4 Interrupt Enable Bit  
TASC4.MS4B             5   Mode Select Bit B               
TASC4.MS4A             4   Mode Select Bit A               
TASC4.ELS4B            3   Edge/Level Select Bits          
TASC4.ELS4A            2   Edge/Level Select Bits          
TASC4.TOV4             1   Toggle-On-Overflow Bit          
TASC4.CH4MAX           0   Channel 4 Maximum Duty Cycle Bit
TACH4H                0x0033     Timer A Channel 4 Register High
TACH4L                0x0034     Timer A Channel 4 Register Low
TASC5                 0x0035     Timer A Channel 5 Status and Control Register
TASC5.CH5F             7   Channel 5 Flag Bit              
TASC5.CH5IE            6   Channel 5 Interrupt Enable Bit  
TASC5.MS5A             4   Mode Select Bit A               
TASC5.ELS5B            3   Edge/Level Select Bits          
TASC5.ELS5A            2   Edge/Level Select Bits          
TASC5.TOV5             1   Toggle-On-Overflow Bit          
TASC5.CH5MAX           0   Channel 5 Maximum Duty Cycle Bit
TACH5H                0x0036     Timer A Channel 5 Register High
TACH5L                0x0037     Timer A Channel 5 Register Low
ADSCR                 0x0038     Analog-to-Digital Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADR                   0x0039     Analog-to-Digital Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADICLK                0x003A     Analog-to-Digital Input Clock Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bits 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bits 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bits 0
ADICLK.ADICLK          4   ADC Input Clock Register Bit
BARD                  0x003B     BDLC Analog and Roundtrip Delay Register
BARD.ATE               7   Analog Transceiver Enable Bit
BARD.RXPOL             6   Receive Pin Polarity Bit
BARD.BO3               3   BARD Offset Bits 3
BARD.BO2               2   BARD Offset Bits 2
BARD.BO1               1   BARD Offset Bits 1
BARD.BO0               0   BARD Offset Bits 0
BCR1                  0x003C     BDLC Control Register 1
BCR1.IMSG              7   Ignore Message Bit
BCR1.CLKS              6   Clock Bit
BCR1.R1                5   Rate Select Bits 1
BCR1.R0                4   Rate Select Bits 0
BCR1.IE                1   Interrupt Enable Bit
BCR1.WCM               0   Wait Clock Mode Bit
BCR2                  0x003D     BDLC Control Register 2
BCR2.ALOOP             7   Analog Loopback Mode Bit
BCR2.DLOOP             6   Digital Loopback Mode Bit
BCR2.RX4XE             5   Receive 4X Enable Bit
BCR2.NBFS              4   Normalization Bit Format Select Bit
BCR2.TEOD              3   Transmit End-of-Data Bit
BCR2.TSIFR             2   Transmit In-Frame Response
BCR2.TMIFR1            1   Transmit In-Frame Response 1
BCR2.TMIFR0            0   Transmit In-Frame Response 0
BSVR                  0x003E     BDLC State Vector Register
BSVR.I3                5   Interrupt Source Bit 3
BSVR.I2                4   Interrupt Source Bit 2
BSVR.I1                3   Interrupt Source Bit 1
BSVR.I0                2   Interrupt Source Bit 0
BDR                   0x003F     BDLC Data Register
BDR.BD7                7
BDR.BD6                6
BDR.BD5                5
BDR.BD4                4
BDR.BD3                3
BDR.BD2                2
BDR.BD1                1
BDR.BD0                0
UNUSED0040            0x0040     UNUSED
UNUSED0041            0x0041     UNUSED
TSC                   0x004B     TIM Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
TCNTH                 0x004C     TIM Counter Register High
TCNTL                 0x004D     TIM Counter Register Low
TMODH                 0x004E     TIM Modulo Register High
TMODL                 0x004F     TIM Modulo Register Low
SBSR                  0xFE00     SIM Break Status Register
SBSR.SBSW              1   SIM Break Stop/Wait
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Bit
SRSR.PIN               6   External Reset Bit
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit (opcode fetches only)
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
ReservFE09            0xFE09     RESERVED
FLCR1                 0xFE0B     FLASH-1 Control Register
FLCR1.FDIV1            7   Frequency Divide Control Bit
FLCR1.FDIV0            6   Frequency Divide Control Bit
FLCR1.BLK1             5   Block Erase Control Bit 1
FLCR1.BLK0             4   Block Erase Control Bit 0
FLCR1.HVEN             3   High-Voltage Enable Bit
FLCR1.MARGIN           2   Margin Read Control Bit
FLCR1.ERASE            1   Erase Control Bit
FLCR1.PGM              0   Program Control Bit
BRKH                  0xFE0C     Break Address Register High
BRKL                  0xFE0D     Break Address Register Low
BSCR                  0xFE0E     Break Status and Control Register
BSCR.BRKE              7   Break Enable Bit
BSCR.BRKA              6   Break Active Bit
LVISR                 0xFE0F     LVI Status Register
LVISR.LVIOUT           7   LVI Output Bit
FLCR2                 0xFE11     FLASH-2 Control Register
FLCR2.FDIV1            7   Frequency Divide Control Bit 1
FLCR2.FDIV0            6   Frequency Divide Control Bit 0
FLCR2.BLK1             5   Block Erase Control Bit 1
FLCR2.BLK0             4   Block Erase Control Bit 0
FLCR2.HVEN             3   High-Voltage Enable Bit
FLCR2.MARGIN           2   Margin Read Control Bit
FLCR2.ERASE            1   Erase Control Bit
FLCR2.PGM              0   Program Control Bit
EENVR2                0xFE18     EEPROM-2 Non-volatile Register
EENVR2.EERA            7   EEPROM Redundant Array Bit
EENVR2.CON2            6   MCU Configuration Bits 2
EENVR2.CON1            5   MCU Configuration Bits 1
EENVR2.EEPRTCT         4   EEPROM Protect Bit
EENVR2.EEBP3           3   EEPROM Block Protection Bits 3
EENVR2.EEBP2           2   EEPROM Block Protection Bits 2
EENVR2.EEBP1           1   EEPROM Block Protection Bits 1
EENVR2.EEBP0           0   EEPROM Block Protection Bits 0
EECR2                 0xFE19     EEPROM-2 Control Register
EECR2.EEBCLK           7   EEPROM Bus Clock Enable Bit
EECR2.EEOFF            5   EEPROM Power Down Bit
EECR2.EERAS1           4   Erase Bits 1
EECR2.EERAS0           3   Erase Bits 0
EECR2.EELAT            2   EEPROM Latch Control Bit
EECR2.EEPGM            0  EEPROM Program/Erase Enable Bit
ReservFE1A            0xFE1A     RESERVED
EEACR2                0xFE1B     EEPROM-2 Array Control Register
EEACR2.EERA            7   EEPROM Redundant Array Bit    
EEACR2.CON2            6   MCU Configuration Bits 2      
EEACR2.CON1            5   MCU Configuration Bits 1      
EEACR2.EEPRTCT         4   EEPROM Protect Bit            
EEACR2.EEBP3           3   EEPROM Block Protection Bits 3
EEACR2.EEBP2           2   EEPROM Block Protection Bits 2
EEACR2.EEBP1           1   EEPROM Block Protection Bits 1
EEACR2.EEBP0           0   EEPROM Block Protection Bits 0
EENVR1                0xFE1C     EEPROM-1 Non-volatile Register
EENVR1.EERA            7   EEPROM Redundant Array Bit
EENVR1.CON2            6   MCU Configuration Bits 2
EENVR1.CON1            5   MCU Configuration Bits 1
EENVR1.EEPRTCT         4   EEPROM Protection Bit
EENVR1.EEBP3           3   EEPROM Block Protection Bits 3
EENVR1.EEBP2           2   EEPROM Block Protection Bits 2
EENVR1.EEBP1           1   EEPROM Block Protection Bits 1
EENVR1.EEBP0           0   EEPROM Block Protection Bits 0
EECR1                 0xFE1D     EEPROM-1 Control Register
EECR1.EEBCLK           7   EEPROM Bus Clock Enable Bit
EECR1.EEOFF            5   EEPROM Power Down Bit
EECR1.EERAS1           4   Erase Bits 1
EECR1.EERAS0           3   Erase Bits 0
EECR1.EELAT            2   EEPROM Latch Control Bit
EECR1.EEPGM            0   EEPROM Program/Erase Enable Bit
ReservFE1E            0xFE1E     RESERVED
EEACR1                0xFE1F     EEPROM-1 Array Control Register
EEACR1.EERA            7   EEPROM Redundant Array Bit    
EEACR1.CON2            6   MCU Configuration Bits 2      
EEACR1.CON1            5   MCU Configuration Bits 1      
EEACR1.EEPRTCT         4   EEPROM Protection Bit         
EEACR1.EEBP3           3   EEPROM Block Protection Bits 3
EEACR1.EEBP2           2   EEPROM Block Protection Bits 2
EEACR1.EEBP1           1   EEPROM Block Protection Bits 1
EEACR1.EEBP0           0   EEPROM Block Protection Bits 0
FLBPR1                0xFF80     FLASH-1 Block Protect Register
FLBPR1.BPR3            3   Block Protect Register Bit 3
FLBPR1.BPR2            2   Block Protect Register Bit 2
FLBPR1.BPR1            1   Block Protect Register Bit 1
FLBPR1.BPR0            0   Block Protect Register Bit 0
FLBPR2                0xFF81     FLASH-2 Block Protect Register
FLBPR2.BPR3            3   Block Protect Register Bit 3
FLBPR2.BPR2            2   Block Protect Register Bit 2
FLBPR2.BPR1            1   Block Protect Register Bit 1
FLBPR2.BPR0            0   Block Protect Register Bit 0
COPCTL                0xFFFF     COP Control Register


.68HC908AS60A
; MC68HC908AZ60A/D  http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=68HC908AS60A&nodeId=01M98634
; MC68HC908AZ60A.pdf

; 60K Bytes of FLASH EEPROM
; 2048 Bytes of RAM
; 1024 Bytes of EEPROM with Protect Option
; 52 Bytes of User-Defined Vectors
; 256 Bytes of Monitor ROM


; MEMORY MAP
area DATA FSR		   0x0000:0x0040
area BSS  UNIMPLEMENTED	   0x0040:0x004B
area DATA FSR_1		   0x004B:0x0050
area DATA RAM_1		   0x0050:0x0450
area DATA FLASH_2_1	   0x0450:0x0600
area DATA EEPROM_2	   0x0600:0x0800
area DATA EEPROM_1	   0x0800:0x0A00
area DATA RAM_2		   0x0A00:0x0E00
area DATA FLASH_2_2	   0x0E00:0x8000
area DATA FLASH_1	   0x8000:0xFE00
area DATA FSR_2		   0xFE00:0xFE20
area DATA MONITOR_ROM	   0xFE20:0xFF20
area BSS  UNIMPLEMENTED	   0xFF20:0xFF70
area DATA FSR_3		   0xFF70:0xFF89
area BSS  RESERVED	   0xFF89:0xFFCC
area DATA USER_VEC	   0xFFCC:0x10000


; Interrupt and reset vector assignments
interrupt __RESET    0xFFFE       Reset Vector
interrupt SWI        0xFFFC       SWI Vector
interrupt IRQ1       0xFFFA       IRQ1 Vector
interrupt PLL        0xFFF8       PLL Vector
interrupt TIMA_CH0   0xFFF6       TIMA Channel 0 Vector
interrupt TIMA_CH1   0xFFF4       TIMA Channel 1 Vector
interrupt TIMA_CH2   0xFFF2       TIMA Channel 2 Vector
interrupt TIMA_CH3   0xFFF0       TIMA Channel 3 Vector
interrupt TIMA_CH4   0xFFEE       TIMA Channel 4 Vector
interrupt TIMA_CH5   0xFFEC       TIMA Channel 5 Vector
interrupt TIMA       0xFFEA       TIMA Overflow Vector
interrupt SPI_R      0xFFE8       SPI Receive Vector
interrupt SPI_T      0xFFE6       SPI Transmit Vector
interrupt SCI_E      0xFFE4       SCI Error Vector
interrupt SCI_R      0xFFE2       SCI Receive Vector
interrupt SCI_T      0xFFE0       SCI Transmit Vector
interrupt ADC        0xFFDE       ADC Vector
interrupt BDLC       0xFFDC       BDLC Vector
interrupt PIT        0xFFDA       PIT Vector
interrupt KBRD       0xFFD2       Keyboard Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bits 7
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
PTC                   0x0002     Port C Data Register
PTC.PTC5               5   Port C Data Bits 5
PTC.PTC4               4   Port C Data Bits 4
PTC.PTC3               3   Port C Data Bits 3
PTC.PTC2               2   Port C Data Bits 2
PTC.PTC1               1   Port C Data Bits 1
PTC.PTC0               0   Port C Data Bits 0
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bits 7
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bits 7
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
DDRC                  0x0006     Data Direction Register C
DDRC.MCLKEN            7   MCLK Enable Bit
DDRC.DDRC5             4   Data Direction Register C Bits 4
DDRC.DDRC4             3   Data Direction Register C Bits 3
DDRC.DDRC3             2   Data Direction Register C Bits 2
DDRC.DDRC2             1   Data Direction Register C Bits 1
DDRC.DDRC1             0   Data Direction Register C Bits 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bits 7
DDRD.DDRD6             6   Data Direction Register D Bits 6
DDRD.DDRD5             5   Data Direction Register D Bits 5
DDRD.DDRD4             4   Data Direction Register D Bits 4
DDRD.DDRD3             3   Data Direction Register D Bits 3
DDRD.DDRD2             2   Data Direction Register D Bits 2
DDRD.DDRD1             1   Data Direction Register D Bits 1
DDRD.DDRD0             0   Data Direction Register D Bits 0
PTE                   0x0008     Port E Data Register
PTE.PTE7               7   Port E Data Bits 7
PTE.PTE6               6   Port E Data Bits 6
PTE.PTE5               5   Port E Data Bits 5
PTE.PTE4               4   Port E Data Bits 4
PTE.PTE3               3   Port E Data Bits 3
PTE.PTE2               2   Port E Data Bits 2
PTE.PTE1               1   Port E Data Bits 1
PTE.PTE0               0   Port E Data Bits 0
PTF                   0x0009     Port F Data Register
PTF.PTF6               6   Port F Data Bits 6
PTF.PTF5               5   Port F Data Bits 5
PTF.PTF4               4   Port F Data Bits 4
PTF.PTF3               3   Port F Data Bits 3
PTF.PTF2               2   Port F Data Bits 2
PTF.PTF1               1   Port F Data Bits 1
PTF.PTF0               0   Port F Data Bits 0
PTG                   0x000A     Port G Data Register
PTG.PTG2               2   Port G Data Bits 2
PTG.PTG1               1   Port G Data Bits 1
PTG.PTG0               0   Port G Data Bits 0
PTH                   0x000B     Port H Data Register
PTH.PTH1               1   Port H Data Bits 1
PTH.PTH0               0   Port H Data Bits 0
DDRE                  0x000C     Data Direction Register E
DDRE.DDRE7             7   Data Direction Register E Bits 7
DDRE.DDRE6             6   Data Direction Register E Bits 6
DDRE.DDRE5             5   Data Direction Register E Bits 5
DDRE.DDRE4             4   Data Direction Register E Bits 4
DDRE.DDRE3             3   Data Direction Register E Bits 3
DDRE.DDRE2             2   Data Direction Register E Bits 2
DDRE.DDRE1             1   Data Direction Register E Bits 1
DDRE.DDRE0             0   Data Direction Register E Bits 0
DDRF                  0x000D     Data Direction Register F
DDRF.DDRF6             6   Data Direction Register F Bits 6
DDRF.DDRF5             5   Data Direction Register F Bits 5
DDRF.DDRF4             4   Data Direction Register F Bits 4
DDRF.DDRF3             3   Data Direction Register F Bits 3
DDRF.DDRF2             2   Data Direction Register F Bits 2
DDRF.DDRF1             1   Data Direction Register F Bits 1
DDRF.DDRF0             0   Data Direction Register F Bits 0
DDRG                  0x000E     Data Direction Register G
DDRG.DDRG2             2   Data Direction Register G Bits 2
DDRG.DDRG1             1   Data Direction Register G Bits 1
DDRG.DDRG0             0   Data Direction Register G Bits 0
DDRH                  0x000F     Data Direction Register H
DDRH.DDRH1             1   Data Direction Register H Bits 1
DDRH.DDRH0             0   Data Direction Register H Bits 0
SPCR                  0x0010     SPI Control Register
SPCR.SPRIE             7   SPI Receiver Interrupt Enable Bit
SPCR.SPMSTR            5   SPI Master Bit
SPCR.CPOL              4   Clock Polarity Bit
SPCR.CPHA              3   Clock Phase Bit
SPCR.SPWOM             2   SPI Wired-OR Mode Bit
SPCR.SPE               1   SPI Enable Bit
SPCR.SPTIE             0   SPI Transmit Interrupt Enable Bit
SPSCR                 0x0011     SPI Status and Control Register
SPSCR.SPRF             7   SPI Receiver Full Bit
SPSCR.ERRIE            6   Error Interrupt Enable Bit
SPSCR.OVRF             5   Overflow Bit
SPSCR.MODF             4   Mode Fault Bit
SPSCR.SPTE             3   SPI Transmitter Empty Bit
SPSCR.MODFEN           2   Mode Fault Enable Bit
SPSCR.SPR1             1   SPI Baud Rate Select Bits 1
SPSCR.SPR0             0   SPI Baud Rate Select Bits 0
SPDR                  0x0012     SPI Data Register
SPDR.R7_T7             7   Receive/Transmit Data Bits 7
SPDR.R6_T6             6   Receive/Transmit Data Bits 6
SPDR.R5_T5             5   Receive/Transmit Data Bits 5
SPDR.R4_T4             4   Receive/Transmit Data Bits 4
SPDR.R3_T3             3   Receive/Transmit Data Bits 3
SPDR.R2_T2             2   Receive/Transmit Data Bits 2
SPDR.R1_T1             1   Receive/Transmit Data Bits 1
SPDR.R0_T0             0   Receive/Transmit Data Bits 0
SCC1                  0x0013     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit
SCC1.ENSCI             6   Enable SCI Bit
SCC1.TXINV             5   Transmit Inversion Bit
SCC1.M                 4   Mode (Character Length) Bit
SCC1.WAKE              3   Wakeup Condition Bit
SCC1.ILTY              2   Idle Line Type Bit
SCC1.PEN               1   Parity Enable Bit
SCC1.PTY               0   Parity Bit
SCC2                  0x0014     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit
SCC2.ILIE              4   Idle Line Interrupt Enable Bit
SCC2.TE                3   Transmitter Enable Bit
SCC2.RE                2   Receiver Enable Bit
SCC2.RWU               1   Receiver Wakeup Bit
SCC2.SBK               0   Send Break Bit
SCC3                  0x0015     SCI Control Register 3
SCC3.R8                7   Received Bit
SCC3.T8                6   Transmitted Bit
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit
SCS1                  0x0016     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit
SCS1.TC                6   Transmission Complete Bit
SCS1.SCRF              5   SCI Receiver Full Bit
SCS1.IDLE              4   Receiver Idle Bit
SCS1.OR                3   Receiver Overrun Bit
SCS1.NF                2   Receiver Noise Flag Bit
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit
SCS2                  0x0017     SCI Status Register 2
SCS2.BKF               1   Break Flag Bit
SCS2.RPF               0   Reception in Progress Flag Bit
SCDR                  0x0018     SCI Data Register
SCDR.R7_T7             7   Receive/Transmit Data Bits 7
SCDR.R6_T6             6   Receive/Transmit Data Bits 6
SCDR.R5_T5             5   Receive/Transmit Data Bits 5
SCDR.R4_T4             4   Receive/Transmit Data Bits 4
SCDR.R3_T3             3   Receive/Transmit Data Bits 3
SCDR.R2_T2             2   Receive/Transmit Data Bits 2
SCDR.R1_T1             1   Receive/Transmit Data Bits 1
SCDR.R0_T0             0   Receive/Transmit Data Bits 0
SCBR                  0x0019     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2
SCBR.SCR1              1   SCI Baud Rate Select Bits 1
SCBR.SCR0              0   SCI Baud Rate Select Bits 0
ISCR                  0x001A     IRQ Status and Control Register
ISCR.IRQF              3   IRQ Flag Bit
ISCR.ACK               2   IRQ Interrupt Request Acknowledge Bit
ISCR.IMASK             1   IRQ Interrupt Mask Bit
ISCR.MODE              0   IRQ Edge/Level Select Bit
KBSCR                 0x001B     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
PCTL                  0x001C     PLL Control Register
PCTL.PLLIE             7   PLL Interrupt Enable Bit
PCTL.PLLF              6   PLL Flag Bit
PCTL.PLLON             5   PLL On Bit
PCTL.BCS               4   Base Clock Select Bit
PBWC                  0x001D     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               5   Acquisition Mode Bit
PBWC.XLD               4   Crystal Loss Detect Bit
PPG                   0x001E     PLL Programming Register
PPG.MUL7               7   Multiplier Select Bits 7
PPG.MUL6               6   Multiplier Select Bits 6
PPG.MUL5               5   Multiplier Select Bits 5
PPG.MUL4               4   Multiplier Select Bits 4
PPG.VRS7               3   VCO Range Select Bits 7
PPG.VRS6               2   VCO Range Select Bits 6
PPG.VRS5               1   VCO Range Select Bits 5
PPG.VRS4               0   VCO Range Select Bits 4
CONFIG1               0x001F     Configuration Write-Once Register
CONFIG1.LVISTOP        7   LVI Stop Mode Enable Bit
CONFIG1.LVIRST         5   LVI Reset Enable Bit
CONFIG1.LVIPWR         4   LVI Power Enable Bit
CONFIG1.SSREC          3   Short Stop Recovery Bit
CONFIG1.COPL           2   COP Long Timeout
CONFIG1.STOP           1   STOP Instruction Enable Bit
CONFIG1.COPD           0   COP Disable Bit
TASC                  0x0020     Timer A Status and Control Register
TASC.TOF               7   TIMA Overflow Flag Bit
TASC.TOIE              6   TIMA Overflow Interrupt Enable Bit
TASC.TSTOP             5   TIMA Stop Bit
TASC.TRST              4   TIMA Reset Bit
TASC.PS2               2   Prescaler Select Bits 2
TASC.PS1               1   Prescaler Select Bits 1
TASC.PS0               0   Prescaler Select Bits 0
KBIER                 0x0021     Keyboard Interrupt Enable Register
KBIER.KBIE4            4   Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Keyboard Interrupt Enable Bits 0
TACNTH                0x0022     Timer A Counter Register High
TACNTL                0x0023     Timer A Counter Register Low
TAMODH                0x0024     Timer A Modulo Register High
TAMODL                0x0025     Timer A Modulo Register Low
TASC0                 0x0026     Timer A Channel 0 Status and Control Register
TASC0.CH0F             7   Channel 0 Flag Bit
TASC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TASC0.MS0B             5   Mode Select Bit B
TASC0.MS0A             4   Mode Select Bit A
TASC0.ELS0B            3   Edge/Level Select Bits
TASC0.ELS0A            2   Edge/Level Select Bits
TASC0.TOV0             1   Toggle-On-Overflow Bit
TASC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TACH0H                0x0027     Timer A Channel 0 Register High
TACH0L                0x0028     Timer A Channel 0 Register Low
TASC1                 0x0029     Timer A Channel 1 Status and Control Register
TASC1.CH1F             7   Channel 1 Flag Bit            
TASC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TASC1.MS1A             4   Mode Select Bit A               
TASC1.ELS1B            3   Edge/Level Select Bits          
TASC1.ELS1A            2   Edge/Level Select Bits          
TASC1.TOV1             1   Toggle-On-Overflow Bit          
TASC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TACH1H                0x002A     Timer A Channel 1 Register High
TACH1L                0x002B     Timer A Channel 1 Register Low
TASC2                 0x002C     Timer A Channel 2 Status and Control Register
TASC2.CH2F             7   Channel 2 Flag Bit              
TASC2.CH2IE            6   Channel 2 Interrupt Enable Bit  
TASC2.MS2B             5   Mode Select Bit B               
TASC2.MS2A             4   Mode Select Bit A               
TASC2.ELS2B            3   Edge/Level Select Bits          
TASC2.ELS2A            2   Edge/Level Select Bits          
TASC2.TOV2             1   Toggle-On-Overflow Bit          
TASC2.CH2MAX           0   Channel 2 Maximum Duty Cycle Bit
TACH2H                0x002D     Timer A Channel 2 Register High
TACH2L                0x002E     Timer A Channel 2 Register Low
TASC3                 0x002F     Timer A Channel 3 Status and Control Register
TASC3.CH3F             7   Channel 3 Flag Bit              
TASC3.CH3IE            6   Channel 3 Interrupt Enable Bit  
TASC3.MS3A             4   Mode Select Bit A               
TASC3.ELS3B            3   Edge/Level Select Bits          
TASC3.ELS3A            2   Edge/Level Select Bits          
TASC3.TOV3             1   Toggle-On-Overflow Bit          
TASC3.CH3MAX           0   Channel 3 Maximum Duty Cycle Bit
TACH3H                0x0030     Timer A Channel 3 Register High
TACH3L                0x0031     Timer A Channel 3 Register Low
TASC4                 0x0032     Timer A Channel 4 Status and Control Register
TASC4.CH4F             7   Channel 4 Flag Bit              
TASC4.CH4IE            6   Channel 4 Interrupt Enable Bit  
TASC4.MS4B             5   Mode Select Bit B               
TASC4.MS4A             4   Mode Select Bit A               
TASC4.ELS4B            3   Edge/Level Select Bits          
TASC4.ELS4A            2   Edge/Level Select Bits          
TASC4.TOV4             1   Toggle-On-Overflow Bit          
TASC4.CH4MAX           0   Channel 4 Maximum Duty Cycle Bit
TACH4H                0x0033     Timer A Channel 4 Register High
TACH4L                0x0034     Timer A Channel 4 Register Low
TASC5                 0x0035     Timer A Channel 5 Status and Control Register
TASC5.CH5F             7   Channel 5 Flag Bit              
TASC5.CH5IE            6   Channel 5 Interrupt Enable Bit  
TASC5.MS5A             4   Mode Select Bit A               
TASC5.ELS5B            3   Edge/Level Select Bits          
TASC5.ELS5A            2   Edge/Level Select Bits          
TASC5.TOV5             1   Toggle-On-Overflow Bit          
TASC5.CH5MAX           0   Channel 5 Maximum Duty Cycle Bit
TACH5H                0x0036     Timer A Channel 5 Register High
TACH5L                0x0037     Timer A Channel 5 Register Low
ADSCR                 0x0038     Analog-to-Digital Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADR                   0x0039     Analog-to-Digital Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADICLK                0x003A     Analog-to-Digital Input Clock Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bits 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bits 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bits 0
ADICLK.ADICLK          4   ADC Input Clock Register Bit
BARD                  0x003B     BDLC Analog and Roundtrip Delay Register
BARD.ATE               7   Analog Transceiver Enable Bit
BARD.RXPOL             6   Receive Pin Polarity Bit
BARD.BO3               3   BARD Offset Bits 3
BARD.BO2               2   BARD Offset Bits 2
BARD.BO1               1   BARD Offset Bits 1
BARD.BO0               0   BARD Offset Bits 0
BCR1                  0x003C     BDLC Control Register 1
BCR1.IMSG              7   Ignore Message Bit
BCR1.CLKS              6   Clock Bit
BCR1.R1                5   Rate Select Bits 1
BCR1.R0                4   Rate Select Bits 0
BCR1.IE                1   Interrupt Enable Bit
BCR1.WCM               0   Wait Clock Mode Bit
BCR2                  0x003D     BDLC Control Register 2
BCR2.ALOOP             7   Analog Loopback Mode Bit
BCR2.DLOOP             6   Digital Loopback Mode Bit
BCR2.RX4XE             5   Receive 4X Enable Bit
BCR2.NBFS              4   Normalization Bit Format Select Bit
BCR2.TEOD              3   Transmit End of Data Bit
BCR2.TSIFR             2   Transmit In-Frame Response Control Bits
BCR2.TMIFR1            1   Transmit In-Frame Response Control Bits 1
BCR2.TMIFR0            0   Transmit In-Frame Response Control Bits 0
BSVR                  0x003E     BDLC State Vector Register
BSVR.I3                4   Interrupt Source Bit 3
BSVR.I2                3   Interrupt Source Bit 2
BSVR.I1                2   Interrupt Source Bit 1
BSVR.I0                1   Interrupt Source Bit 0
BDR                   0x003F     BDLC Data Register
BDR.BD7                7
BDR.BD6                6
BDR.BD5                5
BDR.BD4                4
BDR.BD3                3
BDR.BD2                2
BDR.BD1                1
BDR.BD0                0
TBSCR                 0x0040     Timer B Status and Control Register
TBSCR.TOF              7   TIMB Overflow Flag Bit
TBSCR.TOIE             6   TIMB Overflow Interrupt Enable Bit
TBSCR.TSTOP            5   TIMB Stop Bit
TBSCR.TRST             4   TIMB Reset Bit
TBSCR.PS2              2   Prescaler Select Bits 2
TBSCR.PS1              1   Prescaler Select Bits 1
TBSCR.PS0              0   Prescaler Select Bits 0
TBCNTH                0x0041     Timer B Counter Register High
TBCNTL                0x0042     Timer B Counter Register Low
TBMODH                0x0043     Timer B Modulo Register High
TBMODL                0x0044     Timer B Modulo Register Low
TBSC0                 0x0045     Timer B CH0 Status and Control Register
TBSC0.CH0F             7   Channel 0 Flag Bit
TBSC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TBSC0.MS0B             5   Mode Select Bit B
TBSC0.MS0A             4   Mode Select Bit A
TBSC0.ELS0B            3   Edge/Level Select Bits B
TBSC0.ELS0A            2   Edge/Level Select Bits A
TBSC0.TOV0             1   Toggle-On-Overflow Bit
TBSC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TBCH0H                0x0046     Timer B CH0 Register High
TBCH0L                0x0047     Timer B CH0 Register Low
TBSC1                 0x0048     Timer B CH1 Status and Control Register
TBSC1.CH1F             7   Channel 1 Flag Bit            
TBSC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TBSC1.MS1A             4   Mode Select Bit A               
TBSC1.ELS1B            3   Edge/Level Select Bits B        
TBSC1.ELS1A            2   Edge/Level Select Bits A        
TBSC1.TOV1             1   Toggle-On-Overflow Bit          
TBSC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TBCH1H                0x0049     Timer B CH1 Register High
TBCH1L                0x004A     Timer B CH1 Register Low
PSC                   0x004B     PIT Status and Control Register
PSC.POF                7   PIT Overflow Flag Bit
PSC.POIE               6   PIT Overflow Interrupt Enable Bit
PSC.PSTOP              5   PIT Stop Bit
PSC.PRST               4   PIT Reset Bit
PSC.PPS2               2   Prescaler Select Bits 2
PSC.PPS1               1   Prescaler Select Bits 1
PSC.PPS0               0   Prescaler Select Bits 0
PCNTH                 0x004C     PIT Counter Register High
PCNTL                 0x004D     PIT Counter Register Low
PMODH                 0x004E     PIT Modulo Register High
PMODL                 0x004F     PIT Modulo Register Low
CMCR0                 0x0500	 Module Control Register 0
CMCR0.SYNCH            4   Synchronized Status
CMCR0.TLNKEN           3   Timer Enable
CMCR0.SLPAK            2   Sleep Mode Acknowledge
CMCR0.SLPRQ            1   Sleep Request, Go to Internal Sleep Mode
CMCR0.SFTRES           0   Soft Reset
CMCR1                 0x0501      Module Control Register 1
CMCR1.LOOPB            2   Loop Back Self-Test Mode
CMCR1.WUPM             1   Wakeup Mode
CMCR1.CLKSRC           0   Clock Source
CBTR0                 0x0502     Bus Timing Register 0
CBTR0.SJW1             7   Synchronization Jump Width 1
CBTR0.SJW0             6   Synchronization Jump Width 0
CBTR0.BRP5             5   Baud Rate Prescaler 5
CBTR0.BRP4             4   Baud Rate Prescaler 4
CBTR0.BRP3             3   Baud Rate Prescaler 3
CBTR0.BRP2             2   Baud Rate Prescaler 2
CBTR0.BRP1             1   Baud Rate Prescaler 1
CBTR0.BRP0             0   Baud Rate Prescaler 0
CBTR1                 0x0503     Bus Timing Register 1
CBTR1.SAMP             7   Sampling
CBTR1.TSEG22           6   Time Segment22
CBTR1.TSEG21           5   Time Segment21
CBTR1.TSEG20           4   Time Segment20
CBTR1.TSEG13           3   Time Segment13
CBTR1.TSEG12           2   Time Segment12
CBTR1.TSEG11           1   Time Segment11
CBTR1.TSEG10           0   Time Segment10
CRFLG                 0x0504     Receiver Flag Register
CRFLG.WUPIF            7   Wakeup Interrupt Flag
CRFLG.RWRNIF           6   Receiver Warning Interrupt Flag
CRFLG.TWRNIF           5   Transmitter Warning Interrupt Flag
CRFLG.RERRIF           4   Receiver Error Passive Interrupt Flag
CRFLG.TERRIF           3   Transmitter Error Passive Interrupt Flag
CRFLG.BOFFIF           2   Bus-Off Interrupt Flag
CRFLG.OVRIF            1   Overrun Interrupt Flag
CRFLG.RXF              0   Receive Buffer Full
CRIER                 0x0505     Receiver Interrupt Enable Register
CRIER.WUPIE            7   Wakeup Interrupt Enable
CRIER.RWRNIE           6   Receiver Warning Interrupt Enable
CRIER.TWRNIE           5   Transmitter Warning Interrupt Enable
CRIER.RERRIE           4   Receiver Error Passive Interrupt Enable
CRIER.TERRIE           3   Transmitter Error Passive Interrupt Enable
CRIER.BOFFIE           2   Bus-Off Interrupt Enable
CRIER.OVRIE            1   Overrun Interrupt Enable
CRIER.RXFIE            0   Receiver Full Interrupt Enable
CTFLG                 0x0506     Transmitter Flag Register
CTFLG.ABTAK2           6   Abort Acknowledge 2
CTFLG.ABTAK1           5   Abort Acknowledge 1
CTFLG.ABTAK0           4   Abort Acknowledge 0
CTFLG.TXE2             2   Transmitter Empty 2
CTFLG.TXE1             1   Transmitter Empty 1
CTFLG.TXE0             0   Transmitter Empty 0
CTCR                  0x0507     Transmitter Control Register
CTCR.ABTRQ2            6   Abort Request 2
CTCR.ABTRQ1            5   Abort Request 1
CTCR.ABTRQ0            4   Abort Request 0
CTCR.TXEIE2            2   Transmitter Empty Interrupt Enable 2
CTCR.TXEIE1            1   Transmitter Empty Interrupt Enable 1
CTCR.TXEIE0            0   Transmitter Empty Interrupt Enable 0
CIDAC                 0x0508     Identifier Acceptance Control Register
CIDAC.IDAM1            5   Identifier Acceptance Mode 1
CIDAC.IDAM0            4   Identifier Acceptance Mode 0
CIDAC.IDHIT1           1   Identifier Acceptance Hit Indicator 1
CIDAC.IDHIT0           0   Identifier Acceptance Hit Indicator 0
RESERV0509            0x0509     RESERVED
CRXERR                0x050E     Receiver Error Counter
CRXERR.RXERR7          7
CRXERR.RXERR6          6
CRXERR.RXERR5          5
CRXERR.RXERR4          4
CRXERR.RXERR3          3
CRXERR.RXERR2          2
CRXERR.RXERR1          1
CRXERR.RXERR0          0
CTXERR                0x050F     Transmit Error Counter
CTXERR.TXERR7          7
CTXERR.TXERR6          6
CTXERR.TXERR5          5
CTXERR.TXERR4          4
CTXERR.TXERR3          3
CTXERR.TXERR2          2
CTXERR.TXERR1          1
CTXERR.TXERR0          0
CIDAR0                0x0510     Identifier Acceptance Registers 0
CIDAR0.AC7             7   Acceptance Code Bits 7
CIDAR0.AC6             6   Acceptance Code Bits 6
CIDAR0.AC5             5   Acceptance Code Bits 5
CIDAR0.AC4             4   Acceptance Code Bits 4
CIDAR0.AC3             3   Acceptance Code Bits 3
CIDAR0.AC2             2   Acceptance Code Bits 2
CIDAR0.AC1             1   Acceptance Code Bits 1
CIDAR0.AC0             0   Acceptance Code Bits 0
CIDAR1                0x0511     Identifier Acceptance Registers 1
CIDAR1.AC7             7   Acceptance Code Bits 7
CIDAR1.AC6             6   Acceptance Code Bits 6
CIDAR1.AC5             5   Acceptance Code Bits 5
CIDAR1.AC4             4   Acceptance Code Bits 4
CIDAR1.AC3             3   Acceptance Code Bits 3
CIDAR1.AC2             2   Acceptance Code Bits 2
CIDAR1.AC1             1   Acceptance Code Bits 1
CIDAR1.AC0             0   Acceptance Code Bits 0
CIDAR2                0x0512     Identifier Acceptance Registers 2
CIDAR2.AC7             7   Acceptance Code Bits 7
CIDAR2.AC6             6   Acceptance Code Bits 6
CIDAR2.AC5             5   Acceptance Code Bits 5
CIDAR2.AC4             4   Acceptance Code Bits 4
CIDAR2.AC3             3   Acceptance Code Bits 3
CIDAR2.AC2             2   Acceptance Code Bits 2
CIDAR2.AC1             1   Acceptance Code Bits 1
CIDAR2.AC0             0   Acceptance Code Bits 0
CIDAR3                0x0513     Identifier Acceptance Registers 3
CIDAR3.AC7             7   Acceptance Code Bits 7
CIDAR3.AC6             6   Acceptance Code Bits 6
CIDAR3.AC5             5   Acceptance Code Bits 5
CIDAR3.AC4             4   Acceptance Code Bits 4
CIDAR3.AC3             3   Acceptance Code Bits 3
CIDAR3.AC2             2   Acceptance Code Bits 2
CIDAR3.AC1             1   Acceptance Code Bits 1
CIDAR3.AC0             0   Acceptance Code Bits 0
CIDMRO                0x0514     Identifier Mask Registers 0
CIDMRO.AM7             7   Acceptance Mask Bits 7
CIDMRO.AM6             6   Acceptance Mask Bits 6
CIDMRO.AM5             5   Acceptance Mask Bits 5
CIDMRO.AM4             4   Acceptance Mask Bits 4
CIDMRO.AM3             3   Acceptance Mask Bits 3
CIDMRO.AM2             2   Acceptance Mask Bits 2
CIDMRO.AM1             1   Acceptance Mask Bits 1
CIDMRO.AM0             0   Acceptance Mask Bits 0
CIDMR1                0x0515     Identifier Mask Registers 1
CIDMR1.AM7             7   Acceptance Mask Bits 7
CIDMR1.AM6             6   Acceptance Mask Bits 6
CIDMR1.AM5             5   Acceptance Mask Bits 5
CIDMR1.AM4             4   Acceptance Mask Bits 4
CIDMR1.AM3             3   Acceptance Mask Bits 3
CIDMR1.AM2             2   Acceptance Mask Bits 2
CIDMR1.AM1             1   Acceptance Mask Bits 1
CIDMR1.AM0             0   Acceptance Mask Bits 0
CIDMR2                0x0516     Identifier Mask Registers 2
CIDMR2.AM7             7   Acceptance Mask Bits 7
CIDMR2.AM6             6   Acceptance Mask Bits 6
CIDMR2.AM5             5   Acceptance Mask Bits 5
CIDMR2.AM4             4   Acceptance Mask Bits 4
CIDMR2.AM3             3   Acceptance Mask Bits 3
CIDMR2.AM2             2   Acceptance Mask Bits 2
CIDMR2.AM1             1   Acceptance Mask Bits 1
CIDMR2.AM0             0   Acceptance Mask Bits 0
CIDMR3                0x0517     Identifier Mask Registers 3
CIDMR3.AM7             7   Acceptance Mask Bits 7
CIDMR3.AM6             6   Acceptance Mask Bits 6
CIDMR3.AM5             5   Acceptance Mask Bits 5
CIDMR3.AM4             4   Acceptance Mask Bits 4
CIDMR3.AM3             3   Acceptance Mask Bits 3
CIDMR3.AM2             2   Acceptance Mask Bits 2
CIDMR3.AM1             1   Acceptance Mask Bits 1
CIDMR3.AM0             0   Acceptance Mask Bits 0
IDR0                  0x05B0     IDENTIFIER REGISTER 0
IDR0.ID28	       7
IDR0.ID27	       6
IDR0.ID26	       5
IDR0.ID25	       4
IDR0.ID24	       3
IDR0.ID23	       2 
IDR0.ID22	       1
IDR0.ID21	       0
IDR1                  0x05B1     IDENTIFIER REGISTER 1
IDR1.ID20              7
IDR1.ID19              6
IDR1.ID18              5
IDR1.SRR               4   Substitute Remote Request
IDR1.IDE               3   ID Extended
IDR1.ID17              2
IDR1.ID16              1
IDR1.ID15              0
IDR2                  0x05B2     IDENTIFIER REGISTER 2
IDR2.ID14              7
IDR2.ID13              6
IDR2.ID12              5
IDR2.ID11              4
IDR2.ID10              3
IDR2.ID9               2
IDR2.ID8               1
IDR2.ID7               0
IDR3                  0x05B3     IDENTIFIER REGISTER 3
IDR3.ID6               7
IDR3.ID5               6
IDR3.ID4               5
IDR3.ID3               4
IDR3.ID2               3
IDR3.ID1               2
IDR3.ID0               1
IDR3.RTR               0   Remote Transmission Request
DSR0                  0x05B4     DATA SEGMENT REGISTER 0
DSR0.DB7               7
DSR0.DB6               6
DSR0.DB5               5
DSR0.DB4               4
DSR0.DB3               3
DSR0.DB2               2
DSR0.DB1               1
DSR0.DB0               0
DSR1                  0x05B5     DATA SEGMENT REGISTER 1
DSR1.DB7               7
DSR1.DB6               6
DSR1.DB5               5
DSR1.DB4               4
DSR1.DB3               3
DSR1.DB2               2
DSR1.DB1               1
DSR1.DB0               0
DSR2                  0x05B6     DATA SEGMENT REGISTER 2
DSR2.DB7               7
DSR2.DB6               6
DSR2.DB5               5
DSR2.DB4               4
DSR2.DB3               3
DSR2.DB2               2
DSR2.DB1               1
DSR2.DB0               0
DSR3                  0x05B7     DATA SEGMENT REGISTER 3
DSR3.DB7               7
DSR3.DB6               6
DSR3.DB5               5
DSR3.DB4               4
DSR3.DB3               3
DSR3.DB2               2
DSR3.DB1               1
DSR3.DB0               0
DSR4                  0x05B8     DATA SEGMENT REGISTER 4
DSR4.DB7               7
DSR4.DB6               6
DSR4.DB5               5
DSR4.DB4               4
DSR4.DB3               3
DSR4.DB2               2
DSR4.DB1               1
DSR4.DB0               0
DSR5                  0x05B9     DATA SEGMENT REGISTER 5
DSR5.DB7               7
DSR5.DB6               6
DSR5.DB5               5
DSR5.DB4               4
DSR5.DB3               3
DSR5.DB2               2
DSR5.DB1               1
DSR5.DB0               0
DSR6                  0x05BA     DATA SEGMENT REGISTER 6
DSR6.DB7               7
DSR6.DB6               6
DSR6.DB5               5
DSR6.DB4               4
DSR6.DB3               3
DSR6.DB2               2
DSR6.DB1               1
DSR6.DB0               0
DSR7                  0x05BB     DATA SEGMENT REGISTER 7
DSR7.DB7               7
DSR7.DB6               6
DSR7.DB5               5
DSR7.DB4               4
DSR7.DB3               3
DSR7.DB2               2
DSR7.DB1               1
DSR7.DB0               0
DLR                   0x05BC     DATA LENGTH REGISTER
DLR.DLC3               3   Data Length Code Bits 3
DLR.DLC2               2   Data Length Code Bits 2
DLR.DLC1               1   Data Length Code Bits 1
DLR.DLC0               0   Data Length Code Bits 0
TBPR                  0x05BD     TRANSMIT BUFFER PRIORITY REGISTER
TBPR.PRIO7             7   Local Priority 7
TBPR.PRIO6             6   Local Priority 6
TBPR.PRIO5             5   Local Priority 5
TBPR.PRIO4             4   Local Priority 4
TBPR.PRIO3             3   Local Priority 3
TBPR.PRIO2             2   Local Priority 2
TBPR.PRIO1             1   Local Priority 1
TBPR.PRIO0             0   Local Priority 0
RESERV05BE            0x05BE     RESERVED
RESERV05BF            0x05BF     RESERVED
SBSR                  0xFE00     SIM Break Status Register
SBSR.BW                1   SIM Break Wait
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Bit
SRSR.PIN               6   External Reset Bit
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit (opcode fetches only)
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
FL2CR                 0xFE08     FLASH-2 Control Register
FL2CR.HVEN             3   High-Voltage Enable Bit
FL2CR.MASS             2   Mass Erase Control Bit
FL2CR.ERASE            1   Erase Control Bit
FL2CR.PGM              0   Program Control Bit
CONFIG2               0xFE09     Configuration Write-Once Register
CONFIG2.EEDIVCLK       7   EEPROM Timebase Divider Clock select bit
CONFIG2.MSCAND         4   MSCAN Disable Bit
CONFIG2.AT60A          3   Device indicator
CONFIG2.AZxx           0   AZxx Emulator Enable Bit
BRKH                  0xFE0C     Break Address Register High
BRKL                  0xFE0D     Break Address Register Low
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
LVISR                 0xFE0F     LVI Status Register
LVISR.LVIOUT           7   LVI Output Bit
EE1DIVHNVRH           0xFE10     EE1DIV Hi Non-volatile Register
EE1DIVHNVRH.EEDIVSECD  7   EEPROM-1 Divider Security Disable
EE1DIVHNVRH.EEDIV10    2   EEPROM-1 timebase prescaler 10   
EE1DIVHNVRH.EEDIV9     1   EEPROM-1 timebase prescaler 9    
EE1DIVHNVRH.EEDIV8     0   EEPROM-1 timebase prescaler 8    
EE1DIVLNVRL           0xFE11     EE1DIV Lo Non-volatile Register
EE1DIVLNVRL.EEDIV7     7   EEPROM-1 timebase prescaler 7
EE1DIVLNVRL.EEDIV6     6   EEPROM-1 timebase prescaler 6
EE1DIVLNVRL.EEDIV5     5   EEPROM-1 timebase prescaler 5
EE1DIVLNVRL.EEDIV4     4   EEPROM-1 timebase prescaler 4
EE1DIVLNVRL.EEDIV3     3   EEPROM-1 timebase prescaler 3
EE1DIVLNVRL.EEDIV2     2   EEPROM-1 timebase prescaler 2
EE1DIVLNVRL.EEDIV1     1   EEPROM-1 timebase prescaler 1
EE1DIVLNVRL.EEDIV0     0   EEPROM-1 timebase prescaler 0
EE1DIVH               0xFE1A     EE1DIV Divider High Register
EE1DIVH.EEDIVSECD      7   EEPROM-1 Divider Security Disable
EE1DIVH.EEDIV10        2   EEPROM-1 timebase prescaler 10
EE1DIVH.EEDIV9         1   EEPROM-1 timebase prescaler 9
EE1DIVH.EEDIV8         0   EEPROM-1 timebase prescaler 8
EE1DIVL               0xFE1B     EE1DIV Divider Low Register
EE1DIVL.EEDIV7         7   EEPROM-1 timebase prescaler 7
EE1DIVL.EEDIV6         6   EEPROM-1 timebase prescaler 6
EE1DIVL.EEDIV5         5   EEPROM-1 timebase prescaler 5
EE1DIVL.EEDIV4         4   EEPROM-1 timebase prescaler 4
EE1DIVL.EEDIV3         3   EEPROM-1 timebase prescaler 3
EE1DIVL.EEDIV2         2   EEPROM-1 timebase prescaler 2
EE1DIVL.EEDIV1         1   EEPROM-1 timebase prescaler 1
EE1DIVL.EEDIV0         0   EEPROM-1 timebase prescaler 0
EE1NVR                0xFE1C     EEPROM-1 Nonvolatile Register
EE1NVR.EEPRTCT         4   EEPROM Protection Bit         
EE1NVR.EEBP3           3   EEPROM Block Protection Bits 3
EE1NVR.EEBP2           2   EEPROM Block Protection Bits 2
EE1NVR.EEBP1           1   EEPROM Block Protection Bits 1
EE1NVR.EEBP0           0   EEPROM Block Protection Bits 0
EE1CR                 0xFE1D     EEPROM-1 Control Register
EE1CR.EEOFF            5   EEPROM-1 power down
EE1CR.EERAS1           4   Erase/Program Mode Select Bits 1
EE1CR.EERAS0           3   Erase/Program Mode Select Bits 0
EE1CR.EELAT            2   EEPROM-1 Latch Control
EE1CR.AUTO             1   Automatic termination of program/erase cycle
EE1CR.EEPGM            0   EEPROM-1 Program/Erase Enable
EE1ACR                0xFE1F     EEPROM-1 Array Configuration Register
EE1ACR.EEPRTCT         4   EEPROM-1 Protection Bit
EE1ACR.EEBP3           3   EEPROM-1 Block Protection Bits 3
EE1ACR.EEBP2           2   EEPROM-1 Block Protection Bits 2
EE1ACR.EEBP1           1   EEPROM-1 Block Protection Bits 1
EE1ACR.EEBP0           0   EEPROM-1 Block Protection Bits 0
EE2DIVHNVRH           0xFF70     EE2DIV Hi Non-volatile Register
EE2DIVHNVRH.EEDIVSECD  7   EEPROM-2 Divider Security Disable
EE2DIVHNVRH.EEDIV10    2   EEPROM-2 timebase prescaler 10   
EE2DIVHNVRH.EEDIV9     1   EEPROM-2 timebase prescaler 9    
EE2DIVHNVRH.EEDIV8     0   EEPROM-2 timebase prescaler 8    
EE2DIVLNVRL           0xFF71     EE2DIV Lo Non-volatile Register
EE2DIVLNVRL.EEDIV7     7   EEPROM-2 timebase prescaler 7
EE2DIVLNVRL.EEDIV6     6   EEPROM-2 timebase prescaler 6
EE2DIVLNVRL.EEDIV5     5   EEPROM-2 timebase prescaler 5
EE2DIVLNVRL.EEDIV4     4   EEPROM-2 timebase prescaler 4
EE2DIVLNVRL.EEDIV3     3   EEPROM-2 timebase prescaler 3
EE2DIVLNVRL.EEDIV2     2   EEPROM-2 timebase prescaler 2
EE2DIVLNVRL.EEDIV1     1   EEPROM-2 timebase prescaler 1
EE2DIVLNVRL.EEDIV0     0   EEPROM-2 timebase prescaler 0
EE2DIVH               0xFF7A     EE2DIV Divider High Register
EE2DIVH.EEDIVSECD      7   EEPROM-2 Divider Security Disable
EE2DIVH.EEDIV10        2   EEPROM-2 timebase prescaler 10
EE2DIVH.EEDIV9         1   EEPROM-2 timebase prescaler 9
EE2DIVH.EEDIV8         0   EEPROM-2 timebase prescaler 8
EE2DIVL               0xFF7B     EE2DIV Divider Low Register
EE2DIVL.EEDIV7         7   EEPROM-2 timebase prescaler 7
EE2DIVL.EEDIV6         6   EEPROM-2 timebase prescaler 6
EE2DIVL.EEDIV5         5   EEPROM-2 timebase prescaler 5
EE2DIVL.EEDIV4         4   EEPROM-2 timebase prescaler 4
EE2DIVL.EEDIV3         3   EEPROM-2 timebase prescaler 3
EE2DIVL.EEDIV2         2   EEPROM-2 timebase prescaler 2
EE2DIVL.EEDIV1         1   EEPROM-2 timebase prescaler 1
EE2DIVL.EEDIV0         0   EEPROM-2 timebase prescaler 0
EE2NVR                0xFF7C     EEPROM-2 Nonvolatile Register
EE2NVR.EEPRTCT         4   EEPROM-2 Protection Bit         
EE2NVR.EEBP3           3   EEPROM-2 Block Protection Bits 3
EE2NVR.EEBP2           2   EEPROM-2 Block Protection Bits 2
EE2NVR.EEBP1           1   EEPROM-2 Block Protection Bits 1
EE2NVR.EEBP0           0   EEPROM-2 Block Protection Bits 0
EE2CR                 0xFF7D     EEPROM-2 Control Register
EE2CR.EEOFF            5   EEPROM-2 power down
EE2CR.EERAS1           4   Erase/Program Mode Select Bits 1
EE2CR.EERAS0           3   Erase/Program Mode Select Bits 0
EE2CR.EELAT            2   EEPROM-2 Latch Control
EE2CR.AUTO             1   Automatic termination of program/erase cycle
EE2CR.EEPGM            0   EEPROM-2 Program/Erase Enable
EE2ACR                0xFF7F     EEPROM-2 Array Configuration Register
EE2ACR.EEPRTCT         4   EEPROM-2 Protection Bit
EE2ACR.EEBP3           3   EEPROM-2 Block Protection Bits 3
EE2ACR.EEBP2           2   EEPROM-2 Block Protection Bits 2
EE2ACR.EEBP1           1   EEPROM-2 Block Protection Bits 1
EE2ACR.EEBP0           0   EEPROM-2 Block Protection Bits 0
FL1BPR                0xFF80     FLASH-1 Block Protect Register
FL1BPR.BPR7            7   Block Protect Register BIT7
FL1BPR.BPR6            6   Block Protect Register BIT6
FL1BPR.BPR5            5   Block Protect Register BIT5
FL1BPR.BPR4            4   Block Protect Register BIT4
FL1BPR.BPR3            3   Block Protect Register BIT3
FL1BPR.BPR2            2   Block Protect Register BIT2
FL1BPR.BPR1            1   Block Protect Register BIT1
FL1BPR.BPR0            0   Block Protect Register BIT0
FL2BPR                0xFF81     FLASH-2 Block Protect Register
FL2BPR.BPR7            7   Block Protect Register Bit7
FL2BPR.BPR6            6   Block Protect Register Bit6
FL2BPR.BPR5            5   Block Protect Register Bit5
FL2BPR.BPR4            4   Block Protect Register Bit4
FL2BPR.BPR3            3   Block Protect Register Bit3
FL2BPR.BPR2            2   Block Protect Register Bit2
FL2BPR.BPR1            1   Block Protect Register Bit1
FL2BPR.BPR0            0   Block Protect Register Bit0
FL1CR                 0xFF88     FLASH-1 Control Register
FL1CR.HVEN             3   High-Voltage Enable Bit
FL1CR.MASS             2   Mass Erase Control Bit
FL1CR.ERASE            1   Erase Control Bit
FL1CR.PGM              0   Program Control Bit
ReservFFCC            0xFFCC     Reserved
ReservFFCD            0xFFCD     Reserved
ReservFFCE            0xFFCE     Reserved
ReservFFCF            0xFFCF     Reserved
ReservFFD0            0xFFD0     Reserved
ReservFFD1            0xFFD1     Reserved
ReservFFD4            0xFFD4     Reserved
ReservFFD5            0xFFD5     Reserved
ReservFFD6            0xFFD6     Reserved
ReservFFD7            0xFFD7     Reserved
ReservFFD8            0xFFD8     Reserved
ReservFFD9            0xFFD9     Reserved
COPCTL                0xFFFF     COP Control Register


.68HC908AT32
; HC908AT32GRS/D  http://
; HC908AT32GRS.pdf


; MEMORY MAP
; MC68HC08AZ32 Emulator (64-Pin)
area DATA FSR_1		    0x0000:0x0040
area DATA FSR_2		    0x0040:0x0050
area DATA RAM               0x0050:0x0450
area BSS  UNIMPLEMENTED	    0x0450:0x0500
area DATA CAN_CONTROL       0x0500:0x0580
area BSS  UNIMPLEMENTED	    0x0580:0x0800
area DATA EEPROM            0x0800:0x0A00
area BSS  UNIMPLEMENTED	    0x0A00:0x8000
area DATA FLASH             0x8000:0xFE00
area DATA FSR_3		    0xFE00:0xFE20
area DATA MONITOR_ROM       0xFE20:0xFF00
area BSS  UNIMPLEMENTED	    0xFF00:0xFF80
area DATA FLBPR             0xFF80:0xFF81
area BSS  RESERVED          0xFF81:0xFFD0
area DATA USER_VEC	    0xFFD0:0x10000

; MC68HC08AS20 Emulator (52-Pin)
; area DATA FSR_1	      0x0000:0x0040
; area BSS  UNIMPLEMENTED     0x0040:0x0050
; area DATA RAM               0x0050:0x02D0
; area BSS  UNIMPLEMENTED     0x02D0:0x0800
; area DATA EEPROM            0x0800:0x0A00
; area BSS  UNIMPLEMENTED     0x0A00:0xAE00
; area DATA FLASH             0xAE00:0xFE00
; area DATA FSR_3	      0xFE00:0xFE20
; area DATA MONITOR_ROM       0xFE20:0xFF00
; area BSS  UNIMPLEMENTED     0xFF00:0xFF80
; area DATA FLBPR             0xFF80:0xFF81
; area BSS  RESERVED          0xFF81:0xFFDC
; area DATA USER_VEC	      0xFFDC:0x10000


; Interrupt and reset vector assignments
; MC68HC08AZ32 Emulator (64-Pin)
interrupt __RESET   0xFFFE    Reset Vector
interrupt SWI       0xFFFC    SWI Vector
interrupt IRQ1      0xFFFA    IRQ1 Vector
interrupt PLL       0xFFF8    PLL Vector
interrupt PIT       0xFFF6    PIT Vector
interrupt TIMA_CH0  0xFFF4    TIMA CH0 Vector
interrupt TIMA_CH1  0xFFF2    TIMA CH1 Vector
interrupt TIMA_CH2  0xFFF0    TIMA CH2 Vector
interrupt TIMA_CH3  0xFFEE    TIMA CH3 Vector
interrupt TIMA_O    0xFFEC    TIMA Overflow Vector
interrupt TIMB_CH0  0xFFEA    TIMB CH0 Vector
interrupt TIMB_CH1  0xFFE8    TIMB CH1 Vector
interrupt TIMB_O    0xFFE6    TIMB Overflow Vector
interrupt SPI_R     0xFFE4    SPI Receive Vector
interrupt SPI_T     0xFFE2    SPI Transmit Vector
interrupt CAN_W     0xFFE0    CAN Wakeup Vector
interrupt CAN_E     0xFFDE    CAN Error Vector
interrupt CAN_R     0xFFDC    CAN Receive Vector
interrupt CAN_T     0xFFDA    CAN Transmit Vector
interrupt SCI_E     0xFFD8    SCI Error Vector
interrupt SCI_R     0xFFD6    SCI Receive Vector
interrupt SCI_T     0xFFD4    SCI Transmit Vector
interrupt KBRD      0xFFD2    Keyboard Vector
interrupt ADC       0xFFD0    ADC Vector

; MC68HC08AS20 Emulator (52-Pin)
; interrupt __RESET   0xFFFE    Reset Vector
; interrupt SWI       0xFFFC    SWI Vector
; interrupt IRQ1      0xFFFA    IRQ1 Vector
; interrupt PLL       0xFFF8    PLL Vector
; interrupt TIM_CH0   0xFFF6    TIM Channel 0 Vector
; interrupt TIM_CH1   0xFFF4    TIM Channel 1 Vector
; interrupt TIM_CH2   0xFFF2    TIM Channel 2 Vector
; interrupt TIM_CH3   0xFFF0    TIM Channel 3 Vector
; interrupt TIM_CH4   0xFFEE    TIM Channel 4 Vector
; interrupt TIM_CH5   0xFFEC    TIM Channel 5 Vector
; interrupt TIM_O     0xFFEA    TIM Overflow Vector
; interrupt SPI_R     0xFFE8    SPI Receive Vector
; interrupt SPI_T     0xFFE6    SPI Transmit Vector
; interrupt SCI_E     0xFFE4    SCI Error Vector
; interrupt SCI_R     0xFFE2    SCI Receive Vector
; interrupt SCI_T     0xFFE0    SCI Transmit Vector
; interrupt ADC       0xFFDE    ADC Vector
; interrupt BDLC      0xFFDC    BDLC Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bits 7
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
PTC                   0x0002     Port C Data Register
PTC.PTC5               5   (HC08AZ32) Port C Data Bits 5
PTC.PTC4               4   Port C Data Bits 4
PTC.PTC3               3   Port C Data Bits 3
PTC.PTC2               2   Port C Data Bits 2
PTC.PTC1               1   Port C Data Bits 1
PTC.PTC0               0   Port C Data Bits 0
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   (HC08AZ32) Port D Data Bits 7
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bits 7
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
DDRC                  0x0006     Data Direction Register C
DDRC.MCLKEN            7   MCLK Enable Bit
DDRC.DDRC5             5   (HC08AZ32) Data Direction Register C Bits 5
DDRC.DDRC4             4   Data Direction Register C Bits 4
DDRC.DDRC3             3   Data Direction Register C Bits 3
DDRC.DDRC2             2   Data Direction Register C Bits 2
DDRC.DDRC1             1   Data Direction Register C Bits 1
DDRC.DDRC0             0   Data Direction Register C Bits 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   (HC08AZ32) Data Direction Register D Bits 7
DDRD.DDRD6             6   Data Direction Register D Bits 6
DDRD.DDRD5             5   Data Direction Register D Bits 5
DDRD.DDRD4             4   Data Direction Register D Bits 4
DDRD.DDRD3             3   Data Direction Register D Bits 3
DDRD.DDRD2             2   Data Direction Register D Bits 2
DDRD.DDRD1             1   Data Direction Register D Bits 1
DDRD.DDRD0             0   Data Direction Register D Bits 0
PTE                   0x0008     Port E Data Register
PTE.PTE7               7   Port E Data Bits 7
PTE.PTE6               6   Port E Data Bits 6
PTE.PTE5               5   Port E Data Bits 5
PTE.PTE4               4   Port E Data Bits 4
PTE.PTE3               3   Port E Data Bits 3
PTE.PTE2               2   Port E Data Bits 2
PTE.PTE1               1   Port E Data Bits 1
PTE.PTE0               0   Port E Data Bits 0
PTF                   0x0009     Port F Data Register
PTF.PTF6               6   (HC08AZ32) Port F Data Bits 6
PTF.PTF5               5   (HC08AZ32) Port F Data Bits 5
PTF.PTF4               4   (HC08AZ32) Port F Data Bits 4
PTF.PTF3               3   Port F Data Bits 3
PTF.PTF2               2   Port F Data Bits 2
PTF.PTF1               1   Port F Data Bits 1
PTF.PTF0               0   Port F Data Bits 0
PTG                   0x000A     Port G Data Register
PTG.PTG2               2   (HC08AZ32) Port G Data Bits 2
PTG.PTG1               1   (HC08AZ32) Port G Data Bits 1
PTG.PTG0               0   (HC08AZ32) Port G Data Bits 0
PTH                   0x000B     Port H Data Register
PTH.PTH1               1   (HC08AZ32) Port H Data Bits 1
PTH.PTH0               0   (HC08AZ32) Port H Data Bits 0
DDRE                  0x000C     Data Direction Register E
DDRE.DDRE7             7   Data Direction Register E Bits 7
DDRE.DDRE6             6   Data Direction Register E Bits 6
DDRE.DDRE5             5   Data Direction Register E Bits 5
DDRE.DDRE4             4   Data Direction Register E Bits 4
DDRE.DDRE3             3   Data Direction Register E Bits 3
DDRE.DDRE2             2   Data Direction Register E Bits 2
DDRE.DDRE1             1   Data Direction Register E Bits 1
DDRE.DDRE0             0   Data Direction Register E Bits 0
DDRF                  0x000D     Data Direction Register F
DDRF.DDRF6             6   (HC08AZ32) Data Direction Register F Bits 6
DDRF.DDRF5             5   (HC08AZ32) Data Direction Register F Bits 5
DDRF.DDRF4             4   (HC08AZ32) Data Direction Register F Bits 4
DDRF.DDRF3             3   Data Direction Register F Bits 3
DDRF.DDRF2             2   Data Direction Register F Bits 2
DDRF.DDRF1             1   Data Direction Register F Bits 1
DDRF.DDRF0             0   Data Direction Register F Bits 0
DDRG                  0x000E     Data Direction Register G
DDRG.DDRG2             2   (HC08AZ32) Data Direction Register G Bits 2
DDRG.DDRG1             1   (HC08AZ32) Data Direction Register G Bits 1
DDRG.DDRG0             0   (HC08AZ32) Data Direction Register G Bits 0
DDRH                  0x000F     Data Direction Register H
DDRH.DDRH1             1   (HC08AZ32) Data Direction Register H Bits 1
DDRH.DDRH0             0   (HC08AZ32) Data Direction Register H Bits 0
SPCR                  0x0010     SPI Control Register
SPCR.SPRIE             7   SPI Receiver Interrupt Enable Bit
SPCR.SPMSTR            5   SPI Master Bit
SPCR.CPOL              4   Clock Polarity Bit
SPCR.CPHA              3   Clock Phase Bit
SPCR.SPWOM             2   SPI Wired-OR Mode Bit
SPCR.SPE               1   SPI Enable Bit
SPCR.SPTIE             0   SPI Transmit Interrupt Enable Bit
SPSCR                 0x0011     SPI Status and Control Register
SPSCR.SPRF             7   SPI Receiver Full Bit
SPSCR.ERRIE            6   Error Interrupt Enable Bit
SPSCR.OVRF             5   Overflow Bit
SPSCR.MODF             4   Mode Fault Bit
SPSCR.SPTE             3   SPI Transmitter Empty Bit
SPSCR.MODFEN           2   Mode Fault Enable Bit
SPSCR.SPR1             1   SPI Baud Rate Select Bits 1
SPSCR.SPR0             0   SPI Baud Rate Select Bits 0
SPDR                  0x0012     SPI Data Register
SPDR.R7_T7             7   Receive/Transmit Data Bits 7
SPDR.R6_T6             6   Receive/Transmit Data Bits 6
SPDR.R5_T5             5   Receive/Transmit Data Bits 5
SPDR.R4_T4             4   Receive/Transmit Data Bits 4
SPDR.R3_T3             3   Receive/Transmit Data Bits 3
SPDR.R2_T2             2   Receive/Transmit Data Bits 2
SPDR.R1_T1             1   Receive/Transmit Data Bits 1
SPDR.R0_T0             0   Receive/Transmit Data Bits 0
SCC1                  0x0013     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit
SCC1.ENSCI             6   Enable SCI Bit
SCC1.TXINV             5   Transmit Inversion Bit
SCC1.M                 4   Mode (Character Length) Bit
SCC1.WAKE              3   Wakeup Condition Bit
SCC1.ILTY              2   Idle Line Type Bit
SCC1.PEN               1   Parity Enable Bit
SCC1.PTY               0   Parity Bit
SCC2                  0x0014     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit
SCC2.ILIE              4   Idle Line Interrupt Enable Bit
SCC2.TE                3   Transmitter Enable Bit
SCC2.RE                2   Receiver Enable Bit
SCC2.RWU               1   Receiver Wakeup Bit
SCC2.SBK               0   Send Break Bit
SCC3                  0x0015     SCI Control Register 3
SCC3.R8                7   Received Bit 8
SCC3.T8                6   Transmitted Bit 8
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit
SCS1                  0x0016     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit
SCS1.TC                6   Transmission Complete Bit
SCS1.SCRF              5   SCI Receiver Full Bit
SCS1.IDLE              4   Receiver Idle Bit
SCS1.OR                3   Receiver Overrun Bit
SCS1.NF                2   Receiver Noise Flag Bit
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit
SCS2                  0x0017     SCI Status Register 2
SCS2.BKF               1   Break Flag Bit
SCS2.RPF               0   Reception in Progress Flag Bit
SCDR                  0x0018     SCI Data Register
SCDR.R7_T7             7   Receive/Transmit Data Bits 7
SCDR.R6_T6             6   Receive/Transmit Data Bits 6
SCDR.R5_T5             5   Receive/Transmit Data Bits 5
SCDR.R4_T4             4   Receive/Transmit Data Bits 4
SCDR.R3_T3             3   Receive/Transmit Data Bits 3
SCDR.R2_T2             2   Receive/Transmit Data Bits 2
SCDR.R1_T1             1   Receive/Transmit Data Bits 1
SCDR.R0_T0             0   Receive/Transmit Data Bits 0
SCBR                  0x0019     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2
SCBR.SCR1              1   SCI Baud Rate Select Bits 1
SCBR.SCR0              0   SCI Baud Rate Select Bits 0
ISCR                  0x001A     IRQ Status and Control Register
ISCR.IRQF1             3   IRQ1 Flag Bit
ISCR.ACK1              2   IRQ1 Interrupt Request Acknowledge Bit
ISCR.IMASK1            1   IRQ1 Interrupt Mask Bit
ISCR.MODE1             0   IRQ1 Edge/Level Select Bit
KBSCR                 0x001B     (HC08AZ32) Keyboard Status and Control
KBSCR.KEYF             3   (HC08AZ32) Keyboard Flag Bit
KBSCR.ACKK             2   (HC08AZ32) Keyboard Acknowledge Bit
KBSCR.IMASKK           1   (HC08AZ32) Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   (HC08AZ32) Keyboard Triggering Sensitivity Bit
PCTL                  0x001C     PLL Control Register
PCTL.PLLIE             7   PLL Interrupt Enable Bit
PCTL.PLLF              6   PLL Flag Bit
PCTL.PLLON             5   PLL On Bit
PCTL.BCS               4   Base Clock Select Bit
PBWC                  0x001D     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               5   Acquisition Mode Bit
PBWC.XLD               4   Crystal Loss Detect Bit
PPG                   0x001E     PLL Programming Register
PPG.MUL7               7   Multiplier Select Bits 7
PPG.MUL6               6   Multiplier Select Bits 6
PPG.MUL5               5   Multiplier Select Bits 5
PPG.MUL4               4   Multiplier Select Bits 4
PPG.VRS7               3   VCO Range Select Bits 3
PPG.VRS6               2   VCO Range Select Bits 2
PPG.VRS5               1   VCO Range Select Bits 1
PPG.VRS4               0   VCO Range Select Bits 0
CONFIG1               0x001F     Configuration Write-Once Register
CONFIG1.LVISTOP        7   LVI Stop Mode Enable Bit
CONFIG1.LVIRST         5   LVI Reset Enable Bit
CONFIG1.LVIPWR         4   LVI Power Enable Bit
CONFIG1.SSREC          3   Short Stop Recovery Bit
CONFIG1.COPS           2   COP Rate Select Bit
CONFIG1.STOP           1   STOP Instruction Enable Bit
CONFIG1.COPD           0   COP Disable Bit
TASC                  0x0020     Timer A Status and Control Register
TASC.TOF               7   TIMA Overflow Flag Bit
TASC.TOIE              6   TIMA Overflow Interrupt Enable Bit
TASC.TSTOP             5   TIMA Stop Bit
TASC.TRST              4   TIMA Reset Bit
TASC.PS2               2   Prescaler Select Bits 2
TASC.PS1               1   Prescaler Select Bits 1
TASC.PS0               0   Prescaler Select Bits 0
KBIER                 0x0021     (HC08AZ32) Keyboard Interrupt Control Register
KBIER.KBIE4            4   (HC08AZ32) Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   (HC08AZ32) Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   (HC08AZ32) Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   (HC08AZ32) Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   (HC08AZ32) Keyboard Interrupt Enable Bits 0
TACNTH                0x0022     Timer A Counter Register High
TACNTL                0x0023     Timer A Counter Register Low
TAMODH                0x0024     Timer A Modulo Register High
TAMODL                0x0025     Timer A Modulo Register Low
TASC0                 0x0026     Timer A Channel 0 Status and Control Register
TASC0.CH0F             7   Channel 0 Flag Bit
TASC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TASC0.MS0B             5   Mode Select Bit B
TASC0.MS0A             4   Mode Select Bit A
TASC0.ELS0B            3   Edge/Level Select Bits
TASC0.ELS0A            2   Edge/Level Select Bits
TASC0.TOV0             1   Toggle-On-Overflow Bit
TASC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TACH0H                0x0027     Timer A Channel 0 Register High
TACH0L                0x0028     Timer A Channel 0 Register Low
TASC1                 0x0029     Timer A Channel 1 Status and Control Register
TASC1.CH1F             7   Channel 1 Flag Bit            
TASC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TASC1.MS1A             4   Mode Select Bit A               
TASC1.ELS1B            3   Edge/Level Select Bits          
TASC1.ELS1A            2   Edge/Level Select Bits          
TASC1.TOV1             1   Toggle-On-Overflow Bit          
TASC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TACH1H                0x002A     Timer A Channel 1 Register High
TACH1L                0x002B     Timer A Channel 1 Register Low
TASC2                 0x002C     Timer A Channel 2 Status and Control Register
TASC2.CH2F             7   Channel 2 Flag Bit              
TASC2.CH2IE            6   Channel 2 Interrupt Enable Bit  
TASC2.MS2B             5   Mode Select Bit B               
TASC2.MS2A             4   Mode Select Bit A               
TASC2.ELS2B            3   Edge/Level Select Bits          
TASC2.ELS2A            2   Edge/Level Select Bits          
TASC2.TOV2             1   Toggle-On-Overflow Bit          
TASC2.CH2MAX           0   Channel 2 Maximum Duty Cycle Bit
TACH2H                0x002D     Timer A Channel 2 Register High
TACH2L                0x002E     Timer A Channel 2 Register Low
TASC3                 0x002F     Timer A Channel 3 Status and Control Register
TASC3.CH3F             7   Channel 3 Flag Bit              
TASC3.CH3IE            6   Channel 3 Interrupt Enable Bit  
TASC3.MS3A             4   Mode Select Bit A               
TASC3.ELS3B            3   Edge/Level Select Bits          
TASC3.ELS3A            2   Edge/Level Select Bits          
TASC3.TOV3             1   Toggle-On-Overflow Bit          
TASC3.CH3MAX           0   Channel 3 Maximum Duty Cycle Bit
TACH3H                0x0030     Timer A Channel 3 Register High
TACH3L                0x0031     Timer A Channel 3 Register Low
; TASC4                 0x0032     (HC08AS20) Timer A Channel 4 Status and Control Register
; TASC4.CH4F             7   (HC08AS20) Channel 4 Flag Bit              
; TASC4.CH4IE            6   (HC08AS20) Channel 4 Interrupt Enable Bit  
; TASC4.MS4B             5   (HC08AS20) Mode Select Bit B               
; TASC4.MS4A             4   (HC08AS20) Mode Select Bit A               
; TASC4.ELS4B            3   (HC08AS20) Edge/Level Select Bits          
; TASC4.ELS4A            2   (HC08AS20) Edge/Level Select Bits          
; TASC4.TOV4             1   (HC08AS20) Toggle-On-Overflow Bit          
; TASC4.CH4MAX           0   (HC08AS20) Channel 4 Maximum Duty Cycle Bit
; TACH4H                0x0033     (HC08AS20) Timer A Channel 4 Register High
; TACH4L                0x0034     (HC08AS20) Timer A Channel 4 Register Low
; TASC5                 0x0035     (HC08AS20) Timer A Channel 5 Status and Control Register
; TASC5.CH5F             7   (HC08AS20) Channel 5 Flag Bit              
; TASC5.CH5IE            6   (HC08AS20) Channel 5 Interrupt Enable Bit  
; TASC5.MS5A             4   (HC08AS20) Mode Select Bit A               
; TASC5.ELS5B            3   (HC08AS20) Edge/Level Select Bits          
; TASC5.ELS5A            2   (HC08AS20) Edge/Level Select Bits          
; TASC5.TOV5             1   (HC08AS20) Toggle-On-Overflow Bit          
; TASC5.CH5MAX           0   (HC08AS20) Channel 5 Maximum Duty Cycle Bit
; TACH5H                0x0036     (HC08AS20) Timer A Channel 5 Register High
; TACH5L                0x0037     (HC08AS20) Timer A Channel 5 Register Low
ADSCR                 0x0038     Analog-to-Digital Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADR                   0x0039     Analog-to-Digital Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADCLK                 0x003A     Analog-to-Digital Input Clock Register
ADCLK.ADIV2            7   ADC Clock Prescaler Bits 2
ADCLK.ADIV1            6   ADC Clock Prescaler Bits 1
ADCLK.ADIV0            5   ADC Clock Prescaler Bits 0
ADCLK.ADICLK           4   ADC Input Clock Register Bit
; BARD                  0x003B     (HC08AS20) BDLC Analog and Roundtrip Delay Register
; BARD.ATE               7   (HC08AS20) Analog Transceiver Enable Bit
; BARD.RXPOL             6   (HC08AS20) Receive Pin Polarity Bit
; BARD.BO3               3   (HC08AS20) BARD Offset Bits 3
; BARD.BO2               2   (HC08AS20) BARD Offset Bits 2
; BARD.BO1               1   (HC08AS20) BARD Offset Bits 1
; BARD.BO0               0   (HC08AS20) BARD Offset Bits 0
; BCR1                  0x003C     (HC08AS20) BDLC Control Register 1
; BCR1.IMSG              7   (HC08AS20) Ignore Message Bit
; BCR1.CLKS              6   (HC08AS20) Clock Bit
; BCR1.R1                5   (HC08AS20) Rate Select Bits 1
; BCR1.R0                4   (HC08AS20) Rate Select Bits 0
; BCR1.IE                1   (HC08AS20) Interrupt Enable Bit
; BCR1.WCM               0   (HC08AS20) Wait Clock Mode Bit
; BCR2                  0x003D     (HC08AS20) BDLC Control Register 2
; BCR2.ALOOP             7   (HC08AS20) Analog Loopback Mode Bit
; BCR2.DLOOP             6   (HC08AS20) Digital Loopback Mode Bit
; BCR2.RX4XE             5   (HC08AS20) Receive 4X Enable Bit
; BCR2.NBFS              4   (HC08AS20) Normalization Bit Format Select Bit
; BCR2.TEOD              3   (HC08AS20) Transmit End-of-Data Bit
; BCR2.TSIFR             2   (HC08AS20) Transmit In-Frame Response Control Bits
; BCR2.TMIFR1            1   (HC08AS20) Transmit In-Frame Response Control Bits 1
; BCR2.TMIFR0            0   (HC08AS20) Transmit In-Frame Response Control Bits 0
; BSVR                  0x003E     (HC08AS20) BDLC State Vecto Register
; BSVR.I3                5   (HC08AS20) Interrupt Source Bits 3
; BSVR.I2                4   (HC08AS20) Interrupt Source Bits 2
; BSVR.I1                3   (HC08AS20) Interrupt Source Bits 1
; BSVR.I0                2   (HC08AS20) Interrupt Source Bits 0
; BDR                   0x003F     (HC08AS20) BDLC Data Register
; BDR.BD7                7   (HC08AS20)
; BDR.BD6                6   (HC08AS20)
; BDR.BD5                5   (HC08AS20)
; BDR.BD4                4   (HC08AS20)
; BDR.BD3                3   (HC08AS20)
; BDR.BD2                2   (HC08AS20)
; BDR.BD1                1   (HC08AS20)
; BDR.BD0                0   (HC08AS20)
TBSCR                 0x0040     (HC08AZ32) Timer B Status and Control Register
TBSCR.TOF              7   (HC08AZ32) TIMB Overflow Flag Bit
TBSCR.TOIE             6   (HC08AZ32) TIMB Overflow Interrupt Enable Bit
TBSCR.TSTOP            5   (HC08AZ32) TIMB Stop Bit
TBSCR.TRST             4   (HC08AZ32) TIMB Reset Bit
TBSCR.PS2              2   (HC08AZ32) TIMB Reset Bit 2
TBSCR.PS1              1   (HC08AZ32) TIMB Reset Bit 1
TBSCR.PS0              0   (HC08AZ32) TIMB Reset Bit 0
TBCNTH                0x0041     (HC08AZ32) Timer B Counter Register High
TBCNTL                0x0042     (HC08AZ32) Timer B Counter Register Low
TBMODH                0x0043     (HC08AZ32) Timer B Modulo Register High
TBMODL                0x0044     (HC08AZ32) Timer B Modulo Register Low
TBSC0                 0x0045     (HC08AZ32) Timer B CH0 Status and Control Register
TBSC0.CH0F             7   (HC08AZ32) Channel 0 Flag Bit              
TBSC0.CH0IE            6   (HC08AZ32) Channel 0 Interrupt Enable Bit  
TBSC0.MS0B             5   (HC08AZ32) Mode Select Bit B               
TBSC0.MS0A             4   (HC08AZ32) Mode Select Bit A               
TBSC0.ELS0B            3   (HC08AZ32) Edge/Level Select Bits          
TBSC0.ELS0A            2   (HC08AZ32) Edge/Level Select Bits          
TBSC0.TOV0             1   (HC08AZ32) Toggle-On-Overflow Bit          
TBSC0.CH0MAX           0   (HC08AZ32) Channel 0 Maximum Duty Cycle Bit
TBCH0H                0x0046     (HC08AZ32) Timer B CH0 Register High
TBCH0L                0x0047     (HC08AZ32) Timer B CH0 Register Low
TBSC1                 0x0048     (HC08AZ32) Timer B CH1 Status and Control Register
TBSC1.CH1F             7   (HC08AZ32) Channel 1 Flag Bit              
TBSC1.CH1IE            6   (HC08AZ32) Channel 1 Interrupt Enable Bit  
TBSC1.MS1A             4   (HC08AZ32) Mode Select Bit A               
TBSC1.ELS1B            3   (HC08AZ32) Edge/Level Select Bits          
TBSC1.ELS1A            2   (HC08AZ32) Edge/Level Select Bits          
TBSC1.TOV1             1   (HC08AZ32) Toggle-On-Overflow Bit          
TBSC1.CH1MAX           0   (HC08AZ32) Channel 1 Maximum Duty Cycle Bit
TBCH1H                0x0049     (HC08AZ32) Timer B CH1 Register High
TBCH1L                0x004A     (HC08AZ32) Timer B CH1 Register Low
TSC                   0x004B     (HC08AZ32) TIM Status and Control Register
TSC.TOF                7   (HC08AZ32) TIMA Overflow Flag Bit            
TSC.TOIE               6   (HC08AZ32) TIMA Overflow Interrupt Enable Bit
TSC.TSTOP              5   (HC08AZ32) TIMA Stop Bit                     
TSC.TRST               4   (HC08AZ32) TIMA Reset Bit                    
TSC.PS2                2   (HC08AZ32) Prescaler Select Bits 2           
TSC.PS1                1   (HC08AZ32) Prescaler Select Bits 1           
TSC.PS0                0   (HC08AZ32) Prescaler Select Bits 0           
TCNTH                 0x004C     (HC08AZ32) TIM Counter Register High
TCNTL                 0x004D     (HC08AZ32) TIM Counter Register Low
TMODH                 0x004E     (HC08AZ32) TIM Modulo Register High
TMODL                 0x004F     (HC08AZ32) TIM Modulo Register Low
SBSR                  0xFE00     SIM Break Status Register
SBSR.SBSW              1   SIM Break Stop/Wait
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Flag
SRSR.PIN               6   External Reset Flag
SRSR.COP               5   COP Reset Flag
SRSR.ILOP              4   Illegal Opcode Reset Flag
SRSR.ILAD              3   Illegal Address Reset Flag
SRSR.LVI               1   Low-Voltage Inhibit Reset Flag
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
CONFIG2               0xFE09     Configuration Write-Once Register
CONFIG2.MSCAND         4   MSCAN Disable Bit
CONFIG2.MEMEXT         1   Memory Extention Enable Bit
CONFIG2.AZ32           0   AZ32 Emulator Enable Bit
FLASHCR               0xFE0B     FLASH Control Register
FLASHCR.FDIV1          7   Frequency Divide Control Bit 1
FLASHCR.FDIV0          6   Frequency Divide Control Bit 0
FLASHCR.BLK1           5   Block Erase Control Bit 1
FLASHCR.BLK0           4   Block Erase Control Bit 0
FLASHCR.HVEN           3   High-Voltage Enable Bit
FLASHCR.VERF           2   Verify Control Bit
FLASHCR.ERASE          1   Erase Control Bit
FLASHCR.PGM            0   Program Control Bit
BRKH                  0xFE0C     Break Address Register High
BRKL                  0xFE0D     Break Address Register Low
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
LVISR                 0xFE0F     LVI Status Register
LVISR.LVIOUT           7   LVI Output Bit
EENVR                 0xFE1C     EEPROM Nonvolatile Register
EENVR.EERA             7   EEPROM Redundant Array
EENVR.CON2             6   MCU Configuration Bits 2
EENVR.CON1             5   MCU Configuration Bits 1
EENVR.CON0             4   MCU Configuration Bits 0
EENVR.EEBP3            3   EEPROM Block Protection Bits 3
EENVR.EEBP2            2   EEPROM Block Protection Bits 2
EENVR.EEBP1            1   EEPROM Block Protection Bits 1
EENVR.EEBP0            0   EEPROM Block Protection Bits 0
EECR                  0xFE1D     EEPROM Control Register
EECR.EEBCLK            7   EEPROM Bus Clock Enable
EECR.EEOFF             5   EEPROM Power Down
EECR.EERAS1            4   Erase Bits 1
EECR.EERAS0            3   Erase Bits 0
EECR.EELAT             2   EEPROM Latch Control
EECR.EEPGM             0   EEPROM Program/Erase Enable
RESERVFE1E            0xFE1E     RESERVED
EEACR                 0xFE1F     EEPROM Array Control Register
EEACR.EERA             7   EEPROM Redundant Array        
EEACR.CON2             6   MCU Configuration Bits 2      
EEACR.CON1             5   MCU Configuration Bits 1      
EEACR.CON0             4   MCU Configuration Bits 0      
EEACR.EEBP3            3   EEPROM Block Protection Bits 3
EEACR.EEBP2            2   EEPROM Block Protection Bits 2
EEACR.EEBP1            1   EEPROM Block Protection Bits 1
EEACR.EEBP0            0   EEPROM Block Protection Bits 0
FLBPR                 0xFF80     FLASH Block Protect Register
FLBPR.BPR3             3   Block Protect Register Bit 3
FLBPR.BPR2             2   Block Protect Register Bit 2
FLBPR.BPR1             1   Block Protect Register Bit 1
FLBPR.BPR0             0   Block Protect Register Bit 0
COPCTL                0xFFFF     COP Control Register


.68HC908AZ60
; MC68HC908AZ60/D  http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=68HC908AZ60&nodeId=01M98634
; MC68HC908AZ60.pdf

; 60 Kbytes of FLASH EEPROM
; 2048 Bytes of RAM
; 1024 Bytes of EEPROM with Protect Option
; 52 Bytes of User-Defined Vectors
; 224 Bytes of Monitor ROM


; MEMORY MAP
area DATA FSR		   0x0000:0x0050
area DATA RAM_1		   0x0050:0x0450
area DATA FLASH_2_1	   0x0450:0x0500
area DATA CAN_CONTROL	   0x0500:0x0580
area DATA FLASH_2_2	   0x0580:0x0600
area DATA EEPROM_2	   0x0600:0x0800
area DATA EEPROM_1	   0x0800:0x0A00
area DATA RAM_2		   0x0A00:0x0E00
area DATA FLASH_2_3	   0x0E00:0x8000
area DATA FLASH_1	   0x8000:0xFE00
area DATA FSR_1		   0xFE00:0xFE20
area DATA MONITOR_ROM	   0xFE20:0xFF00
area BSS  UNIMPLEMENTED	   0xFF00:0xFF80
area DATA FSR_2		   0xFF80:0xFF82
area BSS  RESERVED	   0xFF82:0xFFCC
area DATA USER_VEC	   0xFFCC:0x10000


; Interrupt and reset vector assignments
interrupt __RESET           0xFFFE      Processor reset
interrupt SWI               0xFFFC      "SWI" 
interrupt IRQ1              0xFFFA     "IRQ1"
interrupt PLL               0xFFF8      "PLL Module"
interrupt PIT               0xFFF6      "PIT"
interrupt TIMA_CH0          0xFFF4      "TIMA Channel 0"
interrupt TIMA_CH1          0xFFF2      "TIMA Channel 1"
interrupt TIMA_CH2          0xFFF0      "TIMA Channel 2"
interrupt TIMA_CH3          0xFFEE      "TIMA Channel 3"
interrupt TIMA              0xFFEC      "TIMA Overflow"
interrupt TIMB_CH0          0xFFEA      "TIMB Channel 0"
interrupt TIMB_CH1          0xFFE8      "TIMB Channel 1"
interrupt TIMB              0xFFE6      "TIMB Overflow"
interrupt SPI_R             0xFFE4      "SPI Module Receive"
interrupt SPI_T             0xFFE2      "SPI Module Transmit"
interrupt CAN_W             0xFFE0      "CAN Module Wakeup"
interrupt CAN_E             0xFFDE      "CAN Module Error"
interrupt CAN_R             0xFFDC      "CAN Module Receive"
interrupt CAN_T             0xFFDA      "CAN Module Transmit"
interrupt SCI_E             0xFFD8      "SCI Module Error"
interrupt SCI_R             0xFFD6      "SCI Module Receive"
interrupt SCI_T             0xFFD4      "SCI Module Transmit"
interrupt KBRD              0xFFD2      "Keyboard"
interrupt ADC               0xFFD0      "ADC Conversion Complete"
interrupt TIMA4             0xFFCE      "TIMA Channel 4"
interrupt TIMA5             0xFFCC      "TIMA Channel 5"


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bits 7
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
PTC                   0x0002     Port C Data Register
PTC.PTC5               5   Port C Data Bits 5
PTC.PTC4               4   Port C Data Bits 4
PTC.PTC3               3   Port C Data Bits 3
PTC.PTC2               2   Port C Data Bits 2
PTC.PTC1               1   Port C Data Bits 1
PTC.PTC0               0   Port C Data Bits 0
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bits 7
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bits 7
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
DDRC                  0x0006     Data Direction Register C
DDRC.MCLKEN            7   MCLK Enable Bit
DDRC.DDRC5             4   Data Direction Register C Bits 4
DDRC.DDRC4             3   Data Direction Register C Bits 3
DDRC.DDRC3             2   Data Direction Register C Bits 2
DDRC.DDRC2             1   Data Direction Register C Bits 1
DDRC.DDRC1             0   Data Direction Register C Bits 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bits 7
DDRD.DDRD6             6   Data Direction Register D Bits 6
DDRD.DDRD5             5   Data Direction Register D Bits 5
DDRD.DDRD4             4   Data Direction Register D Bits 4
DDRD.DDRD3             3   Data Direction Register D Bits 3
DDRD.DDRD2             2   Data Direction Register D Bits 2
DDRD.DDRD1             1   Data Direction Register D Bits 1
DDRD.DDRD0             0   Data Direction Register D Bits 0
PTE                   0x0008     Port E Data Register
PTE.PTE7               7   Port E Data Bits 7
PTE.PTE6               6   Port E Data Bits 6
PTE.PTE5               5   Port E Data Bits 5
PTE.PTE4               4   Port E Data Bits 4
PTE.PTE3               3   Port E Data Bits 3
PTE.PTE2               2   Port E Data Bits 2
PTE.PTE1               1   Port E Data Bits 1
PTE.PTE0               0   Port E Data Bits 0
PTF                   0x0009     Port F Data Register
PTF.PTF6               6   Port F Data Bits 6
PTF.PTF5               5   Port F Data Bits 5
PTF.PTF4               4   Port F Data Bits 4
PTF.PTF3               3   Port F Data Bits 3
PTF.PTF2               2   Port F Data Bits 2
PTF.PTF1               1   Port F Data Bits 1
PTF.PTF0               0   Port F Data Bits 0
PTG                   0x000A     Port G Data Register
PTG.PTG2               2   Port G Data Bits 2
PTG.PTG1               1   Port G Data Bits 1
PTG.PTG0               0   Port G Data Bits 0
PTH                   0x000B     Port H Data Register
PTH.PTH1               1   Port H Data Bits 1
PTH.PTH0               0   Port H Data Bits 0
DDRE                  0x000C     Data Direction Register E
DDRE.DDRE7             7   Data Direction Register E Bits 7
DDRE.DDRE6             6   Data Direction Register E Bits 6
DDRE.DDRE5             5   Data Direction Register E Bits 5
DDRE.DDRE4             4   Data Direction Register E Bits 4
DDRE.DDRE3             3   Data Direction Register E Bits 3
DDRE.DDRE2             2   Data Direction Register E Bits 2
DDRE.DDRE1             1   Data Direction Register E Bits 1
DDRE.DDRE0             0   Data Direction Register E Bits 0
DDRF                  0x000D     Data Direction Register F
DDRF.DDRF6             6   Data Direction Register F Bits 6
DDRF.DDRF5             5   Data Direction Register F Bits 5
DDRF.DDRF4             4   Data Direction Register F Bits 4
DDRF.DDRF3             3   Data Direction Register F Bits 3
DDRF.DDRF2             2   Data Direction Register F Bits 2
DDRF.DDRF1             1   Data Direction Register F Bits 1
DDRF.DDRF0             0   Data Direction Register F Bits 0
DDRG                  0x000E     Data Direction Register G
DDRG.DDRG2             2   Data Direction Register G Bits 2
DDRG.DDRG1             1   Data Direction Register G Bits 1
DDRG.DDRG0             0   Data Direction Register G Bits 0
DDRH                  0x000F     Data Direction Register H
DDRH.DDRH1             1   Data Direction Register H Bits 1
DDRH.DDRH0             0   Data Direction Register H Bits 0
SPCR                  0x0010     SPI Control Register
SPCR.SPRIE             7   SPI Receiver Interrupt Enable Bit
SPCR.SPMSTR            5   SPI Master Bit
SPCR.CPOL              4   Clock Polarity Bit
SPCR.CPHA              3   Clock Phase Bit
SPCR.SPWOM             2   SPI Wired-OR Mode Bit
SPCR.SPE               1   SPI Enable Bit
SPCR.SPTIE             0   SPI Transmit Interrupt Enable Bit
SPSCR                 0x0011     SPI Status and Control Register
SPSCR.SPRF             7   SPI Receiver Full Bit
SPSCR.ERRIE            6   Error Interrupt Enable Bit
SPSCR.OVRF             5   Overflow Bit
SPSCR.MODF             4   Mode Fault Bit
SPSCR.SPTE             3   SPI Transmitter Empty Bit
SPSCR.MODFEN           2   Mode Fault Enable Bit
SPSCR.SPR1             1   SPI Baud Rate Select Bits 1
SPSCR.SPR0             0   SPI Baud Rate Select Bits 0
SPDR                  0x0012     SPI Data Register
SPDR.R7_T7             7   Receive/Transmit Data Bits 7
SPDR.R6_T6             6   Receive/Transmit Data Bits 6
SPDR.R5_T5             5   Receive/Transmit Data Bits 5
SPDR.R4_T4             4   Receive/Transmit Data Bits 4
SPDR.R3_T3             3   Receive/Transmit Data Bits 3
SPDR.R2_T2             2   Receive/Transmit Data Bits 2
SPDR.R1_T1             1   Receive/Transmit Data Bits 1
SPDR.R0_T0             0   Receive/Transmit Data Bits 0
SCC1                  0x0013     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit
SCC1.ENSCI             6   Enable SCI Bit
SCC1.TXINV             5   Transmit Inversion Bit
SCC1.M                 4   Mode (Character Length) Bit
SCC1.WAKE              3   Wakeup Condition Bit
SCC1.ILTY              2   Idle Line Type Bit
SCC1.PEN               1   Parity Enable Bit
SCC1.PTY               0   Parity Bit
SCC2                  0x0014     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit
SCC2.ILIE              4   Idle Line Interrupt Enable Bit
SCC2.TE                3   Transmitter Enable Bit
SCC2.RE                2   Receiver Enable Bit
SCC2.RWU               1   Receiver Wakeup Bit
SCC2.SBK               0   Send Break Bit
SCC3                  0x0015     SCI Control Register 3
SCC3.R8                7   Received Bit
SCC3.T8                6   Transmitted Bit
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit
SCS1                  0x0016     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit
SCS1.TC                6   Transmission Complete Bit
SCS1.SCRF              5   SCI Receiver Full Bit
SCS1.IDLE              4   Receiver Idle Bit
SCS1.OR                3   Receiver Overrun Bit
SCS1.NF                2   Receiver Noise Flag Bit
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit
SCS2                  0x0017     SCI Status Register 2
SCS2.BKF               1   Break Flag Bit
SCS2.RPF               0   Reception in Progress Flag Bit
SCDR                  0x0018     SCI Data Register
SCDR.R7_T7             7   Receive/Transmit Data Bits 7
SCDR.R6_T6             6   Receive/Transmit Data Bits 6
SCDR.R5_T5             5   Receive/Transmit Data Bits 5
SCDR.R4_T4             4   Receive/Transmit Data Bits 4
SCDR.R3_T3             3   Receive/Transmit Data Bits 3
SCDR.R2_T2             2   Receive/Transmit Data Bits 2
SCDR.R1_T1             1   Receive/Transmit Data Bits 1
SCDR.R0_T0             0   Receive/Transmit Data Bits 0
SCBR                  0x0019     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2
SCBR.SCR1              1   SCI Baud Rate Select Bits 1
SCBR.SCR0              0   SCI Baud Rate Select Bits 0
ISCR                  0x001A     IRQ Status and Control Register
ISCR.IRQF              3   IRQ Flag Bit
ISCR.ACK               2   IRQ Interrupt Request Acknowledge Bit
ISCR.IMASK             1   IRQ Interrupt Mask Bit
ISCR.MODE              0   IRQ Edge/Level Select Bit
KBSCR                 0x001B     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
PCTL                  0x001C     PLL Control Register
PCTL.PLLIE             7   PLL Interrupt Enable Bit
PCTL.PLLF              6   PLL Flag Bit
PCTL.PLLON             5   PLL On Bit
PCTL.BCS               4   Base Clock Select Bit
PBWC                  0x001D     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               5   Acquisition Mode Bit
PBWC.XLD               4   Crystal Loss Detect Bit
PPG                   0x001E     PLL Programming Register
PPG.MUL7               7   Multiplier Select Bits 7
PPG.MUL6               6   Multiplier Select Bits 6
PPG.MUL5               5   Multiplier Select Bits 5
PPG.MUL4               4   Multiplier Select Bits 4
PPG.VRS7               3   VCO Range Select Bits 7
PPG.VRS6               2   VCO Range Select Bits 6
PPG.VRS5               1   VCO Range Select Bits 5
PPG.VRS4               0   VCO Range Select Bits 4
CONFIG1               0x001F     Configuration Write-Once Register
CONFIG1.LVISTOP        7   LVI Stop Mode Enable Bit
CONFIG1.LVIRST         5   LVI Reset Enable Bit
CONFIG1.LVIPWR         4   LVI Power Enable Bit
CONFIG1.SSREC          3   Short Stop Recovery Bit
CONFIG1.COPL           2   COP Long Timeout
CONFIG1.STOP           1   STOP Instruction Enable Bit
CONFIG1.COPD           0   COP Disable Bit
TASC                  0x0020     Timer A Status and Control Register
TASC.TOF               7   TIMA Overflow Flag Bit
TASC.TOIE              6   TIMA Overflow Interrupt Enable Bit
TASC.TSTOP             5   TIMA Stop Bit
TASC.TRST              4   TIMA Reset Bit
TASC.PS2               2   Prescaler Select Bits 2
TASC.PS1               1   Prescaler Select Bits 1
TASC.PS0               0   Prescaler Select Bits 0
KBIER                 0x0021     Keyboard Interrupt Enable Register
KBIER.KBIE4            4   Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Keyboard Interrupt Enable Bits 0
TACNTH                0x0022     Timer A Counter Register High
TACNTL                0x0023     Timer A Counter Register Low
TAMODH                0x0024     Timer A Modulo Register High
TAMODL                0x0025     Timer A Modulo Register Low
TASC0                 0x0026     Timer A Channel 0 Status and Control Register
TASC0.CH0F             7   Channel 0 Flag Bit
TASC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TASC0.MS0B             5   Mode Select Bit B
TASC0.MS0A             4   Mode Select Bit A
TASC0.ELS0B            3   Edge/Level Select Bits
TASC0.ELS0A            2   Edge/Level Select Bits
TASC0.TOV0             1   Toggle-On-Overflow Bit
TASC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TACH0H                0x0027     Timer A Channel 0 Register High
TACH0L                0x0028     Timer A Channel 0 Register Low
TASC1                 0x0029     Timer A Channel 1 Status and Control Register
TASC1.CH1F             7   Channel 1 Flag Bit            
TASC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TASC1.MS1A             4   Mode Select Bit A               
TASC1.ELS1B            3   Edge/Level Select Bits          
TASC1.ELS1A            2   Edge/Level Select Bits          
TASC1.TOV1             1   Toggle-On-Overflow Bit          
TASC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TACH1H                0x002A     Timer A Channel 1 Register High
TACH1L                0x002B     Timer A Channel 1 Register Low
TASC2                 0x002C     Timer A Channel 2 Status and Control Register
TASC2.CH2F             7   Channel 2 Flag Bit              
TASC2.CH2IE            6   Channel 2 Interrupt Enable Bit  
TASC2.MS2B             5   Mode Select Bit B               
TASC2.MS2A             4   Mode Select Bit A               
TASC2.ELS2B            3   Edge/Level Select Bits          
TASC2.ELS2A            2   Edge/Level Select Bits          
TASC2.TOV2             1   Toggle-On-Overflow Bit          
TASC2.CH2MAX           0   Channel 2 Maximum Duty Cycle Bit
TACH2H                0x002D     Timer A Channel 2 Register High
TACH2L                0x002E     Timer A Channel 2 Register Low
TASC3                 0x002F     Timer A Channel 3 Status and Control Register
TASC3.CH3F             7   Channel 3 Flag Bit              
TASC3.CH3IE            6   Channel 3 Interrupt Enable Bit  
TASC3.MS3A             4   Mode Select Bit A               
TASC3.ELS3B            3   Edge/Level Select Bits          
TASC3.ELS3A            2   Edge/Level Select Bits          
TASC3.TOV3             1   Toggle-On-Overflow Bit          
TASC3.CH3MAX           0   Channel 3 Maximum Duty Cycle Bit
TACH3H                0x0030     Timer A Channel 3 Register High
TACH3L                0x0031     Timer A Channel 3 Register Low
TASC4                 0x0032     Timer A Channel 4 Status and Control Register
TASC4.CH4F             7   Channel 4 Flag Bit              
TASC4.CH4IE            6   Channel 4 Interrupt Enable Bit  
TASC4.MS4B             5   Mode Select Bit B               
TASC4.MS4A             4   Mode Select Bit A               
TASC4.ELS4B            3   Edge/Level Select Bits          
TASC4.ELS4A            2   Edge/Level Select Bits          
TASC4.TOV4             1   Toggle-On-Overflow Bit          
TASC4.CH4MAX           0   Channel 4 Maximum Duty Cycle Bit
TACH4H                0x0033     Timer A Channel 4 Register High
TACH4L                0x0034     Timer A Channel 4 Register Low
TASC5                 0x0035     Timer A Channel 5 Status and Control Register
TASC5.CH5F             7   Channel 5 Flag Bit              
TASC5.CH5IE            6   Channel 5 Interrupt Enable Bit  
TASC5.MS5A             4   Mode Select Bit A               
TASC5.ELS5B            3   Edge/Level Select Bits          
TASC5.ELS5A            2   Edge/Level Select Bits          
TASC5.TOV5             1   Toggle-On-Overflow Bit          
TASC5.CH5MAX           0   Channel 5 Maximum Duty Cycle Bit
TACH5H                0x0036     Timer A Channel 5 Register High
TACH5L                0x0037     Timer A Channel 5 Register Low
ADSCR                 0x0038     Analog-to-Digital Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADR                   0x0039     Analog-to-Digital Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADICLK                0x003A     Analog-to-Digital Input Clock Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bits 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bits 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bits 0
ADICLK.ADICLK          4   ADC Input Clock Register Bit
RESERV003B            0x003B     RESERVED
RESERV003C            0x003C     RESERVED
RESERV003D            0x003D     RESERVED
RESERV003E            0x003E     RESERVED
RESERV003F            0x003F     RESERVED
TBSCR                 0x0040     Timer B Status and Control Register
TBSCR.TOF              7   TIMB Overflow Flag Bit
TBSCR.TOIE             6   TIMB Overflow Interrupt Enable Bit
TBSCR.TSTOP            5   TIMB Stop Bit
TBSCR.TRST             4   TIMB Reset Bit
TBSCR.PS2              2   Prescaler Select Bits 2
TBSCR.PS1              1   Prescaler Select Bits 1
TBSCR.PS0              0   Prescaler Select Bits 0
TBCNTH                0x0041     Timer B Counter Register High
TBCNTL                0x0042     Timer B Counter Register Low
TBMODH                0x0043     Timer B Modulo Register High
TBMODL                0x0044     Timer B Modulo Register Low
TBSC0                 0x0045     Timer B CH0 Status and Control Register
TBSC0.CH0F             7   Channel 0 Flag Bit
TBSC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TBSC0.MS0B             5   Mode Select Bit B
TBSC0.MS0A             4   Mode Select Bit A
TBSC0.ELS0B            3   Edge/Level Select Bits B
TBSC0.ELS0A            2   Edge/Level Select Bits A
TBSC0.TOV0             1   Toggle-On-Overflow Bit
TBSC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TBCH0H                0x0046     Timer B CH0 Register High
TBCH0L                0x0047     Timer B CH0 Register Low
TBSC1                 0x0048     Timer B CH1 Status and Control Register
TBSC1.CH1F             7   Channel 1 Flag Bit            
TBSC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TBSC1.MS1A             4   Mode Select Bit A               
TBSC1.ELS1B            3   Edge/Level Select Bits B        
TBSC1.ELS1A            2   Edge/Level Select Bits A        
TBSC1.TOV1             1   Toggle-On-Overflow Bit          
TBSC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TBCH1H                0x0049     Timer B CH1 Register High
TBCH1L                0x004A     Timer B CH1 Register Low
PSC                   0x004B     PIT Status and Control Register
PSC.POF                7   PIT Overflow Flag Bit
PSC.POIE               6   PIT Overflow Interrupt Enable Bit
PSC.PSTOP              5   PIT Stop Bit
PSC.PRST               4   PIT Reset Bit
PSC.PPS2               2   Prescaler Select Bits 2
PSC.PPS1               1   Prescaler Select Bits 1
PSC.PPS0               0   Prescaler Select Bits 0
PCNTH                 0x004C     PIT Counter Register High
PCNTL                 0x004D     PIT Counter Register Low
PMODH                 0x004E     PIT Modulo Register High
PMODL                 0x004F     PIT Modulo Register Low
CMCR0                 0x0500	 Module Control Register 0
CMCR0.SYNCH            4   Synchronized Status
CMCR0.TLNKEN           3   Timer Enable
CMCR0.SLPAK            2   Sleep Mode Acknowledge
CMCR0.SLPRQ            1   Sleep Request, Go to Internal Sleep Mode
CMCR0.SFTRES           0   Soft Reset
CMCR1                 0x0501      Module Control Register 1
CMCR1.LOOPB            2   Loop Back Self-Test Mode
CMCR1.WUPM             1   Wakeup Mode
CMCR1.CLKSRC           0   Clock Source
CBTR0                 0x0502     Bus Timing Register 0
CBTR0.SJW1             7   Synchronization Jump Width 1
CBTR0.SJW0             6   Synchronization Jump Width 0
CBTR0.BRP5             5   Baud Rate Prescaler 5
CBTR0.BRP4             4   Baud Rate Prescaler 4
CBTR0.BRP3             3   Baud Rate Prescaler 3
CBTR0.BRP2             2   Baud Rate Prescaler 2
CBTR0.BRP1             1   Baud Rate Prescaler 1
CBTR0.BRP0             0   Baud Rate Prescaler 0
CBTR1                 0x0503     Bus Timing Register 1
CBTR1.SAMP             7   Sampling
CBTR1.TSEG22           6   Time Segment22
CBTR1.TSEG21           5   Time Segment21
CBTR1.TSEG20           4   Time Segment20
CBTR1.TSEG13           3   Time Segment13
CBTR1.TSEG12           2   Time Segment12
CBTR1.TSEG11           1   Time Segment11
CBTR1.TSEG10           0   Time Segment10
CRFLG                 0x0504     Receiver Flag Register
CRFLG.WUPIF            7   Wakeup Interrupt Flag
CRFLG.RWRNIF           6   Receiver Warning Interrupt Flag
CRFLG.TWRNIF           5   Transmitter Warning Interrupt Flag
CRFLG.RERRIF           4   Receiver Error Passive Interrupt Flag
CRFLG.TERRIF           3   Transmitter Error Passive Interrupt Flag
CRFLG.BOFFIF           2   Bus-Off Interrupt Flag
CRFLG.OVRIF            1   Overrun Interrupt Flag
CRFLG.RXF              0   Receive Buffer Full
CRIER                 0x0505     Receiver Interrupt Enable Register
CRIER.WUPIE            7   Wakeup Interrupt Enable
CRIER.RWRNIE           6   Receiver Warning Interrupt Enable
CRIER.TWRNIE           5   Transmitter Warning Interrupt Enable
CRIER.RERRIE           4   Receiver Error Passive Interrupt Enable
CRIER.TERRIE           3   Transmitter Error Passive Interrupt Enable
CRIER.BOFFIE           2   Bus-Off Interrupt Enable
CRIER.OVRIE            1   Overrun Interrupt Enable
CRIER.RXFIE            0   Receiver Full Interrupt Enable
CTFLG                 0x0506     Transmitter Flag Register
CTFLG.ABTAK2           6   Abort Acknowledge 2
CTFLG.ABTAK1           5   Abort Acknowledge 1
CTFLG.ABTAK0           4   Abort Acknowledge 0
CTFLG.TXE2             2   Transmitter Empty 2
CTFLG.TXE1             1   Transmitter Empty 1
CTFLG.TXE0             0   Transmitter Empty 0
CTCR                  0x0507     Transmitter Control Register
CTCR.ABTRQ2            6   Abort Request 2
CTCR.ABTRQ1            5   Abort Request 1
CTCR.ABTRQ0            4   Abort Request 0
CTCR.TXEIE2            2   Transmitter Empty Interrupt Enable 2
CTCR.TXEIE1            1   Transmitter Empty Interrupt Enable 1
CTCR.TXEIE0            0   Transmitter Empty Interrupt Enable 0
CIDAC                 0x0508     Identifier Acceptance Control Register
CIDAC.IDAM1            5   Identifier Acceptance Mode 1
CIDAC.IDAM0            4   Identifier Acceptance Mode 0
CIDAC.IDHIT1           1   Identifier Acceptance Hit Indicator 1
CIDAC.IDHIT0           0   Identifier Acceptance Hit Indicator 0
RESERV0509            0x0509     RESERVED
CRXERR                0x050E     Receiver Error Counter
CRXERR.RXERR7          7
CRXERR.RXERR6          6
CRXERR.RXERR5          5
CRXERR.RXERR4          4
CRXERR.RXERR3          3
CRXERR.RXERR2          2
CRXERR.RXERR1          1
CRXERR.RXERR0          0
CTXERR                0x050F     Transmit Error Counter
CTXERR.TXERR7          7
CTXERR.TXERR6          6
CTXERR.TXERR5          5
CTXERR.TXERR4          4
CTXERR.TXERR3          3
CTXERR.TXERR2          2
CTXERR.TXERR1          1
CTXERR.TXERR0          0
CIDAR0                0x0510     Identifier Acceptance Registers 0
CIDAR0.AC7             7   Acceptance Code Bits 7
CIDAR0.AC6             6   Acceptance Code Bits 6
CIDAR0.AC5             5   Acceptance Code Bits 5
CIDAR0.AC4             4   Acceptance Code Bits 4
CIDAR0.AC3             3   Acceptance Code Bits 3
CIDAR0.AC2             2   Acceptance Code Bits 2
CIDAR0.AC1             1   Acceptance Code Bits 1
CIDAR0.AC0             0   Acceptance Code Bits 0
CIDAR1                0x0511     Identifier Acceptance Registers 1
CIDAR1.AC7             7   Acceptance Code Bits 7
CIDAR1.AC6             6   Acceptance Code Bits 6
CIDAR1.AC5             5   Acceptance Code Bits 5
CIDAR1.AC4             4   Acceptance Code Bits 4
CIDAR1.AC3             3   Acceptance Code Bits 3
CIDAR1.AC2             2   Acceptance Code Bits 2
CIDAR1.AC1             1   Acceptance Code Bits 1
CIDAR1.AC0             0   Acceptance Code Bits 0
CIDAR2                0x0512     Identifier Acceptance Registers 2
CIDAR2.AC7             7   Acceptance Code Bits 7
CIDAR2.AC6             6   Acceptance Code Bits 6
CIDAR2.AC5             5   Acceptance Code Bits 5
CIDAR2.AC4             4   Acceptance Code Bits 4
CIDAR2.AC3             3   Acceptance Code Bits 3
CIDAR2.AC2             2   Acceptance Code Bits 2
CIDAR2.AC1             1   Acceptance Code Bits 1
CIDAR2.AC0             0   Acceptance Code Bits 0
CIDAR3                0x0513     Identifier Acceptance Registers 3
CIDAR3.AC7             7   Acceptance Code Bits 7
CIDAR3.AC6             6   Acceptance Code Bits 6
CIDAR3.AC5             5   Acceptance Code Bits 5
CIDAR3.AC4             4   Acceptance Code Bits 4
CIDAR3.AC3             3   Acceptance Code Bits 3
CIDAR3.AC2             2   Acceptance Code Bits 2
CIDAR3.AC1             1   Acceptance Code Bits 1
CIDAR3.AC0             0   Acceptance Code Bits 0
CIDMRO                0x0514     Identifier Mask Registers 0
CIDMRO.AM7             7   Acceptance Mask Bits 7
CIDMRO.AM6             6   Acceptance Mask Bits 6
CIDMRO.AM5             5   Acceptance Mask Bits 5
CIDMRO.AM4             4   Acceptance Mask Bits 4
CIDMRO.AM3             3   Acceptance Mask Bits 3
CIDMRO.AM2             2   Acceptance Mask Bits 2
CIDMRO.AM1             1   Acceptance Mask Bits 1
CIDMRO.AM0             0   Acceptance Mask Bits 0
CIDMR1                0x0515     Identifier Mask Registers 1
CIDMR1.AM7             7   Acceptance Mask Bits 7
CIDMR1.AM6             6   Acceptance Mask Bits 6
CIDMR1.AM5             5   Acceptance Mask Bits 5
CIDMR1.AM4             4   Acceptance Mask Bits 4
CIDMR1.AM3             3   Acceptance Mask Bits 3
CIDMR1.AM2             2   Acceptance Mask Bits 2
CIDMR1.AM1             1   Acceptance Mask Bits 1
CIDMR1.AM0             0   Acceptance Mask Bits 0
CIDMR2                0x0516     Identifier Mask Registers 2
CIDMR2.AM7             7   Acceptance Mask Bits 7
CIDMR2.AM6             6   Acceptance Mask Bits 6
CIDMR2.AM5             5   Acceptance Mask Bits 5
CIDMR2.AM4             4   Acceptance Mask Bits 4
CIDMR2.AM3             3   Acceptance Mask Bits 3
CIDMR2.AM2             2   Acceptance Mask Bits 2
CIDMR2.AM1             1   Acceptance Mask Bits 1
CIDMR2.AM0             0   Acceptance Mask Bits 0
CIDMR3                0x0517     Identifier Mask Registers 3
CIDMR3.AM7             7   Acceptance Mask Bits 7
CIDMR3.AM6             6   Acceptance Mask Bits 6
CIDMR3.AM5             5   Acceptance Mask Bits 5
CIDMR3.AM4             4   Acceptance Mask Bits 4
CIDMR3.AM3             3   Acceptance Mask Bits 3
CIDMR3.AM2             2   Acceptance Mask Bits 2
CIDMR3.AM1             1   Acceptance Mask Bits 1
CIDMR3.AM0             0   Acceptance Mask Bits 0
IDR0                  0x05B0     IDENTIFIER REGISTER 0
IDR0.ID28	       7
IDR0.ID27	       6
IDR0.ID26	       5
IDR0.ID25	       4
IDR0.ID24	       3
IDR0.ID23	       2 
IDR0.ID22	       1
IDR0.ID21	       0
IDR1                  0x05B1     IDENTIFIER REGISTER 1
IDR1.ID20              7
IDR1.ID19              6
IDR1.ID18              5
IDR1.SRR               4   Substitute Remote Request
IDR1.IDE               3   ID Extended
IDR1.ID17              2
IDR1.ID16              1
IDR1.ID15              0
IDR2                  0x05B2     IDENTIFIER REGISTER 2
IDR2.ID14              7
IDR2.ID13              6
IDR2.ID12              5
IDR2.ID11              4
IDR2.ID10              3
IDR2.ID9               2
IDR2.ID8               1
IDR2.ID7               0
IDR3                  0x05B3     IDENTIFIER REGISTER 3
IDR3.ID6               7
IDR3.ID5               6
IDR3.ID4               5
IDR3.ID3               4
IDR3.ID2               3
IDR3.ID1               2
IDR3.ID0               1
IDR3.RTR               0   Remote Transmission Request
DSR0                  0x05B4     DATA SEGMENT REGISTER 0
DSR0.DB7               7
DSR0.DB6               6
DSR0.DB5               5
DSR0.DB4               4
DSR0.DB3               3
DSR0.DB2               2
DSR0.DB1               1
DSR0.DB0               0
DSR1                  0x05B5     DATA SEGMENT REGISTER 1
DSR1.DB7               7
DSR1.DB6               6
DSR1.DB5               5
DSR1.DB4               4
DSR1.DB3               3
DSR1.DB2               2
DSR1.DB1               1
DSR1.DB0               0
DSR2                  0x05B6     DATA SEGMENT REGISTER 2
DSR2.DB7               7
DSR2.DB6               6
DSR2.DB5               5
DSR2.DB4               4
DSR2.DB3               3
DSR2.DB2               2
DSR2.DB1               1
DSR2.DB0               0
DSR3                  0x05B7     DATA SEGMENT REGISTER 3
DSR3.DB7               7
DSR3.DB6               6
DSR3.DB5               5
DSR3.DB4               4
DSR3.DB3               3
DSR3.DB2               2
DSR3.DB1               1
DSR3.DB0               0
DSR4                  0x05B8     DATA SEGMENT REGISTER 4
DSR4.DB7               7
DSR4.DB6               6
DSR4.DB5               5
DSR4.DB4               4
DSR4.DB3               3
DSR4.DB2               2
DSR4.DB1               1
DSR4.DB0               0
DSR5                  0x05B9     DATA SEGMENT REGISTER 5
DSR5.DB7               7
DSR5.DB6               6
DSR5.DB5               5
DSR5.DB4               4
DSR5.DB3               3
DSR5.DB2               2
DSR5.DB1               1
DSR5.DB0               0
DSR6                  0x05BA     DATA SEGMENT REGISTER 6
DSR6.DB7               7
DSR6.DB6               6
DSR6.DB5               5
DSR6.DB4               4
DSR6.DB3               3
DSR6.DB2               2
DSR6.DB1               1
DSR6.DB0               0
DSR7                  0x05BB     DATA SEGMENT REGISTER 7
DSR7.DB7               7
DSR7.DB6               6
DSR7.DB5               5
DSR7.DB4               4
DSR7.DB3               3
DSR7.DB2               2
DSR7.DB1               1
DSR7.DB0               0
DLR                   0x05BC     DATA LENGTH REGISTER
DLR.DLC3               3   Data Length Code Bits 3
DLR.DLC2               2   Data Length Code Bits 2
DLR.DLC1               1   Data Length Code Bits 1
DLR.DLC0               0   Data Length Code Bits 0
TBPR                  0x05BD     TRANSMIT BUFFER PRIORITY REGISTER
TBPR.PRIO7             7   Local Priority 7
TBPR.PRIO6             6   Local Priority 6
TBPR.PRIO5             5   Local Priority 5
TBPR.PRIO4             4   Local Priority 4
TBPR.PRIO3             3   Local Priority 3
TBPR.PRIO2             2   Local Priority 2
TBPR.PRIO1             1   Local Priority 1
TBPR.PRIO0             0   Local Priority 0
RESERV05BE            0x05BE     RESERVED
RESERV05BF            0x05BF     RESERVED
SBSR                  0xFE00     SIM Break Status Register
SBSR.BW                1   SIM Break Wait
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Bit
SRSR.PIN               6   External Reset Bit
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit (opcode fetches only)
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
CONFIG2               0xFE09     Configuration Write-Once Register
CONFIG2.EEDIVCLK       7   EEPROM Timebase Divider Clock select bit
CONFIG2.MSCAND         4   MSCAN Disable Bit
CONFIG2.AT60A          3   Device indicator
CONFIG2.AZxx           0   AZxx Emulator Enable Bit
BRKH                  0xFE0C     Break Address Register High
BRKL                  0xFE0D     Break Address Register Low
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
LVISR                 0xFE0F     LVI Status Register
LVISR.LVIOUT           7   LVI Output Bit
FLCR2                 0xFE11     Flash Control Register
FLCR2.FDIV1            7   Frequency Divide Control Bit 1
FLCR2.FDIV0            6   Frequency Divide Control Bit 0
FLCR2.BLK1             5   Block Erase Control Bit 1
FLCR2.BLK0             4   Block Erase Control Bit 0
FLCR2.HVEN             3   High-Voltage Enable Bit
FLCR2.MARGIN           2   Margin Read Control Bit
FLCR2.ERASE            1   Erase Control Bit
FLCR2.PGM              0   Program Control Bit
EENVR2                0xFE18     EEPROM Nonvolatile Register
EENVR2.EERA            7   EEPROM Redundant Array
EENVR2.CON2            6   MCU Configuration Bit 2
EENVR2.CON1            5   MCU Configuration Bit 1
EENVR2.EEPRTCT         4   EEPROM Protection
EENVR2.EEBP3           3   EEPROM Block Protection Bit 3
EENVR2.EEBP2           2   EEPROM Block Protection Bit 2
EENVR2.EEBP1           1   EEPROM Block Protection Bit 1
EENVR2.EEBP0           0   EEPROM Block Protection Bit 0
EECR2                 0xFE18     EEPROM Control Register
EECR2.EEBCLK           7   EEPROM Bus Clock Enable    
EECR2.EEOFF            5   EEPROM Power Down          
EECR2.EERAS1           4   Erase Bit 1                
EECR2.EERAS0           3   Erase Bit 0                
EECR2.EELAT            2   EEPROM Latch Control       
EECR2.EEPGM            0   EEPROM Program/Erase Enable
RESERVFE1A            0xFE1A     RESERVED
EEACR2                0xFE1B     EEPROM Array Control Register
EEACR2.EERA            7   EEPROM Redundant Array       
EEACR2.CON2            6   MCU Configuration Bit 2      
EEACR2.CON1            5   MCU Configuration Bit 1      
EEACR2.EEPRTCT         4   EEPROM Protection            
EEACR2.EEBP3           3   EEPROM Block Protection Bit 3
EEACR2.EEBP2           2   EEPROM Block Protection Bit 2
EEACR2.EEBP1           1   EEPROM Block Protection Bit 1
EEACR2.EEBP0           0   EEPROM Block Protection Bit 0
EENVR1                0xFE1C     EEPROM Nonvolatile Register
EENVR1.EERA            7   EEPROM Redundant Array       
EENVR1.CON2            6   MCU Configuration Bit 2      
EENVR1.CON1            5   MCU Configuration Bit 1      
EENVR1.EEPRTCT         4   EEPROM Protection            
EENVR1.EEBP3           3   EEPROM Block Protection Bit 3
EENVR1.EEBP2           2   EEPROM Block Protection Bit 2
EENVR1.EEBP1           1   EEPROM Block Protection Bit 1
EENVR1.EEBP0           0   EEPROM Block Protection Bit 0
EECR1                 0xFE1D     EEPROM Control Register
EECR1.EEBCLK           7   EEPROM Bus Clock Enable
EECR1.EEOFF            5   EEPROM Power Down
EECR1.EERAS1           4   Erase Bit 1
EECR1.EERAS0           3   Erase Bit 0
EECR1.EELAT            2   EEPROM Latch Control
EECR1.EEPGM            0   EEPROM Program/Erase Enable
RESERVFE1E            0xFE1E     RESERVED
EEACR1                0xFE1F     EEPROM Array Control Register
EEACR1.EERA            7   EEPROM Redundant Array       
EEACR1.CON2            6   MCU Configuration Bit 2      
EEACR1.CON1            5   MCU Configuration Bit 1      
EEACR1.EEPRTCT         4   EEPROM Protection            
EEACR1.EEBP3           3   EEPROM Block Protection Bit 3
EEACR1.EEBP2           2   EEPROM Block Protection Bit 2
EEACR1.EEBP1           1   EEPROM Block Protection Bit 1
EEACR1.EEBP0           0   EEPROM Block Protection Bit 0
FLBPR1                0xFF80     FLASH-1 Block Protect Register
FLBPR1.BPR3            3   Block Protect Register BIT3
FLBPR1.BPR2            2   Block Protect Register BIT2
FLBPR1.BPR1            1   Block Protect Register BIT1
FLBPR1.BPR0            0   Block Protect Register BIT0
FLBPR2                0xFF81     FLASH-2 Block Protect Register
FLBPR2.BPR3            3   Block Protect Register Bit3
FLBPR2.BPR2            2   Block Protect Register Bit2
FLBPR2.BPR1            1   Block Protect Register Bit1
FLBPR2.BPR0            0   Block Protect Register Bit0
COPCTL                0xFFFF     COP Control Register


.68HC908AZ60A
; MC68HC908AZ60A/D  http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=68HC908AZ60A&nodeId=01M98634
; MC68HC908AZ60A.pdf

; 60K Bytes of FLASH EEPROM
; 2048 Bytes of RAM
; 1024 Bytes of EEPROM with Protect Option
; 52 Bytes of User-Defined Vectors
; 256 Bytes of Monitor ROM


; MEMORY MAP
area DATA FSR		  0x0000:0x0050
area DATA RAM_1		  0x0050:0x0450
area DATA FLASH_2_1	  0x0450:0x0500
area DATA CAN_CONTROL	  0x0500:0x0580
area DATA FLASH_2_2	  0x0580:0x0600
area DATA EEPROM_2	  0x0600:0x0800
area DATA EEPROM_1	  0x0800:0x0A00
area DATA RAM_2		  0x0A00:0x0E00
area DATA FLASH_2_2	  0x0E00:0x8000
area DATA FLASH_1	  0x8000:0xFE00
area DATA FSR_1		  0xFE00:0xFE20
area DATA MONITOR_ROM	  0xFE20:0xFF20
area BSS  UNIMPLEMENTED	  0xFF20:0xFF70
area DATA FSR_2		  0xFF70:0xFF89
area BSS  RESERVED	  0xFF89:0xFFCC
area DATA USER_VEC	  0xFFCC:0x10000


; Interrupt and reset vector assignments
interrupt __RESET      0xFFFE       Reset Vector
interrupt SWI          0xFFFC       SWI Vector
interrupt IRQ1         0xFFFA       IRQ1 Vector
interrupt PLL          0xFFF8       PLL Vector
interrupt PIT          0xFFF6       PIT Vector
interrupt TIMA_CH0     0xFFF4       TIMA CH0 Vector
interrupt TIMA_CH1     0xFFF2       TIMA CH1 Vector
interrupt TIMA_CH2     0xFFF0       TIMA CH2 Vector
interrupt TIMA_CH3     0xFFEE       TIMA CH3 Vector
interrupt TIMA         0xFFEC       TIMA Overflow Vector
interrupt TIMB_CH0     0xFFEA       TIMB CH0 Vector
interrupt TIMB_CH1     0xFFE8       TIMB CH1 Vector
interrupt TIMB         0xFFE6       TIMB Overflow Vector
interrupt SPI_R        0xFFE4       SPI Receive Vector
interrupt SPI_T        0xFFE2       SPI Transmit Vector
interrupt CAN_W        0xFFE0       CAN Wakeup Vector
interrupt CAN_E        0xFFDE       CAN Error Vector
interrupt CAN_R        0xFFDC       CAN Receive Vector
interrupt CAN_T        0xFFDA       CAN Transmit Vector
interrupt SCI_E        0xFFD8       SCI Error Vector
interrupt SCI_R        0xFFD6       SCI Receive Vector
interrupt SCI_T        0xFFD4       SCI Transmit Vector
interrupt KBRD         0xFFD2       Keyboard Vector
interrupt ADC          0xFFD0       ADC Vector
interrupt TIMA_CH4     0xFFCE       TIMA Channel 4 Vector
interrupt TIMA_CH5     0xFFCC       TIMA Channel 5 Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bits 7
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
PTC                   0x0002     Port C Data Register
PTC.PTC5               5   Port C Data Bits 5
PTC.PTC4               4   Port C Data Bits 4
PTC.PTC3               3   Port C Data Bits 3
PTC.PTC2               2   Port C Data Bits 2
PTC.PTC1               1   Port C Data Bits 1
PTC.PTC0               0   Port C Data Bits 0
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bits 7
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bits 7
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
DDRC                  0x0006     Data Direction Register C
DDRC.MCLKEN            7   MCLK Enable Bit
DDRC.DDRC5             4   Data Direction Register C Bits 4
DDRC.DDRC4             3   Data Direction Register C Bits 3
DDRC.DDRC3             2   Data Direction Register C Bits 2
DDRC.DDRC2             1   Data Direction Register C Bits 1
DDRC.DDRC1             0   Data Direction Register C Bits 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bits 7
DDRD.DDRD6             6   Data Direction Register D Bits 6
DDRD.DDRD5             5   Data Direction Register D Bits 5
DDRD.DDRD4             4   Data Direction Register D Bits 4
DDRD.DDRD3             3   Data Direction Register D Bits 3
DDRD.DDRD2             2   Data Direction Register D Bits 2
DDRD.DDRD1             1   Data Direction Register D Bits 1
DDRD.DDRD0             0   Data Direction Register D Bits 0
PTE                   0x0008     Port E Data Register
PTE.PTE7               7   Port E Data Bits 7
PTE.PTE6               6   Port E Data Bits 6
PTE.PTE5               5   Port E Data Bits 5
PTE.PTE4               4   Port E Data Bits 4
PTE.PTE3               3   Port E Data Bits 3
PTE.PTE2               2   Port E Data Bits 2
PTE.PTE1               1   Port E Data Bits 1
PTE.PTE0               0   Port E Data Bits 0
PTF                   0x0009     Port F Data Register
PTF.PTF6               6   Port F Data Bits 6
PTF.PTF5               5   Port F Data Bits 5
PTF.PTF4               4   Port F Data Bits 4
PTF.PTF3               3   Port F Data Bits 3
PTF.PTF2               2   Port F Data Bits 2
PTF.PTF1               1   Port F Data Bits 1
PTF.PTF0               0   Port F Data Bits 0
PTG                   0x000A     Port G Data Register
PTG.PTG2               2   Port G Data Bits 2
PTG.PTG1               1   Port G Data Bits 1
PTG.PTG0               0   Port G Data Bits 0
PTH                   0x000B     Port H Data Register
PTH.PTH1               1   Port H Data Bits 1
PTH.PTH0               0   Port H Data Bits 0
DDRE                  0x000C     Data Direction Register E
DDRE.DDRE7             7   Data Direction Register E Bits 7
DDRE.DDRE6             6   Data Direction Register E Bits 6
DDRE.DDRE5             5   Data Direction Register E Bits 5
DDRE.DDRE4             4   Data Direction Register E Bits 4
DDRE.DDRE3             3   Data Direction Register E Bits 3
DDRE.DDRE2             2   Data Direction Register E Bits 2
DDRE.DDRE1             1   Data Direction Register E Bits 1
DDRE.DDRE0             0   Data Direction Register E Bits 0
DDRF                  0x000D     Data Direction Register F
DDRF.DDRF6             6   Data Direction Register F Bits 6
DDRF.DDRF5             5   Data Direction Register F Bits 5
DDRF.DDRF4             4   Data Direction Register F Bits 4
DDRF.DDRF3             3   Data Direction Register F Bits 3
DDRF.DDRF2             2   Data Direction Register F Bits 2
DDRF.DDRF1             1   Data Direction Register F Bits 1
DDRF.DDRF0             0   Data Direction Register F Bits 0
DDRG                  0x000E     Data Direction Register G
DDRG.DDRG2             2   Data Direction Register G Bits 2
DDRG.DDRG1             1   Data Direction Register G Bits 1
DDRG.DDRG0             0   Data Direction Register G Bits 0
DDRH                  0x000F     Data Direction Register H
DDRH.DDRH1             1   Data Direction Register H Bits 1
DDRH.DDRH0             0   Data Direction Register H Bits 0
SPCR                  0x0010     SPI Control Register
SPCR.SPRIE             7   SPI Receiver Interrupt Enable Bit
SPCR.SPMSTR            5   SPI Master Bit
SPCR.CPOL              4   Clock Polarity Bit
SPCR.CPHA              3   Clock Phase Bit
SPCR.SPWOM             2   SPI Wired-OR Mode Bit
SPCR.SPE               1   SPI Enable Bit
SPCR.SPTIE             0   SPI Transmit Interrupt Enable Bit
SPSCR                 0x0011     SPI Status and Control Register
SPSCR.SPRF             7   SPI Receiver Full Bit
SPSCR.ERRIE            6   Error Interrupt Enable Bit
SPSCR.OVRF             5   Overflow Bit
SPSCR.MODF             4   Mode Fault Bit
SPSCR.SPTE             3   SPI Transmitter Empty Bit
SPSCR.MODFEN           2   Mode Fault Enable Bit
SPSCR.SPR1             1   SPI Baud Rate Select Bits 1
SPSCR.SPR0             0   SPI Baud Rate Select Bits 0
SPDR                  0x0012     SPI Data Register
SPDR.R7_T7             7   Receive/Transmit Data Bits 7
SPDR.R6_T6             6   Receive/Transmit Data Bits 6
SPDR.R5_T5             5   Receive/Transmit Data Bits 5
SPDR.R4_T4             4   Receive/Transmit Data Bits 4
SPDR.R3_T3             3   Receive/Transmit Data Bits 3
SPDR.R2_T2             2   Receive/Transmit Data Bits 2
SPDR.R1_T1             1   Receive/Transmit Data Bits 1
SPDR.R0_T0             0   Receive/Transmit Data Bits 0
SCC1                  0x0013     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit
SCC1.ENSCI             6   Enable SCI Bit
SCC1.TXINV             5   Transmit Inversion Bit
SCC1.M                 4   Mode (Character Length) Bit
SCC1.WAKE              3   Wakeup Condition Bit
SCC1.ILTY              2   Idle Line Type Bit
SCC1.PEN               1   Parity Enable Bit
SCC1.PTY               0   Parity Bit
SCC2                  0x0014     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit
SCC2.ILIE              4   Idle Line Interrupt Enable Bit
SCC2.TE                3   Transmitter Enable Bit
SCC2.RE                2   Receiver Enable Bit
SCC2.RWU               1   Receiver Wakeup Bit
SCC2.SBK               0   Send Break Bit
SCC3                  0x0015     SCI Control Register 3
SCC3.R8                7   Received Bit
SCC3.T8                6   Transmitted Bit
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit
SCS1                  0x0016     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit
SCS1.TC                6   Transmission Complete Bit
SCS1.SCRF              5   SCI Receiver Full Bit
SCS1.IDLE              4   Receiver Idle Bit
SCS1.OR                3   Receiver Overrun Bit
SCS1.NF                2   Receiver Noise Flag Bit
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit
SCS2                  0x0017     SCI Status Register 2
SCS2.BKF               1   Break Flag Bit
SCS2.RPF               0   Reception in Progress Flag Bit
SCDR                  0x0018     SCI Data Register
SCDR.R7_T7             7   Receive/Transmit Data Bits 7
SCDR.R6_T6             6   Receive/Transmit Data Bits 6
SCDR.R5_T5             5   Receive/Transmit Data Bits 5
SCDR.R4_T4             4   Receive/Transmit Data Bits 4
SCDR.R3_T3             3   Receive/Transmit Data Bits 3
SCDR.R2_T2             2   Receive/Transmit Data Bits 2
SCDR.R1_T1             1   Receive/Transmit Data Bits 1
SCDR.R0_T0             0   Receive/Transmit Data Bits 0
SCBR                  0x0019     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2
SCBR.SCR1              1   SCI Baud Rate Select Bits 1
SCBR.SCR0              0   SCI Baud Rate Select Bits 0
ISCR                  0x001A     IRQ Status and Control Register
ISCR.IRQF              3   IRQ Flag Bit
ISCR.ACK               2   IRQ Interrupt Request Acknowledge Bit
ISCR.IMASK             1   IRQ Interrupt Mask Bit
ISCR.MODE              0   IRQ Edge/Level Select Bit
KBSCR                 0x001B     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
PCTL                  0x001C     PLL Control Register
PCTL.PLLIE             7   PLL Interrupt Enable Bit
PCTL.PLLF              6   PLL Flag Bit
PCTL.PLLON             5   PLL On Bit
PCTL.BCS               4   Base Clock Select Bit
PBWC                  0x001D     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               5   Acquisition Mode Bit
PBWC.XLD               4   Crystal Loss Detect Bit
PPG                   0x001E     PLL Programming Register
PPG.MUL7               7   Multiplier Select Bits 7
PPG.MUL6               6   Multiplier Select Bits 6
PPG.MUL5               5   Multiplier Select Bits 5
PPG.MUL4               4   Multiplier Select Bits 4
PPG.VRS7               3   VCO Range Select Bits 7
PPG.VRS6               2   VCO Range Select Bits 6
PPG.VRS5               1   VCO Range Select Bits 5
PPG.VRS4               0   VCO Range Select Bits 4
CONFIG1               0x001F     Configuration Write-Once Register
CONFIG1.LVISTOP        7   LVI Stop Mode Enable Bit
CONFIG1.LVIRST         5   LVI Reset Enable Bit
CONFIG1.LVIPWR         4   LVI Power Enable Bit
CONFIG1.SSREC          3   Short Stop Recovery Bit
CONFIG1.COPL           2   COP Long Timeout
CONFIG1.STOP           1   STOP Instruction Enable Bit
CONFIG1.COPD           0   COP Disable Bit
TASC                  0x0020     Timer A Status and Control Register
TASC.TOF               7   TIMA Overflow Flag Bit
TASC.TOIE              6   TIMA Overflow Interrupt Enable Bit
TASC.TSTOP             5   TIMA Stop Bit
TASC.TRST              4   TIMA Reset Bit
TASC.PS2               2   Prescaler Select Bits 2
TASC.PS1               1   Prescaler Select Bits 1
TASC.PS0               0   Prescaler Select Bits 0
KBIER                 0x0021     Keyboard Interrupt Enable Register
KBIER.KBIE4            4   Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Keyboard Interrupt Enable Bits 0
TACNTH                0x0022     Timer A Counter Register High
TACNTL                0x0023     Timer A Counter Register Low
TAMODH                0x0024     Timer A Modulo Register High
TAMODL                0x0025     Timer A Modulo Register Low
TASC0                 0x0026     Timer A Channel 0 Status and Control Register
TASC0.CH0F             7   Channel 0 Flag Bit
TASC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TASC0.MS0B             5   Mode Select Bit B
TASC0.MS0A             4   Mode Select Bit A
TASC0.ELS0B            3   Edge/Level Select Bits
TASC0.ELS0A            2   Edge/Level Select Bits
TASC0.TOV0             1   Toggle-On-Overflow Bit
TASC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TACH0H                0x0027     Timer A Channel 0 Register High
TACH0L                0x0028     Timer A Channel 0 Register Low
TASC1                 0x0029     Timer A Channel 1 Status and Control Register
TASC1.CH1F             7   Channel 1 Flag Bit            
TASC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TASC1.MS1A             4   Mode Select Bit A               
TASC1.ELS1B            3   Edge/Level Select Bits          
TASC1.ELS1A            2   Edge/Level Select Bits          
TASC1.TOV1             1   Toggle-On-Overflow Bit          
TASC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TACH1H                0x002A     Timer A Channel 1 Register High
TACH1L                0x002B     Timer A Channel 1 Register Low
TASC2                 0x002C     Timer A Channel 2 Status and Control Register
TASC2.CH2F             7   Channel 2 Flag Bit              
TASC2.CH2IE            6   Channel 2 Interrupt Enable Bit  
TASC2.MS2B             5   Mode Select Bit B               
TASC2.MS2A             4   Mode Select Bit A               
TASC2.ELS2B            3   Edge/Level Select Bits          
TASC2.ELS2A            2   Edge/Level Select Bits          
TASC2.TOV2             1   Toggle-On-Overflow Bit          
TASC2.CH2MAX           0   Channel 2 Maximum Duty Cycle Bit
TACH2H                0x002D     Timer A Channel 2 Register High
TACH2L                0x002E     Timer A Channel 2 Register Low
TASC3                 0x002F     Timer A Channel 3 Status and Control Register
TASC3.CH3F             7   Channel 3 Flag Bit              
TASC3.CH3IE            6   Channel 3 Interrupt Enable Bit  
TASC3.MS3A             4   Mode Select Bit A               
TASC3.ELS3B            3   Edge/Level Select Bits          
TASC3.ELS3A            2   Edge/Level Select Bits          
TASC3.TOV3             1   Toggle-On-Overflow Bit          
TASC3.CH3MAX           0   Channel 3 Maximum Duty Cycle Bit
TACH3H                0x0030     Timer A Channel 3 Register High
TACH3L                0x0031     Timer A Channel 3 Register Low
TASC4                 0x0032     Timer A Channel 4 Status and Control Register
TASC4.CH4F             7   Channel 4 Flag Bit              
TASC4.CH4IE            6   Channel 4 Interrupt Enable Bit  
TASC4.MS4B             5   Mode Select Bit B               
TASC4.MS4A             4   Mode Select Bit A               
TASC4.ELS4B            3   Edge/Level Select Bits          
TASC4.ELS4A            2   Edge/Level Select Bits          
TASC4.TOV4             1   Toggle-On-Overflow Bit          
TASC4.CH4MAX           0   Channel 4 Maximum Duty Cycle Bit
TACH4H                0x0033     Timer A Channel 4 Register High
TACH4L                0x0034     Timer A Channel 4 Register Low
TASC5                 0x0035     Timer A Channel 5 Status and Control Register
TASC5.CH5F             7   Channel 5 Flag Bit              
TASC5.CH5IE            6   Channel 5 Interrupt Enable Bit  
TASC5.MS5A             4   Mode Select Bit A               
TASC5.ELS5B            3   Edge/Level Select Bits          
TASC5.ELS5A            2   Edge/Level Select Bits          
TASC5.TOV5             1   Toggle-On-Overflow Bit          
TASC5.CH5MAX           0   Channel 5 Maximum Duty Cycle Bit
TACH5H                0x0036     Timer A Channel 5 Register High
TACH5L                0x0037     Timer A Channel 5 Register Low
ADSCR                 0x0038     Analog-to-Digital Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADR                   0x0039     Analog-to-Digital Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADICLK                0x003A     Analog-to-Digital Input Clock Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bits 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bits 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bits 0
ADICLK.ADICLK          4   ADC Input Clock Register Bit
BARD                  0x003B     BDLC Analog and Roundtrip Delay Register
BARD.ATE               7   Analog Transceiver Enable Bit
BARD.RXPOL             6   Receive Pin Polarity Bit
BARD.BO3               3   BARD Offset Bits 3
BARD.BO2               2   BARD Offset Bits 2
BARD.BO1               1   BARD Offset Bits 1
BARD.BO0               0   BARD Offset Bits 0
BCR1                  0x003C     BDLC Control Register 1
BCR1.IMSG              7   Ignore Message Bit
BCR1.CLKS              6   Clock Bit
BCR1.R1                5   Rate Select Bits 1
BCR1.R0                4   Rate Select Bits 0
BCR1.IE                1   Interrupt Enable Bit
BCR1.WCM               0   Wait Clock Mode Bit
BCR2                  0x003D     BDLC Control Register 2
BCR2.ALOOP             7   Analog Loopback Mode Bit
BCR2.DLOOP             6   Digital Loopback Mode Bit
BCR2.RX4XE             5   Receive 4X Enable Bit
BCR2.NBFS              4   Normalization Bit Format Select Bit
BCR2.TEOD              3   Transmit End of Data Bit
BCR2.TSIFR             2   Transmit In-Frame Response Control Bits
BCR2.TMIFR1            1   Transmit In-Frame Response Control Bits 1
BCR2.TMIFR0            0   Transmit In-Frame Response Control Bits 0
BSVR                  0x003E     BDLC State Vector Register
BSVR.I3                4   Interrupt Source Bits 3
BSVR.I2                3   Interrupt Source Bits 2
BSVR.I1                2   Interrupt Source Bits 1
BSVR.IO                1   Interrupt Source Bits 
BDR                   0x003F     BDLC Data Register
BDR.BD7                7
BDR.BD6                6
BDR.BD5                5
BDR.BD4                4
BDR.BD3                3
BDR.BD2                2
BDR.BD1                1
BDR.BD0                0
TBSCR                 0x0040     Timer B Status and Control Register
TBSCR.TOF              7   TIMB Overflow Flag Bit
TBSCR.TOIE             6   TIMB Overflow Interrupt Enable Bit
TBSCR.TSTOP            5   TIMB Stop Bit
TBSCR.TRST             4   TIMB Reset Bit
TBSCR.PS2              2   Prescaler Select Bits 2
TBSCR.PS1              1   Prescaler Select Bits 1
TBSCR.PS0              0   Prescaler Select Bits 0
TBCNTH                0x0041     Timer B Counter Register High
TBCNTL                0x0042     Timer B Counter Register Low
TBMODH                0x0043     Timer B Modulo Register High
TBMODL                0x0044     Timer B Modulo Register Low
TBSC0                 0x0045     Timer B CH0 Status and Control Register
TBSC0.CH0F             7   Channel 0 Flag Bit
TBSC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TBSC0.MS0B             5   Mode Select Bit B
TBSC0.MS0A             4   Mode Select Bit A
TBSC0.ELS0B            3   Edge/Level Select Bits B
TBSC0.ELS0A            2   Edge/Level Select Bits A
TBSC0.TOV0             1   Toggle-On-Overflow Bit
TBSC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TBCH0H                0x0046     Timer B CH0 Register High
TBCH0L                0x0047     Timer B CH0 Register Low
TBSC1                 0x0048     Timer B CH1 Status and Control Register
TBSC1.CH1F             7   Channel 1 Flag Bit            
TBSC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TBSC1.MS1A             4   Mode Select Bit A               
TBSC1.ELS1B            3   Edge/Level Select Bits B        
TBSC1.ELS1A            2   Edge/Level Select Bits A        
TBSC1.TOV1             1   Toggle-On-Overflow Bit          
TBSC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TBCH1H                0x0049     Timer B CH1 Register High
TBCH1L                0x004A     Timer B CH1 Register Low
PSC                   0x004B     PIT Status and Control Register
PSC.POF                7   PIT Overflow Flag Bit
PSC.POIE               6   PIT Overflow Interrupt Enable Bit
PSC.PSTOP              5   PIT Stop Bit
PSC.PRST               4   PIT Reset Bit
PSC.PPS2               2   Prescaler Select Bits 2
PSC.PPS1               1   Prescaler Select Bits 1
PSC.PPS0               0   Prescaler Select Bits 0
PCNTH                 0x004C     PIT Counter Register High
PCNTL                 0x004D     PIT Counter Register Low
PMODH                 0x004E     PIT Modulo Register High
PMODL                 0x004F     PIT Modulo Register Low
CMCR0                 0x0500	 Module Control Register 0
CMCR0.SYNCH            4   Synchronized Status
CMCR0.TLNKEN           3   Timer Enable
CMCR0.SLPAK            2   Sleep Mode Acknowledge
CMCR0.SLPRQ            1   Sleep Request, Go to Internal Sleep Mode
CMCR0.SFTRES           0   Soft Reset
CMCR1                 0x0501      Module Control Register 1
CMCR1.LOOPB            2   Loop Back Self-Test Mode
CMCR1.WUPM             1   Wakeup Mode
CMCR1.CLKSRC           0   Clock Source
CBTR0                 0x0502     Bus Timing Register 0
CBTR0.SJW1             7   Synchronization Jump Width 1
CBTR0.SJW0             6   Synchronization Jump Width 0
CBTR0.BRP5             5   Baud Rate Prescaler 5
CBTR0.BRP4             4   Baud Rate Prescaler 4
CBTR0.BRP3             3   Baud Rate Prescaler 3
CBTR0.BRP2             2   Baud Rate Prescaler 2
CBTR0.BRP1             1   Baud Rate Prescaler 1
CBTR0.BRP0             0   Baud Rate Prescaler 0
CBTR1                 0x0503     Bus Timing Register 1
CBTR1.SAMP             7   Sampling
CBTR1.TSEG22           6   Time Segment22
CBTR1.TSEG21           5   Time Segment21
CBTR1.TSEG20           4   Time Segment20
CBTR1.TSEG13           3   Time Segment13
CBTR1.TSEG12           2   Time Segment12
CBTR1.TSEG11           1   Time Segment11
CBTR1.TSEG10           0   Time Segment10
CRFLG                 0x0504     Receiver Flag Register
CRFLG.WUPIF            7   Wakeup Interrupt Flag
CRFLG.RWRNIF           6   Receiver Warning Interrupt Flag
CRFLG.TWRNIF           5   Transmitter Warning Interrupt Flag
CRFLG.RERRIF           4   Receiver Error Passive Interrupt Flag
CRFLG.TERRIF           3   Transmitter Error Passive Interrupt Flag
CRFLG.BOFFIF           2   Bus-Off Interrupt Flag
CRFLG.OVRIF            1   Overrun Interrupt Flag
CRFLG.RXF              0   Receive Buffer Full
CRIER                 0x0505     Receiver Interrupt Enable Register
CRIER.WUPIE            7   Wakeup Interrupt Enable
CRIER.RWRNIE           6   Receiver Warning Interrupt Enable
CRIER.TWRNIE           5   Transmitter Warning Interrupt Enable
CRIER.RERRIE           4   Receiver Error Passive Interrupt Enable
CRIER.TERRIE           3   Transmitter Error Passive Interrupt Enable
CRIER.BOFFIE           2   Bus-Off Interrupt Enable
CRIER.OVRIE            1   Overrun Interrupt Enable
CRIER.RXFIE            0   Receiver Full Interrupt Enable
CTFLG                 0x0506     Transmitter Flag Register
CTFLG.ABTAK2           6   Abort Acknowledge 2
CTFLG.ABTAK1           5   Abort Acknowledge 1
CTFLG.ABTAK0           4   Abort Acknowledge 0
CTFLG.TXE2             2   Transmitter Empty 2
CTFLG.TXE1             1   Transmitter Empty 1
CTFLG.TXE0             0   Transmitter Empty 0
CTCR                  0x0507     Transmitter Control Register
CTCR.ABTRQ2            6   Abort Request 2
CTCR.ABTRQ1            5   Abort Request 1
CTCR.ABTRQ0            4   Abort Request 0
CTCR.TXEIE2            2   Transmitter Empty Interrupt Enable 2
CTCR.TXEIE1            1   Transmitter Empty Interrupt Enable 1
CTCR.TXEIE0            0   Transmitter Empty Interrupt Enable 0
CIDAC                 0x0508     Identifier Acceptance Control Register
CIDAC.IDAM1            5   Identifier Acceptance Mode 1
CIDAC.IDAM0            4   Identifier Acceptance Mode 0
CIDAC.IDHIT1           1   Identifier Acceptance Hit Indicator 1
CIDAC.IDHIT0           0   Identifier Acceptance Hit Indicator 0
RESERV0509            0x0509     RESERVED
CRXERR                0x050E     Receiver Error Counter
CRXERR.RXERR7          7
CRXERR.RXERR6          6
CRXERR.RXERR5          5
CRXERR.RXERR4          4
CRXERR.RXERR3          3
CRXERR.RXERR2          2
CRXERR.RXERR1          1
CRXERR.RXERR0          0
CTXERR                0x050F     Transmit Error Counter
CTXERR.TXERR7          7
CTXERR.TXERR6          6
CTXERR.TXERR5          5
CTXERR.TXERR4          4
CTXERR.TXERR3          3
CTXERR.TXERR2          2
CTXERR.TXERR1          1
CTXERR.TXERR0          0
CIDAR0                0x0510     Identifier Acceptance Registers 0
CIDAR0.AC7             7   Acceptance Code Bits 7
CIDAR0.AC6             6   Acceptance Code Bits 6
CIDAR0.AC5             5   Acceptance Code Bits 5
CIDAR0.AC4             4   Acceptance Code Bits 4
CIDAR0.AC3             3   Acceptance Code Bits 3
CIDAR0.AC2             2   Acceptance Code Bits 2
CIDAR0.AC1             1   Acceptance Code Bits 1
CIDAR0.AC0             0   Acceptance Code Bits 0
CIDAR1                0x0511     Identifier Acceptance Registers 1
CIDAR1.AC7             7   Acceptance Code Bits 7
CIDAR1.AC6             6   Acceptance Code Bits 6
CIDAR1.AC5             5   Acceptance Code Bits 5
CIDAR1.AC4             4   Acceptance Code Bits 4
CIDAR1.AC3             3   Acceptance Code Bits 3
CIDAR1.AC2             2   Acceptance Code Bits 2
CIDAR1.AC1             1   Acceptance Code Bits 1
CIDAR1.AC0             0   Acceptance Code Bits 0
CIDAR2                0x0512     Identifier Acceptance Registers 2
CIDAR2.AC7             7   Acceptance Code Bits 7
CIDAR2.AC6             6   Acceptance Code Bits 6
CIDAR2.AC5             5   Acceptance Code Bits 5
CIDAR2.AC4             4   Acceptance Code Bits 4
CIDAR2.AC3             3   Acceptance Code Bits 3
CIDAR2.AC2             2   Acceptance Code Bits 2
CIDAR2.AC1             1   Acceptance Code Bits 1
CIDAR2.AC0             0   Acceptance Code Bits 0
CIDAR3                0x0513     Identifier Acceptance Registers 3
CIDAR3.AC7             7   Acceptance Code Bits 7
CIDAR3.AC6             6   Acceptance Code Bits 6
CIDAR3.AC5             5   Acceptance Code Bits 5
CIDAR3.AC4             4   Acceptance Code Bits 4
CIDAR3.AC3             3   Acceptance Code Bits 3
CIDAR3.AC2             2   Acceptance Code Bits 2
CIDAR3.AC1             1   Acceptance Code Bits 1
CIDAR3.AC0             0   Acceptance Code Bits 0
CIDMRO                0x0514     Identifier Mask Registers 0
CIDMRO.AM7             7   Acceptance Mask Bits 7
CIDMRO.AM6             6   Acceptance Mask Bits 6
CIDMRO.AM5             5   Acceptance Mask Bits 5
CIDMRO.AM4             4   Acceptance Mask Bits 4
CIDMRO.AM3             3   Acceptance Mask Bits 3
CIDMRO.AM2             2   Acceptance Mask Bits 2
CIDMRO.AM1             1   Acceptance Mask Bits 1
CIDMRO.AM0             0   Acceptance Mask Bits 0
CIDMR1                0x0515     Identifier Mask Registers 1
CIDMR1.AM7             7   Acceptance Mask Bits 7
CIDMR1.AM6             6   Acceptance Mask Bits 6
CIDMR1.AM5             5   Acceptance Mask Bits 5
CIDMR1.AM4             4   Acceptance Mask Bits 4
CIDMR1.AM3             3   Acceptance Mask Bits 3
CIDMR1.AM2             2   Acceptance Mask Bits 2
CIDMR1.AM1             1   Acceptance Mask Bits 1
CIDMR1.AM0             0   Acceptance Mask Bits 0
CIDMR2                0x0516     Identifier Mask Registers 2
CIDMR2.AM7             7   Acceptance Mask Bits 7
CIDMR2.AM6             6   Acceptance Mask Bits 6
CIDMR2.AM5             5   Acceptance Mask Bits 5
CIDMR2.AM4             4   Acceptance Mask Bits 4
CIDMR2.AM3             3   Acceptance Mask Bits 3
CIDMR2.AM2             2   Acceptance Mask Bits 2
CIDMR2.AM1             1   Acceptance Mask Bits 1
CIDMR2.AM0             0   Acceptance Mask Bits 0
CIDMR3                0x0517     Identifier Mask Registers 3
CIDMR3.AM7             7   Acceptance Mask Bits 7
CIDMR3.AM6             6   Acceptance Mask Bits 6
CIDMR3.AM5             5   Acceptance Mask Bits 5
CIDMR3.AM4             4   Acceptance Mask Bits 4
CIDMR3.AM3             3   Acceptance Mask Bits 3
CIDMR3.AM2             2   Acceptance Mask Bits 2
CIDMR3.AM1             1   Acceptance Mask Bits 1
CIDMR3.AM0             0   Acceptance Mask Bits 0
IDR0                  0x05B0     IDENTIFIER REGISTER 0
IDR0.ID28	       7
IDR0.ID27	       6
IDR0.ID26	       5
IDR0.ID25	       4
IDR0.ID24	       3
IDR0.ID23	       2 
IDR0.ID22	       1
IDR0.ID21	       0
IDR1                  0x05B1     IDENTIFIER REGISTER 1
IDR1.ID20              7
IDR1.ID19              6
IDR1.ID18              5
IDR1.SRR               4   Substitute Remote Request
IDR1.IDE               3   ID Extended
IDR1.ID17              2
IDR1.ID16              1
IDR1.ID15              0
IDR2                  0x05B2     IDENTIFIER REGISTER 2
IDR2.ID14              7
IDR2.ID13              6
IDR2.ID12              5
IDR2.ID11              4
IDR2.ID10              3
IDR2.ID9               2
IDR2.ID8               1
IDR2.ID7               0
IDR3                  0x05B3     IDENTIFIER REGISTER 3
IDR3.ID6               7
IDR3.ID5               6
IDR3.ID4               5
IDR3.ID3               4
IDR3.ID2               3
IDR3.ID1               2
IDR3.ID0               1
IDR3.RTR               0   Remote Transmission Request
DSR0                  0x05B4     DATA SEGMENT REGISTER 0
DSR0.DB7               7
DSR0.DB6               6
DSR0.DB5               5
DSR0.DB4               4
DSR0.DB3               3
DSR0.DB2               2
DSR0.DB1               1
DSR0.DB0               0
DSR1                  0x05B5     DATA SEGMENT REGISTER 1
DSR1.DB7               7
DSR1.DB6               6
DSR1.DB5               5
DSR1.DB4               4
DSR1.DB3               3
DSR1.DB2               2
DSR1.DB1               1
DSR1.DB0               0
DSR2                  0x05B6     DATA SEGMENT REGISTER 2
DSR2.DB7               7
DSR2.DB6               6
DSR2.DB5               5
DSR2.DB4               4
DSR2.DB3               3
DSR2.DB2               2
DSR2.DB1               1
DSR2.DB0               0
DSR3                  0x05B7     DATA SEGMENT REGISTER 3
DSR3.DB7               7
DSR3.DB6               6
DSR3.DB5               5
DSR3.DB4               4
DSR3.DB3               3
DSR3.DB2               2
DSR3.DB1               1
DSR3.DB0               0
DSR4                  0x05B8     DATA SEGMENT REGISTER 4
DSR4.DB7               7
DSR4.DB6               6
DSR4.DB5               5
DSR4.DB4               4
DSR4.DB3               3
DSR4.DB2               2
DSR4.DB1               1
DSR4.DB0               0
DSR5                  0x05B9     DATA SEGMENT REGISTER 5
DSR5.DB7               7
DSR5.DB6               6
DSR5.DB5               5
DSR5.DB4               4
DSR5.DB3               3
DSR5.DB2               2
DSR5.DB1               1
DSR5.DB0               0
DSR6                  0x05BA     DATA SEGMENT REGISTER 6
DSR6.DB7               7
DSR6.DB6               6
DSR6.DB5               5
DSR6.DB4               4
DSR6.DB3               3
DSR6.DB2               2
DSR6.DB1               1
DSR6.DB0               0
DSR7                  0x05BB     DATA SEGMENT REGISTER 7
DSR7.DB7               7
DSR7.DB6               6
DSR7.DB5               5
DSR7.DB4               4
DSR7.DB3               3
DSR7.DB2               2
DSR7.DB1               1
DSR7.DB0               0
DLR                   0x05BC     DATA LENGTH REGISTER
DLR.DLC3               3   Data Length Code Bits 3
DLR.DLC2               2   Data Length Code Bits 2
DLR.DLC1               1   Data Length Code Bits 1
DLR.DLC0               0   Data Length Code Bits 0
TBPR                  0x05BD     TRANSMIT BUFFER PRIORITY REGISTER
TBPR.PRIO7             7   Local Priority 7
TBPR.PRIO6             6   Local Priority 6
TBPR.PRIO5             5   Local Priority 5
TBPR.PRIO4             4   Local Priority 4
TBPR.PRIO3             3   Local Priority 3
TBPR.PRIO2             2   Local Priority 2
TBPR.PRIO1             1   Local Priority 1
TBPR.PRIO0             0   Local Priority 0
RESERV05BE            0x05BE     RESERVED
RESERV05BF            0x05BF     RESERVED
SBSR                  0xFE00     SIM Break Status Register
SBSR.BW                1   SIM Break Wait
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Bit
SRSR.PIN               6   External Reset Bit
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit (opcode fetches only)
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
FL2CR                 0xFE08     FLASH-2 Control Register
FL2CR.HVEN             3   High-Voltage Enable Bit
FL2CR.MASS             2   Mass Erase Control Bit
FL2CR.ERASE            1   Erase Control Bit
FL2CR.PGM              0   Program Control Bit
CONFIG2               0xFE09     Configuration Write-Once Register
CONFIG2.EEDIVCLK       7   EEPROM Timebase Divider Clock select bit
CONFIG2.MSCAND         4   MSCAN Disable Bit
CONFIG2.AT60A          3   Device indicator
CONFIG2.AZxx           0   AZxx Emulator Enable Bit
BRKH                  0xFE0C     Break Address Register High
BRKL                  0xFE0D     Break Address Register Low
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
LVISR                 0xFE0F     LVI Status Register
LVISR.LVIOUT           7   LVI Output Bit
EE1DIVHNVRH           0xFE10     EE1DIV Hi Non-volatile Register
EE1DIVHNVRH.EEDIVSECD  7   EEPROM-1 Divider Security Disable
EE1DIVHNVRH.EEDIV10    2   EEPROM-1 timebase prescaler 10   
EE1DIVHNVRH.EEDIV9     1   EEPROM-1 timebase prescaler 9    
EE1DIVHNVRH.EEDIV8     0   EEPROM-1 timebase prescaler 8    
EE1DIVLNVRL           0xFE11     EE1DIV Lo Non-volatile Register
EE1DIVLNVRL.EEDIV7     7   EEPROM-1 timebase prescaler 7
EE1DIVLNVRL.EEDIV6     6   EEPROM-1 timebase prescaler 6
EE1DIVLNVRL.EEDIV5     5   EEPROM-1 timebase prescaler 5
EE1DIVLNVRL.EEDIV4     4   EEPROM-1 timebase prescaler 4
EE1DIVLNVRL.EEDIV3     3   EEPROM-1 timebase prescaler 3
EE1DIVLNVRL.EEDIV2     2   EEPROM-1 timebase prescaler 2
EE1DIVLNVRL.EEDIV1     1   EEPROM-1 timebase prescaler 1
EE1DIVLNVRL.EEDIV0     0   EEPROM-1 timebase prescaler 0
EE1DIVH               0xFE1A     EE1DIV Divider High Register
EE1DIVH.EEDIVSECD      7   EEPROM-1 Divider Security Disable
EE1DIVH.EEDIV10        2   EEPROM-1 timebase prescaler 10
EE1DIVH.EEDIV9         1   EEPROM-1 timebase prescaler 9
EE1DIVH.EEDIV8         0   EEPROM-1 timebase prescaler 8
EE1DIVL               0xFE1B     EE1DIV Divider Low Register
EE1DIVL.EEDIV7         7   EEPROM-1 timebase prescaler 7
EE1DIVL.EEDIV6         6   EEPROM-1 timebase prescaler 6
EE1DIVL.EEDIV5         5   EEPROM-1 timebase prescaler 5
EE1DIVL.EEDIV4         4   EEPROM-1 timebase prescaler 4
EE1DIVL.EEDIV3         3   EEPROM-1 timebase prescaler 3
EE1DIVL.EEDIV2         2   EEPROM-1 timebase prescaler 2
EE1DIVL.EEDIV1         1   EEPROM-1 timebase prescaler 1
EE1DIVL.EEDIV0         0   EEPROM-1 timebase prescaler 0
EE1NVR                0xFE1C     EEPROM-1 Nonvolatile Register
EE1NVR.EEPRTCT         4   EEPROM-1 Protection Bit
EE1NVR.EEBP3           3   EEPROM-1 Block Protection Bits 3
EE1NVR.EEBP2           2   EEPROM-1 Block Protection Bits 2
EE1NVR.EEBP1           1   EEPROM-1 Block Protection Bits 1
EE1NVR.EEBP0           0   EEPROM-1 Block Protection Bits 0
EE1CR                 0xFE1D     EEPROM-1 Control Register
EE1CR.EEOFF            5   EEPROM-1 power down
EE1CR.EERAS1           4   Erase/Program Mode Select Bits 1
EE1CR.EERAS0           3   Erase/Program Mode Select Bits 0
EE1CR.EELAT            2   EEPROM-1 Latch Control
EE1CR.AUTO             1   Automatic termination of program/erase cycle
EE1CR.EEPGM            0   EEPROM-1 Program/Erase Enable
EE1ACR                0xFE1F     EEPROM-1 Array Configuration Register
EE1ACR.EEPRTCT         4   EEPROM-1 Protection Bit
EE1ACR.EEBP3           3   EEPROM-1 Block Protection Bits 3
EE1ACR.EEBP2           2   EEPROM-1 Block Protection Bits 2
EE1ACR.EEBP1           1   EEPROM-1 Block Protection Bits 1
EE1ACR.EEBP0           0   EEPROM-1 Block Protection Bits 0
EE2DIVHNVRH           0xFF70     EE2DIV Hi Non-volatile Register
EE2DIVHNVRH.EEDIVSECD  7   EEPROM-2 Divider Security Disable
EE2DIVHNVRH.EEDIV10    2   EEPROM-2 timebase prescaler 10
EE2DIVHNVRH.EEDIV9     1   EEPROM-2 timebase prescaler 9
EE2DIVHNVRH.EEDIV8     0   EEPROM-2 timebase prescaler 8
EE2DIVLNVRL           0xFF71     EE2DIV Lo Non-volatile Register
EE2DIVLNVRL.EEDIV7     7   EEPROM-2 timebase prescaler 7
EE2DIVLNVRL.EEDIV6     6   EEPROM-2 timebase prescaler 6
EE2DIVLNVRL.EEDIV5     5   EEPROM-2 timebase prescaler 5
EE2DIVLNVRL.EEDIV4     4   EEPROM-2 timebase prescaler 4
EE2DIVLNVRL.EEDIV3     3   EEPROM-2 timebase prescaler 3
EE2DIVLNVRL.EEDIV2     2   EEPROM-2 timebase prescaler 2
EE2DIVLNVRL.EEDIV1     1   EEPROM-2 timebase prescaler 1
EE2DIVLNVRL.EEDIV0     0   EEPROM-2 timebase prescaler 0
EE2DIVH               0xFF7A     EE2DIV Divider High Register
EE2DIVH.EEDIVSECD      7   EEPROM-2 Divider Security Disable
EE2DIVH.EEDIV10        2   EEPROM-2 timebase prescaler 10
EE2DIVH.EEDIV9         1   EEPROM-2 timebase prescaler 9
EE2DIVH.EEDIV8         0   EEPROM-2 timebase prescaler 8
EE2DIVL               0xFF7B     EE2DIV Divider Low Register
EE2DIVL.EEDIV7         7   EEPROM-2 timebase prescaler 7
EE2DIVL.EEDIV6         6   EEPROM-2 timebase prescaler 6
EE2DIVL.EEDIV5         5   EEPROM-2 timebase prescaler 5
EE2DIVL.EEDIV4         4   EEPROM-2 timebase prescaler 4
EE2DIVL.EEDIV3         3   EEPROM-2 timebase prescaler 3
EE2DIVL.EEDIV2         2   EEPROM-2 timebase prescaler 2
EE2DIVL.EEDIV1         1   EEPROM-2 timebase prescaler 1
EE2DIVL.EEDIV0         0   EEPROM-2 timebase prescaler 0
EE2NVR                0xFF7C     EEPROM-2 Nonvolatile Register
EE2NVR.EEPRTCT         4   EEPROM-2 Protection Bit
EE2NVR.EEBP3           3   EEPROM-2 Block Protection Bits 3
EE2NVR.EEBP2           2   EEPROM-2 Block Protection Bits 2
EE2NVR.EEBP1           1   EEPROM-2 Block Protection Bits 1
EE2NVR.EEBP0           0   EEPROM-2 Block Protection Bits 0
EE2CR                 0xFF7D     EEPROM-2 Control Register
EE2CR.EEOFF            5   EEPROM-2 power down
EE2CR.EERAS1           4   Erase/Program Mode Select Bits 1
EE2CR.EERAS0           3   Erase/Program Mode Select Bits 0
EE2CR.EELAT            2   EEPROM-2 Latch Control
EE2CR.AUTO             1   Automatic termination of program/erase cycle
EE2CR.EEPGM            0   EEPROM-2 Program/Erase Enable
EE2ACR                0xFF7F     EEPROM-2 Array Configuration Register
EE2ACR.EEPRTCT         4   EEPROM-2 Protection Bit
EE2ACR.EEBP3           3   EEPROM-2 Block Protection Bits 3
EE2ACR.EEBP2           2   EEPROM-2 Block Protection Bits 2
EE2ACR.EEBP1           1   EEPROM-2 Block Protection Bits 1
EE2ACR.EEBP0           0   EEPROM-2 Block Protection Bits 0
FL1BPR                0xFF80     FLASH-1 Block Protect Register
FL1BPR.BPR7            7   Block Protect Register BIT7
FL1BPR.BPR6            6   Block Protect Register BIT6
FL1BPR.BPR5            5   Block Protect Register BIT5
FL1BPR.BPR4            4   Block Protect Register BIT4
FL1BPR.BPR3            3   Block Protect Register BIT3
FL1BPR.BPR2            2   Block Protect Register BIT2
FL1BPR.BPR1            1   Block Protect Register BIT1
FL1BPR.BPR0            0   Block Protect Register BIT0
FL2BPR                0xFF81     FLASH-2 Block Protect Register
FL2BPR.BPR7            7   Block Protect Register Bit7
FL2BPR.BPR6            6   Block Protect Register Bit6
FL2BPR.BPR5            5   Block Protect Register Bit5
FL2BPR.BPR4            4   Block Protect Register Bit4
FL2BPR.BPR3            3   Block Protect Register Bit3
FL2BPR.BPR2            2   Block Protect Register Bit2
FL2BPR.BPR1            1   Block Protect Register Bit1
FL2BPR.BPR0            0   Block Protect Register Bit0
FL1CR                 0xFF88     FLASH-1 Control Register
FL1CR.HVEN             3   High-Voltage Enable Bit
FL1CR.MASS             2   Mass Erase Control Bit
FL1CR.ERASE            1   Erase Control Bit
FL1CR.PGM              0   Program Control Bit
COPCTL                0xFFFF     COP Control Register


.68HC908BD48
; MC68HC908BD48/D  http://
; MC68HC908BD48.pdf

; 48,128 bytes of FLASH memory
; 1,024 bytes of random-access memory (RAM)
; 26 bytes of user-defined vectors
; 512 + 470 bytes of monitor ROM


; MEMORY MAP
area DATA FSR		   0x0000:0x0060
area BSS  Unimplemented	   0x0060:0x0080
area DATA RAM		   0x0080:0x0480
area BSS  Unimplemented	   0x0480:0x0C00
area BSS  Reserved	   0x0C00:0x0D00
area BSS  Unimplemented	   0x0D00:0x4000
area DATA FLASH_Memory	   0x4000:0xFC00
area DATA Monitor_ROM1	   0xFC00:0xFE00
area DATA FSR_1		   0xFE00:0xFE10
area DATA Monitor_ROM2	   0xFE10:0xFFE6
area DATA USER_VEC	   0xFFE6:0x10000


; Interrupt and reset vector assignments
interrupt __RESET    0xFFFE       Reset Vector
interrupt SWI        0xFFFC       SWI Vector
interrupt IRQ        0xFFFA       IRQ Vector
interrupt USB        0xFFF8       USB Vector
interrupt DDC12AB    0xFFF6       DDC12AB Vector
interrupt TIM_CH0    0xFFF2       TIM Channel 0 Vector
interrupt TIM_CH1    0xFFF0       TIM Channel 1 Vector
interrupt TIM        0xFFEE       TIM Overflow Vector
interrupt SYNC       0xFFEC       Sync Processor Vector
interrupt MMIIC      0xFFEA       MMIIC Vector
interrupt ADC        0xFFE8       ADC Interrupt Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bits 7
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
PTC                   0x0002     Port C Data Register
PTC.PTC5               5   Port C Data Bits 5
PTC.PTC4               4   Port C Data Bits 4
PTC.PTC3               3   Port C Data Bits 3
PTC.PTC2               2   Port C Data Bits 2
PTC.PTC1               1   Port C Data Bits 1
PTC.PTC0               0   Port C Data Bits 0
PTD                   0x0003     Port D Data Register
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bits 7
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
DDRC                  0x0006     Data Direction Register C
DDRC.DDRC5             5   Data Direction Register C Bits 5
DDRC.DDRC4             4   Data Direction Register C Bits 4
DDRC.DDRC3             3   Data Direction Register C Bits 3
DDRC.DDRC2             2   Data Direction Register C Bits 2
DDRC.DDRC1             1   Data Direction Register C Bits 1
DDRC.DDRC0             0   Data Direction Register C Bits 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD6             6   Data Direction Register D Bits 6
DDRD.DDRD5             5   Data Direction Register D Bits 5
DDRD.DDRD4             4   Data Direction Register D Bits 4
DDRD.DDRD3             3   Data Direction Register D Bits 3
DDRD.DDRD2             2   Data Direction Register D Bits 2
DDRD.DDRD1             1   Data Direction Register D Bits 1
DDRD.DDRD0             0   Data Direction Register D Bits 0
PTE                   0x0008     Port E Data Register
PTE.PTE2               2   Port E Data Bits 2
PTE.PTE1               1   Port E Data Bits 1
PTE.PTE0               0   Port E Data Bits 0
DDRE                  0x0009     Data Direction Register E
DDRE.DDRE2             2   Data Direction Register E Bits 2
DDRE.DDRE1             1   Data Direction Register E Bits 1
DDRE.DDRE0             0   Data Direction Register E Bits 0
TSC                   0x000A     TIM Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
UNUSED000B            0x000B     UNUSED
TCNTH                 0x000C     TIM Counter Register High
TCNTL                 0x000D     TIM Counter Register Low
TMODH                 0x000E     TIM Counter Modulo Register High
TMODL                 0x000F     TIM Counter Modulo Register Low
TSC0                  0x0010     TIM Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit
TSC0.MS0B              5   Mode Select Bit B
TSC0.MS0A              4   Mode Select Bit A
TSC0.ELS0B             3   Edge/Level Select Bits
TSC0.ELS0A             2   Edge/Level Select Bits
TSC0.TOV0              1   Toggle-On-Overflow Bit
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0011     TIM Channel 0 Register High
TCH0L                 0x0012     TIM Channel 0 Register Low
TSC1                  0x0013     TIM Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 1 Flag Bit            
TSC1.CH1IE             6   Channel 1 Interrupt Enable Bit
TSC1.MS1A              4   Mode Select Bit A               
TSC1.ELS1B             3   Edge/Level Select Bits          
TSC1.ELS1A             2   Edge/Level Select Bits          
TSC1.TOV1              1   Toggle-On-Overflow Bit          
TSC1.CH1MAX            0   Channel 1 Maximum Duty Cycle Bit
TCH1H                 0x0014     TIM Channel 1 Register High
TCH1L                 0x0015     TIM Channel 1 Register Low
DMCR                  0x0016     DDC Master Control Register
DMCR.ALIF              7   DDC Arbitration Lost Interrupt Flag
DMCR.NAKIF             6   No Acknowledge Interrupt Flag
DMCR.BB                5   Bus Busy Flag
DMCR.MAST              4   Master Control Bit
DMCR.MRW               3   Master Read/Write
DMCR.BR2               2   Baud Rate Select 2
DMCR.BR1               1   Baud Rate Select 1
DMCR.BR0               0   Baud Rate Select 0
DADR                  0x0017     DDC Address Register
DADR.DAD7              7   DDC Address 7
DADR.DAD6              6   DDC Address 6
DADR.DAD5              5   DDC Address 5
DADR.DAD4              4   DDC Address 4
DADR.DAD3              3   DDC Address 3
DADR.DAD2              2   DDC Address 2
DADR.DAD1              1   DDC Address 1
DADR.EXTAD             0   DDC Expanded Address
DCR                   0x0018     DDC Control Register
DCR.DEN                7   DDC Enable
DCR.DIEN               6   DDC Interrupt Enable
DCR.TXAK               3   Transmit Acknowledge Enable
DCR.SCLIEN             2   SCL Interrupt Enable
DCR.DDC1EN             1   DDC1 Protocol Enable
DSR                   0x0019     DDC Status Register
DSR.RXIF               7   DDC Receive Interrupt Flag
DSR.TXIF               6   DDC Transmit Interrupt Flag
DSR.MATCH              5   DDC Address Match
DSR.SRW                4   DDC Slave Read/Write
DSR.RXAK               3   DDC Receive Acknowledge
DSR.SCLIF              2   SCL Interrupt Flag
DSR.TXBE               1   DDC Transmit Buffer Empty
DSR.RXBF               0   DDC Receive Buffer Full
DDTR                  0x001A     DDC Data Transmit Register
DDTR.DTD7              7
DDTR.DTD6              6
DDTR.DTD5              5
DDTR.DTD4              4
DDTR.DTD3              3
DDTR.DTD2              2
DDTR.DTD1              1
DDTR.DTD0              0
DDRR                  0x001B     DDC Data Receive Register
DDRR.DRD7              7
DDRR.DRD6              6
DDRR.DRD5              5
DDRR.DRD4              4
DDRR.DRD3              3
DDRR.DRD2              2
DDRR.DRD1              1
DDRR.DRD0              0
D2ADR                 0x001C     DDC2 Address Register
D2ADR.D2AD7            7   DDC2 Address 7
D2ADR.D2AD6            6   DDC2 Address 6
D2ADR.D2AD5            5   DDC2 Address 5
D2ADR.D2AD4            4   DDC2 Address 4
D2ADR.D2AD3            3   DDC2 Address 3
D2ADR.D2AD2            2   DDC2 Address 2
D2ADR.D2AD1            1   DDC2 Address 1
CONFIG0               0x001D     Configuration Register 0
CONFIG0.HSYNCOE        7   HSYNCO Enable
CONFIG0.VSYNCOE        6   VSYNCO Enable
CONFIG0.SOGE           5   SOG Enable
INTSCR                0x001E     IRQ Status and Control Register
INTSCR.IRQF            3   IRQ Flag Bit
INTSCR.ACK             2   IRQ Interrupt Request Acknowledge Bit
INTSCR.IMASK           1   IRQ Interrupt Mask Bit
INTSCR.MODE            0   IRQ Edge/Level Select Bit
CONFIG1               0x001F     Configuration Register 1
CONFIG1.SSREC          3   Short Stop Recovery Bit
CONFIG1.COPRS          2   COP Rate Select Bit
CONFIG1.STOP           1   STOP Instruction Enable Bit
CONFIG1.COPD           0   COP Disable Bit
0PWM                  0x0020     PWM0 Data Register
0PWM.0PWM4             7   PWM Bits 4
0PWM.0PWM3             6   PWM Bits 3
0PWM.0PWM2             5   PWM Bits 2
0PWM.0PWM1             4   PWM Bits 1
0PWM.0PWM0             3   PWM Bits 0
0PWM.0BRM2             2   Binary Rate Multiplier Bits 2
0PWM.0BRM1             1   Binary Rate Multiplier Bits 1
0PWM.0BRM0             0   Binary Rate Multiplier Bits 0
1PWM                  0x0021     PWM1 Data Register
1PWM.1PWM4             7   PWM Bits 4                   
1PWM.1PWM3             6   PWM Bits 3                   
1PWM.1PWM2             5   PWM Bits 2                   
1PWM.1PWM1             4   PWM Bits 1                   
1PWM.1PWM0             3   PWM Bits 0                   
1PWM.1BRM2             2   Binary Rate Multiplier Bits 2
1PWM.1BRM1             1   Binary Rate Multiplier Bits 1
1PWM.1BRM0             0   Binary Rate Multiplier Bits 0
2PWM                  0x0022     PWM2 Data Register
2PWM.2PWM4             7   PWM Bits 4                   
2PWM.2PWM3             6   PWM Bits 3                   
2PWM.2PWM2             5   PWM Bits 2                   
2PWM.2PWM1             4   PWM Bits 1                   
2PWM.2PWM0             3   PWM Bits 0                   
2PWM.2BRM2             2   Binary Rate Multiplier Bits 2
2PWM.2BRM1             1   Binary Rate Multiplier Bits 1
2PWM.2BRM0             0   Binary Rate Multiplier Bits 0
3PWM                  0x0023     PWM3 Data Register
3PWM.3PWM4             7   PWM Bits 4                   
3PWM.3PWM3             6   PWM Bits 3                   
3PWM.3PWM2             5   PWM Bits 2                   
3PWM.3PWM1             4   PWM Bits 1                   
3PWM.3PWM0             3   PWM Bits 0                   
3PWM.3BRM2             2   Binary Rate Multiplier Bits 2
3PWM.3BRM1             1   Binary Rate Multiplier Bits 1
3PWM.3BRM0             0   Binary Rate Multiplier Bits 0
4PWM                  0x0024     PWM4 Data Register
4PWM.4PWM4             7   PWM Bits 4                   
4PWM.4PWM3             6   PWM Bits 3                   
4PWM.4PWM2             5   PWM Bits 2                   
4PWM.4PWM1             4   PWM Bits 1                   
4PWM.4PWM0             3   PWM Bits 0                   
4PWM.4BRM2             2   Binary Rate Multiplier Bits 2
4PWM.4BRM1             1   Binary Rate Multiplier Bits 1
4PWM.4BRM0             0   Binary Rate Multiplier Bits 0
5PWM                  0x0025     PWM5 Data Register
5PWM.5PWM4             7   PWM Bits 4                   
5PWM.5PWM3             6   PWM Bits 3                   
5PWM.5PWM2             5   PWM Bits 2                   
5PWM.5PWM1             4   PWM Bits 1                   
5PWM.5PWM0             3   PWM Bits 0                   
5PWM.5BRM2             2   Binary Rate Multiplier Bits 2
5PWM.5BRM1             1   Binary Rate Multiplier Bits 1
5PWM.5BRM0             0   Binary Rate Multiplier Bits 0
6PWM                  0x0026     PWM6 Data Register
6PWM.6PWM4             7   PWM Bits 4                   
6PWM.6PWM3             6   PWM Bits 3                   
6PWM.6PWM2             5   PWM Bits 2                   
6PWM.6PWM1             4   PWM Bits 1                   
6PWM.6PWM0             3   PWM Bits 0                   
6PWM.6BRM2             2   Binary Rate Multiplier Bits 2
6PWM.6BRM1             1   Binary Rate Multiplier Bits 1
6PWM.6BRM0             0   Binary Rate Multiplier Bits 0
7PWM                  0x0027     PWM7 Data Register
7PWM.7PWM4             7   PWM Bits 4                   
7PWM.7PWM3             6   PWM Bits 3                   
7PWM.7PWM2             5   PWM Bits 2                   
7PWM.7PWM1             4   PWM Bits 1                   
7PWM.7PWM0             3   PWM Bits 0                   
7PWM.7BRM2             2   Binary Rate Multiplier Bits 2
7PWM.7BRM1             1   Binary Rate Multiplier Bits 1
7PWM.7BRM0             0   Binary Rate Multiplier Bits 0
PWMCR1                0x0028     PWM Control Register 1
PWMCR1.PWM7E           7   PWM Output Enable 7
PWMCR1.PWM6E           6   PWM Output Enable 6
PWMCR1.PWM5E           5   PWM Output Enable 5
PWMCR1.PWM4E           4   PWM Output Enable 4
PWMCR1.PWM3E           3   PWM Output Enable 3
PWMCR1.PWM2E           2   PWM Output Enable 2
PWMCR1.PWM1E           1   PWM Output Enable 1
PWMCR1.PWM0E           0   PWM Output Enable 0
UADR                  0x0029     USB Address Register
UADR.USBEN             7   USB Enable
UADR.UADD6             6   USB Address 6
UADR.UADD5             5   USB Address 5
UADR.UADD4             4   USB Address 4
UADR.UADD3             3   USB Address 3
UADR.UADD2             2   USB Address 2
UADR.UADD1             1   USB Address 1
UADR.UADD0             0   USB Address 0
UINTR                 0x002A     USB Interrupt Register
UINTR.TBEF             7   Transmit Buffer Empty Flag
UINTR.RBFF             6   Receive Buffer Full Flag
UINTR.EOPIF            5   End Of Packet Interrupt Flag
UINTR.RSTIF            4   Reset Interrupt Flag
UINTR.TBIE             3   Transmit Buffer Interrupt Enable
UINTR.RBIE             2   Receive Buffer Interrupt Enable
UINTR.EOPIE            1   End Of Packet Interrupt Enable
UINTR.RSTIE            0   Reset Interrupt Enable
UCR0                  0x002B     USB Control Register 0
UCR0.T0SEQ             7   Endpoint 0 Data Packet PID Select
UCR0.STALL0            6   Endpoint 0 STALL Handshake
UCR0.TX0E              5   Endpoint 0 Transmit Enable
UCR0.RX0E              4   Endpoint 0 Receive Enable
UCR0.TP0SIZ3           3   Endpoint 0 Transmit Data Size 3
UCR0.TP0SIZ2           2   Endpoint 0 Transmit Data Size 2
UCR0.TP0SIZ1           1   Endpoint 0 Transmit Data Size 1
UCR0.TP0SIZ0           0   Endpoint 0 Transmit Data Size 0
USR                   0x002C     USB Status Register
USR.RSEQ               7   Received Data Sequence
USR.SETUP              6   SETUP Token
USR.TX1ST              5   Transmit First Flag
USR.RPSIZ3             3   Received Data Size 3
USR.RPSIZ2             2   Received Data Size 2
USR.RPSIZ1             1   Received Data Size 1
USR.RPSIZ0             0   Received Data Size 0
UCR2                  0x002D     USB Control Register 2
UCR2.PULLEN            5   Pullup Enable on D-
UCR2.SUSPND            4   USB Suspend
UCR2.ENABLE2           3   Endpoint 2 Enable
UCR2.ENABLE1           2   Endpoint 1 Enable
UCR2.STALL2            1   Endpoint 2 STALL Handshake
UCR2.STALL1            0   Endpoint 1 STALL Handshake
UIR1                  0x002E     USB Interrupt Register 1
UIR1.TXD1F             7   Endpoint 1/2 Data Buffer Transmit Flag
UIR1.TXD1IE            6   Transmit Buffer Interrupt Enable
UIR1.RESUMF            5   Resume Flag
UIR1.RESUMFR           4   Resume Flag Clear
UIR1.TBEFR             3   Transmit Buffer Empty Flag Clear
UIR1.RBFFR             2   Receive Buffer Full Flag Clear
UIR1.TXD1FR            1   Endpoint 1 and 2 Data Buffer Transmit Flag Clear
UIR1.EOPFR             0   End Of Packet Interrupt Flag Clear
UCR1                  0x002F     USB Control Register 1
UCR1.T1SEQ             7   Endpoint 1/2 Data Packet PID Select
UCR1.ENDADD            6   Endpoint Address Select
UCR1.TX1E              5   Endpoint 1/2 Transmit Enable
UCR1.FRESUM            4   Force Resume
UCR1.TP1SIZ3           3   Endpoint 1/2 Transmit Data Size 3
UCR1.TP1SIZ2           2   Endpoint 1/2 Transmit Data Size 2
UCR1.TP1SIZ1           1   Endpoint 1/2 Transmit Data Size 1
UCR1.TP1SIZ0           0   Endpoint 1/2 Transmit Data Size 0
UD0R0                 0x0030     USB Endpoint 0 Data Register 0
UD0R0.UE0RD07_UE0TD07  7   Endpoint 0 Receive/Transmit Data Buffers 7
UD0R0.UE0RD06_UE0TD06  6   Endpoint 0 Receive/Transmit Data Buffers 6
UD0R0.UE0RD05_UE0TD05  5   Endpoint 0 Receive/Transmit Data Buffers 5
UD0R0.UE0RD04_UE0TD04  4   Endpoint 0 Receive/Transmit Data Buffers 4
UD0R0.UE0RD03_UE0TD03  3   Endpoint 0 Receive/Transmit Data Buffers 3
UD0R0.UE0RD02_UE0TD02  2   Endpoint 0 Receive/Transmit Data Buffers 2
UD0R0.UE0RD01_UE0TD01  1   Endpoint 0 Receive/Transmit Data Buffers 1
UD0R0.UE0RD00_UE0TD00  0   Endpoint 0 Receive/Transmit Data Buffers 0
UD0R1                 0x0031     USB Endpoint 0 Data Register 1
UD0R1.UE0RD17_UE0TD17  7   Endpoint 0 Receive/Transmit Data Buffers 7
UD0R1.UE0RD16_UE0TD16  6   Endpoint 0 Receive/Transmit Data Buffers 6
UD0R1.UE0RD15_UE0TD15  5   Endpoint 0 Receive/Transmit Data Buffers 5
UD0R1.UE0RD14_UE0TD14  4   Endpoint 0 Receive/Transmit Data Buffers 4
UD0R1.UE0RD13_UE0TD13  3   Endpoint 0 Receive/Transmit Data Buffers 3
UD0R1.UE0RD12_UE0TD12  2   Endpoint 0 Receive/Transmit Data Buffers 2
UD0R1.UE0RD11_UE0TD11  1   Endpoint 0 Receive/Transmit Data Buffers 1
UD0R1.UE0RD10_UE0TD10  0   Endpoint 0 Receive/Transmit Data Buffers 0
UD0R2                 0x0032     USB Endpoint 0 Data Register 2
UD0R2.UE0RD27_UE0TD27  7   Endpoint 0 Receive/Transmit Data Buffers 7
UD0R2.UE0RD26_UE0TD26  6   Endpoint 0 Receive/Transmit Data Buffers 6
UD0R2.UE0RD25_UE0TD25  5   Endpoint 0 Receive/Transmit Data Buffers 5
UD0R2.UE0RD24_UE0TD24  4   Endpoint 0 Receive/Transmit Data Buffers 4
UD0R2.UE0RD23_UE0TD23  3   Endpoint 0 Receive/Transmit Data Buffers 3
UD0R2.UE0RD22_UE0TD22  2   Endpoint 0 Receive/Transmit Data Buffers 2
UD0R2.UE0RD21_UE0TD21  1   Endpoint 0 Receive/Transmit Data Buffers 1
UD0R2.UE0RD20_UE0TD20  0   Endpoint 0 Receive/Transmit Data Buffers 0
UD0R3                 0x0033     USB Endpoint 0 Data Register 3
UD0R3.UE0RD37_UE0TD37  7   Endpoint 0 Receive/Transmit Data Buffers 7
UD0R3.UE0RD36_UE0TD36  6   Endpoint 0 Receive/Transmit Data Buffers 6
UD0R3.UE0RD35_UE0TD35  5   Endpoint 0 Receive/Transmit Data Buffers 5
UD0R3.UE0RD34_UE0TD34  4   Endpoint 0 Receive/Transmit Data Buffers 4
UD0R3.UE0RD33_UE0TD33  3   Endpoint 0 Receive/Transmit Data Buffers 3
UD0R3.UE0RD32_UE0TD32  2   Endpoint 0 Receive/Transmit Data Buffers 2
UD0R3.UE0RD31_UE0TD31  1   Endpoint 0 Receive/Transmit Data Buffers 1
UD0R3.UE0RD30_UE0TD30  0   Endpoint 0 Receive/Transmit Data Buffers 0
UD0R4                 0x0034     USB Endpoint 0 Data Register 4
UD0R4.UE0RD47_UE0TD47  7   Endpoint 0 Receive/Transmit Data Buffers 7
UD0R4.UE0RD46_UE0TD46  6   Endpoint 0 Receive/Transmit Data Buffers 6
UD0R4.UE0RD45_UE0TD45  5   Endpoint 0 Receive/Transmit Data Buffers 5
UD0R4.UE0RD44_UE0TD44  4   Endpoint 0 Receive/Transmit Data Buffers 4
UD0R4.UE0RD43_UE0TD43  3   Endpoint 0 Receive/Transmit Data Buffers 3
UD0R4.UE0RD42_UE0TD42  2   Endpoint 0 Receive/Transmit Data Buffers 2
UD0R4.UE0RD41_UE0TD41  1   Endpoint 0 Receive/Transmit Data Buffers 1
UD0R4.UE0RD40_UE0TD40  0   Endpoint 0 Receive/Transmit Data Buffers 0
UD0R5                 0x0035     USB Endpoint 0 Data Register 5
UD0R5.UE0RD57_UE0TD57  7   Endpoint 0 Receive/Transmit Data Buffers 7
UD0R5.UE0RD56_UE0TD56  6   Endpoint 0 Receive/Transmit Data Buffers 6
UD0R5.UE0RD55_UE0TD55  5   Endpoint 0 Receive/Transmit Data Buffers 5
UD0R5.UE0RD54_UE0TD54  4   Endpoint 0 Receive/Transmit Data Buffers 4
UD0R5.UE0RD53_UE0TD53  3   Endpoint 0 Receive/Transmit Data Buffers 3
UD0R5.UE0RD52_UE0TD52  2   Endpoint 0 Receive/Transmit Data Buffers 2
UD0R5.UE0RD51_UE0TD51  1   Endpoint 0 Receive/Transmit Data Buffers 1
UD0R5.UE0RD50_UE0TD50  0   Endpoint 0 Receive/Transmit Data Buffers 0
UD0R6                 0x0036     USB Endpoint 0 Data Register 6
UD0R6.UE0RD67_UE0TD67  7   Endpoint 0 Receive/Transmit Data Buffers 7
UD0R6.UE0RD66_UE0TD66  6   Endpoint 0 Receive/Transmit Data Buffers 6
UD0R6.UE0RD65_UE0TD65  5   Endpoint 0 Receive/Transmit Data Buffers 5
UD0R6.UE0RD64_UE0TD64  4   Endpoint 0 Receive/Transmit Data Buffers 4
UD0R6.UE0RD63_UE0TD63  3   Endpoint 0 Receive/Transmit Data Buffers 3
UD0R6.UE0RD62_UE0TD62  2   Endpoint 0 Receive/Transmit Data Buffers 2
UD0R6.UE0RD61_UE0TD61  1   Endpoint 0 Receive/Transmit Data Buffers 1
UD0R6.UE0RD60_UE0TD60  0   Endpoint 0 Receive/Transmit Data Buffers 0
UD0R7                 0x0037     USB Endpoint 0 Data Register 7
UD0R7.UE0RD77_UE0TD77  7   Endpoint 0 Receive/Transmit Data Buffers 7
UD0R7.UE0RD76_UE0TD76  6   Endpoint 0 Receive/Transmit Data Buffers 6
UD0R7.UE0RD75_UE0TD75  5   Endpoint 0 Receive/Transmit Data Buffers 5
UD0R7.UE0RD74_UE0TD74  4   Endpoint 0 Receive/Transmit Data Buffers 4
UD0R7.UE0RD73_UE0TD73  3   Endpoint 0 Receive/Transmit Data Buffers 3
UD0R7.UE0RD72_UE0TD72  2   Endpoint 0 Receive/Transmit Data Buffers 2
UD0R7.UE0RD71_UE0TD71  1   Endpoint 0 Receive/Transmit Data Buffers 1
UD0R7.UE0RD70_UE0TD70  0   Endpoint 0 Receive/Transmit Data Buffers 0
UD1R0                 0x0038     USB Endpoint 1_2 Data Register 0
UD1R0.UE1TD07          7   Endpoint 1/2 Transmit Data Buffers 7
UD1R0.UE1TD06          6   Endpoint 1/2 Transmit Data Buffers 6
UD1R0.UE1TD05          5   Endpoint 1/2 Transmit Data Buffers 5
UD1R0.UE1TD04          4   Endpoint 1/2 Transmit Data Buffers 4
UD1R0.UE1TD03          3   Endpoint 1/2 Transmit Data Buffers 3
UD1R0.UE1TD02          2   Endpoint 1/2 Transmit Data Buffers 2
UD1R0.UE1TD01          1   Endpoint 1/2 Transmit Data Buffers 1
UD1R0.UE1TD00          0   Endpoint 1/2 Transmit Data Buffers 0
UD1R1                 0x0039     USB Endpoint 1_2 Data Register 1
UD1R1.UE1TD17          7   Endpoint 1/2 Transmit Data Buffers 7
UD1R1.UE1TD16          6   Endpoint 1/2 Transmit Data Buffers 6
UD1R1.UE1TD15          5   Endpoint 1/2 Transmit Data Buffers 5
UD1R1.UE1TD14          4   Endpoint 1/2 Transmit Data Buffers 4
UD1R1.UE1TD13          3   Endpoint 1/2 Transmit Data Buffers 3
UD1R1.UE1TD12          2   Endpoint 1/2 Transmit Data Buffers 2
UD1R1.UE1TD11          1   Endpoint 1/2 Transmit Data Buffers 1
UD1R1.UE1TD10          0   Endpoint 1/2 Transmit Data Buffers 0
UD1R2                 0x003A     USB Endpoint 1_2 Data Register 2
UD1R2.UE1TD27          7   Endpoint 1/2 Transmit Data Buffers 7
UD1R2.UE1TD26          6   Endpoint 1/2 Transmit Data Buffers 6
UD1R2.UE1TD25          5   Endpoint 1/2 Transmit Data Buffers 5
UD1R2.UE1TD24          4   Endpoint 1/2 Transmit Data Buffers 4
UD1R2.UE1TD23          3   Endpoint 1/2 Transmit Data Buffers 3
UD1R2.UE1TD22          2   Endpoint 1/2 Transmit Data Buffers 2
UD1R2.UE1TD21          1   Endpoint 1/2 Transmit Data Buffers 1
UD1R2.UE1TD20          0   Endpoint 1/2 Transmit Data Buffers 0
UD1R3                 0x003B     USB Endpoint 1_2 Data Register 3
UD1R3.UE1TD37          7   Endpoint 1/2 Transmit Data Buffers 7
UD1R3.UE1TD36          6   Endpoint 1/2 Transmit Data Buffers 6
UD1R3.UE1TD35          5   Endpoint 1/2 Transmit Data Buffers 5
UD1R3.UE1TD34          4   Endpoint 1/2 Transmit Data Buffers 4
UD1R3.UE1TD33          3   Endpoint 1/2 Transmit Data Buffers 3
UD1R3.UE1TD32          2   Endpoint 1/2 Transmit Data Buffers 2
UD1R3.UE1TD31          1   Endpoint 1/2 Transmit Data Buffers 1
UD1R3.UE1TD30          0   Endpoint 1/2 Transmit Data Buffers 0
UD1R4                 0x003C     USB Endpoint 1_2 Data Register 4
UD1R4.UE1TD47          7   Endpoint 1/2 Transmit Data Buffers 7
UD1R4.UE1TD46          6   Endpoint 1/2 Transmit Data Buffers 6
UD1R4.UE1TD45          5   Endpoint 1/2 Transmit Data Buffers 5
UD1R4.UE1TD44          4   Endpoint 1/2 Transmit Data Buffers 4
UD1R4.UE1TD43          3   Endpoint 1/2 Transmit Data Buffers 3
UD1R4.UE1TD42          2   Endpoint 1/2 Transmit Data Buffers 2
UD1R4.UE1TD41          1   Endpoint 1/2 Transmit Data Buffers 1
UD1R4.UE1TD40          0   Endpoint 1/2 Transmit Data Buffers 0
UD1R5                 0x003D     USB Endpoint 1_2 Data Register 5
UD1R5.UE1TD57          7   Endpoint 1/2 Transmit Data Buffers 7
UD1R5.UE1TD56          6   Endpoint 1/2 Transmit Data Buffers 6
UD1R5.UE1TD55          5   Endpoint 1/2 Transmit Data Buffers 5
UD1R5.UE1TD54          4   Endpoint 1/2 Transmit Data Buffers 4
UD1R5.UE1TD53          3   Endpoint 1/2 Transmit Data Buffers 3
UD1R5.UE1TD52          2   Endpoint 1/2 Transmit Data Buffers 2
UD1R5.UE1TD51          1   Endpoint 1/2 Transmit Data Buffers 1
UD1R5.UE1TD50          0   Endpoint 1/2 Transmit Data Buffers 0
UD1R6                 0x003E     USB Endpoint 1_2 Data Register 6
UD1R6.UE1TD67          7   Endpoint 1/2 Transmit Data Buffers 7
UD1R6.UE1TD66          6   Endpoint 1/2 Transmit Data Buffers 6
UD1R6.UE1TD65          5   Endpoint 1/2 Transmit Data Buffers 5
UD1R6.UE1TD64          4   Endpoint 1/2 Transmit Data Buffers 4
UD1R6.UE1TD63          3   Endpoint 1/2 Transmit Data Buffers 3
UD1R6.UE1TD62          2   Endpoint 1/2 Transmit Data Buffers 2
UD1R6.UE1TD61          1   Endpoint 1/2 Transmit Data Buffers 1
UD1R6.UE1TD60          0   Endpoint 1/2 Transmit Data Buffers 0
UD1R7                 0x003F     USB Endpoint 1_2 Data Register 7
UD1R7.UE1TD77          7   Endpoint 1/2 Transmit Data Buffers 7
UD1R7.UE1TD76          6   Endpoint 1/2 Transmit Data Buffers 6
UD1R7.UE1TD75          5   Endpoint 1/2 Transmit Data Buffers 5
UD1R7.UE1TD74          4   Endpoint 1/2 Transmit Data Buffers 4
UD1R7.UE1TD73          3   Endpoint 1/2 Transmit Data Buffers 3
UD1R7.UE1TD72          2   Endpoint 1/2 Transmit Data Buffers 2
UD1R7.UE1TD71          1   Endpoint 1/2 Transmit Data Buffers 1
UD1R7.UE1TD70          0   Endpoint 1/2 Transmit Data Buffers 0
SPCSR                 0x0040     Sync Processor Control and Status Register
SPCSR.VSIE             7   VSync Interrupt Enable
SPCSR.VEDGE            6   VSync Interrupt Edge Select
SPCSR.VSIF             5   VSync Interrupt Flag
SPCSR.COMP             4   Composite Sync Input Enable
SPCSR.VINVO            3   VSYNCO Signal Polarity
SPCSR.HINVO            2   HSYNCO Signal Polarity
SPCSR.VPOL             1   Vsync Input Polarity
SPCSR.HPOL             0   Hsync Input Polarity
VFHR                  0x0041     Vertical Frequency High Register
VFHR.VOF               7   Vertical Frequency Counter Overflow
VFHR.CPW1              6   Clamp Pulse Width 1
VFHR.CPW0              5   Clamp Pulse Width 0
VFHR.VF12              4   Vertical Frame Frequency 12
VFHR.VF11              3   Vertical Frame Frequency 11
VFHR.VF10              2   Vertical Frame Frequency 10
VFHR.VF9               1   Vertical Frame Frequency 9
VFHR.VF8               0   Vertical Frame Frequency 8
VFLR                  0x0042     Vertical Frequency Low Register
VFLR.VF7               7   Vertical Frame Frequency 7
VFLR.VF6               6   Vertical Frame Frequency 6
VFLR.VF5               5   Vertical Frame Frequency 5
VFLR.VF4               4   Vertical Frame Frequency 4
VFLR.VF3               3   Vertical Frame Frequency 3
VFLR.VF2               2   Vertical Frame Frequency 2
VFLR.VF1               1   Vertical Frame Frequency 1
VFLR.VF0               0   Vertical Frame Frequency 0
HFHR                  0x0043     Hsync Frequency High Register
HFHR.HFH7              7   Horizontal Line Frequency 7
HFHR.HFH6              6   Horizontal Line Frequency 6
HFHR.HFH5              5   Horizontal Line Frequency 5
HFHR.HFH4              4   Horizontal Line Frequency 4
HFHR.HFH3              3   Horizontal Line Frequency 3
HFHR.HFH2              2   Horizontal Line Frequency 2
HFHR.HFH1              1   Horizontal Line Frequency 1
HFHR.HFH0              0   Horizontal Line Frequency 0
HFLR                  0x0044     Hsync Frequency Low Register
HFLR.HOVER             7   Hsync Frequency Counter Overflow
HFLR.HFL4              4   Horizontal Line Frequency 4
HFLR.HFL3              3   Horizontal Line Frequency 3
HFLR.HFL2              2   Horizontal Line Frequency 2
HFLR.HFL1              1   Horizontal Line Frequency 1
HFLR.HFL0              0   Horizontal Line Frequency 0
SPIOCR                0x0045     Sync Processor I_O Control Register
SPIOCR.VSYNCS          7   VSYNC Input State
SPIOCR.HSYNCS          6   HSYNC Input State
SPIOCR.COINV           5   Clamp Output Invert
SPIOCR.SOGSEL          3   SOG Select
SPIOCR.CLAMPOE         2   Clamp Output Enable
SPIOCR.BPOR            1   Back Porch
SPIOCR.SOUT            0   Sync Output Enable
SPCR1                 0x0046     Sync Processor Control Register 1
SPCR1.LVSIE            7   Low VSync Interrupt Enable
SPCR1.LVSIF            6   Low VSync Interrupt Flag
SPCR1.HPS1             5   HSYNC input Detection Pulse Width 1
SPCR1.HPS0             4   HSYNC input Detection Pulse Width 0
SPCR1.ATPOL            1   Auto Polarity
SPCR1.FSHF             0   Fast Horizontal Frequency Count
HVOCR                 0x0047     H AND V Sync Output Control Register
HVOCR.HVOCR2           2   H&V Output Select Bits 2
HVOCR.HVOCR1           1   H&V Output Select Bits 1
HVOCR.HVOCR0           0   H&V Output Select Bits 0
UNUSED0048            0x0048     UNUSED
PDCR                  0x0049     Port D Configuration Register
PDCR.IICDATE           6   MMIIC Data Pin Enable
PDCR.IICSCLE           5   MMIIC Clock Pin Enable
PDCR.CLAMPE            4   CLAMP Pin Enable
PDCR.DDCSCLE           3   DDC Clock Pin Enable
PDCR.DDCDATE           2   DDC Data Pin Enable
PDCR.USBD_MINUS_E      1   USB D- Pin Enable
PDCR.USBD_PLUS_E       0   USB D+ Pin Enable
MIMCR                 0x004A     Multi-Master IIC Master Control Register
MIMCR.MMALIF           7   Multi-Master Arbitration Lost Interrupt Flag
MIMCR.MMNAKIF          6   No Acknowledge Interrupt Flag
MIMCR.MMBB             5   Bus Busy Flag
MIMCR.MMAST            4   Master Control Bit
MIMCR.MMRW             3   Master Read/Write
MIMCR.MMBR2            2   Baud Rate Select 2
MIMCR.MMBR1            1   Baud Rate Select 1
MIMCR.MMBR0            0   Baud Rate Select 0
MMADR                 0x004B     Multi-Master IIC Address Register
MMADR.MMAD7            7   Multi-Master Address 7
MMADR.MMAD6            6   Multi-Master Address 6
MMADR.MMAD5            5   Multi-Master Address 5
MMADR.MMAD4            4   Multi-Master Address 4
MMADR.MMAD3            3   Multi-Master Address 3
MMADR.MMAD2            2   Multi-Master Address 2
MMADR.MMAD1            1   Multi-Master Address 1
MMADR.MMEXTAD          0   Multi-Master Expanded Address
MMCR                  0x004C     Multi-Master IIC Control Register
MMCR.MMEN              7   Multi-Master IIC Enable
MMCR.MMIEN             6   Multi-Master IIC Interrupt Enable
MMCR.MMTXAK            3   Transmit Acknowledge Enable
MMSR                  0x004D     Multi-Master IIC Status Register
MMSR.MMRXIF            7   Multi-Master IIC Receive Interrupt Flag
MMSR.MMTXIF            6   Multi-Master Transmit Interrupt Flag
MMSR.MMATCH            5   Multi-Master Address Match
MMSR.MMSRW             4   Multi-Master Slave Read/Write
MMSR.MMRXAK            3   Multi-Master Receive Acknowledge
MMSR.MMTXBE            1   Multi-Master Transmit Buffer Empty
MMSR.MMRXBF            0   Multi-Master Receive Buffer Full
MMDTR                 0x004E     Multi-Master IIC Data Transmit Register
MMDTR.MMTD7            7
MMDTR.MMTD6            6
MMDTR.MMTD5            5
MMDTR.MMTD4            4
MMDTR.MMTD3            3
MMDTR.MMTD2            2
MMDTR.MMTD1            1
MMDTR.MMTD0            0
MMDRR                 0x004F     Multi-Master IIC Data Receive Register
MMDRR.MMRD7            7
MMDRR.MMRD6            6
MMDRR.MMRD5            5
MMDRR.MMRD4            4
MMDRR.MMRD3            3
MMDRR.MMRD2            2
MMDRR.MMRD1            1
MMDRR.MMRD0            0
UNUSED0050            0x0050     UNUSED
8PWM                  0x0051     PWM8 Data Register
8PWM.8PWM4             7   PWM Bits 4                   
8PWM.8PWM3             6   PWM Bits 3                   
8PWM.8PWM2             5   PWM Bits 2                   
8PWM.8PWM1             4   PWM Bits 1                   
8PWM.8PWM0             3   PWM Bits 0                   
8PWM.8BRM2             2   Binary Rate Multiplier Bits 2
8PWM.8BRM1             1   Binary Rate Multiplier Bits 1
8PWM.8BRM0             0   Binary Rate Multiplier Bits 0
9PWM                  0x0052     PWM9 Data Register
9PWM.9PWM4             7   PWM Bits 4                   
9PWM.9PWM3             6   PWM Bits 3                   
9PWM.9PWM2             5   PWM Bits 2                   
9PWM.9PWM1             4   PWM Bits 1                   
9PWM.9PWM0             3   PWM Bits 0                   
9PWM.9BRM2             2   Binary Rate Multiplier Bits 2
9PWM.9BRM1             1   Binary Rate Multiplier Bits 1
9PWM.9BRM0             0   Binary Rate Multiplier Bits 0
10PWM                 0x0053     PWM10 Data Register
10PWM.10PWM4           7   PWM Bits 4                   
10PWM.10PWM3           6   PWM Bits 3                   
10PWM.10PWM2           5   PWM Bits 2                   
10PWM.10PWM1           4   PWM Bits 1                   
10PWM.10PWM0           3   PWM Bits 0                   
10PWM.10BRM2           2   Binary Rate Multiplier Bits 2
10PWM.10BRM1           1   Binary Rate Multiplier Bits 1
10PWM.10BRM0           0   Binary Rate Multiplier Bits 0
11PWM                 0x0054     PWM11 Data Register
11PWM.11PWM4           7   PWM Bits 4                   
11PWM.11PWM3           6   PWM Bits 3                   
11PWM.11PWM2           5   PWM Bits 2                   
11PWM.11PWM1           4   PWM Bits 1                   
11PWM.11PWM0           3   PWM Bits 0                   
11PWM.11BRM2           2   Binary Rate Multiplier Bits 2
11PWM.11BRM1           1   Binary Rate Multiplier Bits 1
11PWM.11BRM0           0   Binary Rate Multiplier Bits 0
12PWM                 0x0055     PWM12 Data Register
12PWM.12PWM4           7   PWM Bits 4                   
12PWM.12PWM3           6   PWM Bits 3                   
12PWM.12PWM2           5   PWM Bits 2                   
12PWM.12PWM1           4   PWM Bits 1                   
12PWM.12PWM0           3   PWM Bits 0                   
12PWM.12BRM2           2   Binary Rate Multiplier Bits 2
12PWM.12BRM1           1   Binary Rate Multiplier Bits 1
12PWM.12BRM0           0   Binary Rate Multiplier Bits 0
13PWM                 0x0056     PWM13 Data Register
13PWM.13PWM4           7   PWM Bits 4                   
13PWM.13PWM3           6   PWM Bits 3                   
13PWM.13PWM2           5   PWM Bits 2                   
13PWM.13PWM1           4   PWM Bits 1                   
13PWM.13PWM0           3   PWM Bits 0                   
13PWM.13BRM2           2   Binary Rate Multiplier Bits 2
13PWM.13BRM1           1   Binary Rate Multiplier Bits 1
13PWM.13BRM0           0   Binary Rate Multiplier Bits 0
14PWM                 0x0057     PWM14 Data Register
14PWM.14PWM4           7   PWM Bits 4                   
14PWM.PWM3             6   PWM Bits 3                   
14PWM.14PWM2           5   PWM Bits 2                   
14PWM.14PWM1           4   PWM Bits 1                   
14PWM.14PWM0           3   PWM Bits 0                   
14PWM.14BRM2           2   Binary Rate Multiplier Bits 2
14PWM.14BRM1           1   Binary Rate Multiplier Bits 1
14PWM.14BRM0           0   Binary Rate Multiplier Bits 0
15PWM                 0x0058     PWM15 Data Register
15PWM.15PWM4           7   PWM Bits 4                   
15PWM.15PWM3           6   PWM Bits 3                   
15PWM.15PWM2           5   PWM Bits 2                   
15PWM.15PWM1           4   PWM Bits 1                   
15PWM.15PWM0           3   PWM Bits 0                   
15PWM.15BRM2           2   Binary Rate Multiplier Bits 2
15PWM.15BRM1           1   Binary Rate Multiplier Bits 1
15PWM.15BRM0           0   Binary Rate Multiplier Bits 0
PWMCR2                0x0059     PWM Control Register 2
PWMCR2.PWM15E          7   PWM Output Enable 15
PWMCR2.PWM14E          6   PWM Output Enable 14
PWMCR2.PWM13E          5   PWM Output Enable 13
PWMCR2.PWM12E          4   PWM Output Enable 12
PWMCR2.PWM11E          3   PWM Output Enable 11
PWMCR2.PWM10E          2   PWM Output Enable 10
PWMCR2.PWM9E           1   PWM Output Enable 9
PWMCR2.PWM8E           0   PWM Output Enable 8
UNUSED005A            0x005A     UNUSED
UNUSED005B            0x005B     UNUSED
UNUSED005C            0x005C     UNUSED
ADSCR                 0x005D     ADC Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADR                   0x005E     ADC Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADICLK                0x005F     ADC Input Clock Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bits 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bits 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bits 0
SBSR                  0xFE00     SIM Break Status Register
SBSR.SBSW              1   SIM Break Stop/Wait Bit
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Bit
SRSR.PIN               6   External Reset Bit
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit (opcode fetches only)
ReservFE02            0xFE02     Reserved
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF6               7   Interrupt Flags 6
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF2               3   Interrupt Flags 2
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF10              3   Interrupt Flags 10
INT2.IF9               2   Interrupt Flags 9
INT2.IF8               1   Interrupt Flags 8
INT2.IF7               0   Interrupt Flags 7
ReservFE06            0xFE06     Reserved
FLCR                  0xFE07     FLASH Control Register
FLCR.HVEN              3   High-Voltage Enable Bit
FLCR.MASS              2   Mass Erase Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
FLBPR                 0xFE08     FLASH Block Protect Register
FLBPR.BPR7             7   FLASH Block Protect Bits 7
FLBPR.BPR6             6   FLASH Block Protect Bits 6
FLBPR.BPR5             5   FLASH Block Protect Bits 5
FLBPR.BPR4             4   FLASH Block Protect Bits 4
FLBPR.BPR3             3   FLASH Block Protect Bits 3
FLBPR.BPR2             2   FLASH Block Protect Bits 2
FLBPR.BPR1             1   FLASH Block Protect Bits 1
ReservFE09            0xFE09     Reserved
ReservFE0A            0xFE0A     Reserved
ReservFE0B            0xFE0B     Reserved
BRKH                  0xFE0C     Break Address High Register
BRKL                  0xFE0D     Break Address low Register
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
ReservFFF4            0xFFF4     Reserved
ReservFFF5            0xFFF5     Reserved
ReservFFE6            0xFFE6     Reserved
ReservFFE7            0xFFE7     Reserved
COPCTL                0xFFFF     COP Control Register


.68HC908EY16
; http://

; MEMORY MAP

; Interrupt and reset vector assignments

; INPUT/ OUTPUT PORTS

.68HC908GP32
; MC68HC908GP32/H  http://
; MC68HC908GP32.pdf


; MEMORY MAP
area DATA FSR		   0x0000:0x0040
area DATA RAM		   0x0040:0x0240
area BSS  Unimplemented	   0x0240:0x8000
area DATA FLASH_Memory	   0x8000:0xFE00
area DATA FSR_1		   0xFE00:0xFE0D
area BSS  Unimplemented	   0xFE0D:0xFE20
area DATA Monitor_ROM	   0xFE20:0xFF53
area BSS  Unimplemented	   0xFF53:0xFF7E
area DATA FSR_2		   0xFF7E:0xFF7F
area BSS  Unimplemented	   0xFF7F:0xFFDC
area DATA USER_VEC	   0xFFDC:0x10000


; Interrupt and reset vector assignments
interrupt __RESET           0xFFFE      Processor reset
interrupt SWI               0xFFFC      "SWI" 
interrupt IRQ               0xFFFA      "IRQ"
interrupt PLL               0xFFF8      "PLL Module"
interrupt TIM1_CH0          0xFFF6      "TIM1 Channel 0"
interrupt TIM1_CH1          0xFFF4      "TIM1 Channel 1"
interrupt TIM1              0xFFF2      "TIM1 Overflow"
interrupt TIM2_CH0          0xFFF0      "TIM2 Channel 0"
interrupt TIM2_CH1          0xFFEE      "TIM2 Channel 1"
interrupt TIM2              0xFFEC      "TIM2 Overflow"
interrupt SPI_R             0xFFEA      "SPI Module Receive"
interrupt SPI_T             0xFFE8      "SPI Module Transmit"
interrupt SCI_E             0xFFE6      "SCI Module Error"
interrupt SCI_R             0xFFE4      "SCI Module Receive"
interrupt SCI_T             0xFFE2      "SCI Module Transmit"
interrupt KBRD              0xFFE0      "Keyboard"
interrupt ADC               0xFFDE      "ADC Conversion Complete"
interrupt TIME              0xFFDC      "TIMEbase vector"


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bits 7
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
PTC                   0x0002     Port C Data Register
PTC.PTC6               6   Port C Data Bits 6
PTC.PTC5               5   Port C Data Bits 5
PTC.PTC4               4   Port C Data Bits 4
PTC.PTC3               3   Port C Data Bits 3
PTC.PTC2               2   Port C Data Bits 2
PTC.PTC1               1   Port C Data Bits 1
PTC.PTC0               0   Port C Data Bits 0
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bits 7
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bits 7
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
DDRC                  0x0006     Data Direction Register C
DDRC.DDRC6             6   Data Direction Register C Bits 6
DDRC.DDRC5             5   Data Direction Register C Bits 5
DDRC.DDRC4             4   Data Direction Register C Bits 4
DDRC.DDRC3             3   Data Direction Register C Bits 3
DDRC.DDRC2             2   Data Direction Register C Bits 2
DDRC.DDRC1             1   Data Direction Register C Bits 1
DDRC.DDRC0             0   Data Direction Register C Bits 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bits 7
DDRD.DDRD6             6   Data Direction Register D Bits 6
DDRD.DDRD5             5   Data Direction Register D Bits 5
DDRD.DDRD4             4   Data Direction Register D Bits 4
DDRD.DDRD3             3   Data Direction Register D Bits 3
DDRD.DDRD2             2   Data Direction Register D Bits 2
DDRD.DDRD1             1   Data Direction Register D Bits 1
DDRD.DDRD0             0   Data Direction Register D Bits 0
PTE                   0x0008     Port E Data Register
PTE.PTE1               1   Port E Data Bits 1
PTE.PTE0               0   Port E Data Bits 0
UNUSED0009            0x0009     UNUSED
UNUSED000A            0x000A     UNUSED
UNUSED000B            0x000B     UNUSED
DDRE                  0x000C     Data Direction Register E
DDRE.DDRE1             1   Data Direction Register E Bits 1
DDRE.DDRE0             0   Data Direction Register E Bits 0
PTAPUE                0x000D     Port A Input Pullup Enable Register
PTAPUE.PTAPUE7         7   Port A Input Pullup Enable Bits 7
PTAPUE.PTAPUE6         6   Port A Input Pullup Enable Bits 6
PTAPUE.PTAPUE5         5   Port A Input Pullup Enable Bits 5
PTAPUE.PTAPUE4         4   Port A Input Pullup Enable Bits 4
PTAPUE.PTAPUE3         3   Port A Input Pullup Enable Bits 3
PTAPUE.PTAPUE2         2   Port A Input Pullup Enable Bits 2
PTAPUE.PTAPUE1         1   Port A Input Pullup Enable Bits 1
PTAPUE.PTAPUE0         0   Port A Input Pullup Enable Bits 0
PTCPUE                0x000E     Register Port C Input Pullup Enable
PTCPUE.PTCPUE6         6   Port C Input Pullup Enable Bits 6
PTCPUE.PTCPUE5         5   Port C Input Pullup Enable Bits 5
PTCPUE.PTCPUE4         4   Port C Input Pullup Enable Bits 4
PTCPUE.PTCPUE3         3   Port C Input Pullup Enable Bits 3
PTCPUE.PTCPUE2         2   Port C Input Pullup Enable Bits 2
PTCPUE.PTCPUE1         1   Port C Input Pullup Enable Bits 1
PTCPUE.PTCPUE0         0   Port C Input Pullup Enable Bits 0
PTDPUE                0x000F     Port D Input Pullup Enable Register
PTDPUE.PTDPUE7         7   Port D Input Pullup Enable Bits 7
PTDPUE.PTDPUE6         6   Port D Input Pullup Enable Bits 6
PTDPUE.PTDPUE5         5   Port D Input Pullup Enable Bits 5
PTDPUE.PTDPUE4         4   Port D Input Pullup Enable Bits 4
PTDPUE.PTDPUE3         3   Port D Input Pullup Enable Bits 3
PTDPUE.PTDPUE2         2   Port D Input Pullup Enable Bits 2
PTDPUE.PTDPUE1         1   Port D Input Pullup Enable Bits 1
PTDPUE.PTDPUE0         0   Port D Input Pullup Enable Bits 0
SPCR                  0x0010     SPI Control Register
SPCR.SPRIE             7   SPI Receiver Interrupt Enable Bit
SPCR.DMAS              6   DMA Select Bit
SPCR.SPMSTR            5   SPI Master Bit
SPCR.CPOL              4   Clock Polarity Bit
SPCR.CPHA              3   Clock Phase Bit
SPCR.SPWOM             2   SPI Wired-OR Mode Bit
SPCR.SPE               1   SPI Enable
SPCR.SPTIE             0   SPI Transmit Interrupt Enable
SPSCR                 0x0011     SPI Status and Control Register
SPSCR.SPRF             7   SPI Receiver Full Bit
SPSCR.ERRIE            6   Error Interrupt Enable Bit
SPSCR.OVRF             5   Overflow Bit
SPSCR.MODF             4   Mode Fault Bit
SPSCR.SPTE             3   SPI Transmitter Empty Bit
SPSCR.MODFEN           2   Mode Fault Enable Bit
SPSCR.SPR1             1   SPI Baud Rate Select Bits 1
SPSCR.SPR0             0   SPI Baud Rate Select Bits 0
SPDR                  0x0012     SPI Data Register
SPDR.R7_T7             7   Receive/Transmit Data Bits 7
SPDR.R6_T6             6   Receive/Transmit Data Bits 6
SPDR.R5_T5             5   Receive/Transmit Data Bits 5
SPDR.R4_T4             4   Receive/Transmit Data Bits 4
SPDR.R3_T3             3   Receive/Transmit Data Bits 3
SPDR.R2_T2             2   Receive/Transmit Data Bits 2
SPDR.R1_T1             1   Receive/Transmit Data Bits 1
SPDR.R0_T0             0   Receive/Transmit Data Bits 0
SCC1                  0x0013     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit
SCC1.ENSCI             6   Enable SCI Bit
SCC1.TXINV             5   Transmit Inversion Bit
SCC1.M                 4   Mode (Character Length) Bit
SCC1.WAKE              3   Wakeup Condition Bit
SCC1.ILTY              2   Idle Line Type Bit
SCC1.PEN               1   Parity Enable Bit
SCC1.PTY               0   Parity Bit
SCC2                  0x0014     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit
SCC2.ILIE              4   Idle Line Interrupt Enable Bit
SCC2.TE                3   Transmitter Enable Bit
SCC2.RE                2   Receiver Enable Bit
SCC2.RWU               1   Receiver Wakeup Bit
SCC2.SBK               0   Send Break Bit
SCC3                  0x0015     SCI Control Register 3
SCC3.R8                7   Received Bit 8
SCC3.T8                6   Transmitted Bit 8
SCC3.DMARE             5   DMA Receive Enable Bit
SCC3.DMATE             4   DMA Transfer Enable Bit
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit
SCS1                  0x0016     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit
SCS1.TC                6   Transmission Complete Bit
SCS1.SCRF              5   SCI Receiver Full Bit
SCS1.IDLE              4   Receiver Idle Bit
SCS1.OR                3   Receiver Overrun Bit
SCS1.NF                2   Receiver Noise Flag Bit
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit
SCS2                  0x0017     SCI Status Register 2
SCS2.BKF               1   Break Flag Bit
SCS2.RPF               0   Reception in Progress Flag Bit
SCDR                  0x0018     SCI Data Register
SCDR.R7_T7             7   Receive/Transmit Data Bits 7
SCDR.R6_T6             6   Receive/Transmit Data Bits 6
SCDR.R5_T5             5   Receive/Transmit Data Bits 5
SCDR.R4_T4             4   Receive/Transmit Data Bits 4
SCDR.R3_T3             3   Receive/Transmit Data Bits 3
SCDR.R2_T2             2   Receive/Transmit Data Bits 2
SCDR.R1_T1             1   Receive/Transmit Data Bits 1
SCDR.R0_T0             0   Receive/Transmit Data Bits 0
SCBR                  0x0019     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2
SCBR.SCR1              1   SCI Baud Rate Select Bits 1
SCBR.SCR0              0   SCI Baud Rate Select Bits 0
INTKBSCR              0x001A     Keyboard Status and Control Register
INTKBSCR.KEYF          3   Keyboard Flag Bit
INTKBSCR.ACKK          2   Keyboard Acknowledge Bit
INTKBSCR.IMASKK        1   Keyboard Interrupt Mask Bit
INTKBSCR.MODEK         0   Keyboard Triggering Sensitivity Bit
INTKBIER              0x001B     Keyboard Interrupt Enable Register
INTKBIER.KBIE7         7   Keyboard Interrupt Enable Bits 7
INTKBIER.KBIE6         6   Keyboard Interrupt Enable Bits 6
INTKBIER.KBIE5         5   Keyboard Interrupt Enable Bits 5
INTKBIER.KBIE4         4   Keyboard Interrupt Enable Bits 4
INTKBIER.KBIE3         3   Keyboard Interrupt Enable Bits 3
INTKBIER.KBIE2         2   Keyboard Interrupt Enable Bits 2
INTKBIER.KBIE1         1   Keyboard Interrupt Enable Bits 1
INTKBIER.KBIE0         0   Keyboard Interrupt Enable Bits 0
TBCR                  0x001C     Time Base Module Control Register
TBCR.TBIF              7   Timebase Interrupt Flag
TBCR.TBR2              6   Timebase Rate Selection 2
TBCR.TBR1              5   Timebase Rate Selection 1
TBCR.TBR0              4   Timebase Rate Selection 0
TBCR.TACK              3   Timebase ACKnowledge
TBCR.TBIE              2   Timebase Interrupt Enabled
TBCR.TBON              1   Timebase Enabled
INTSCR                0x001D     IRQ Status and Control Register
INTSCR.IRQF1           3   IRQ Flag Bit
INTSCR.ACK1            2   IRQ Interrupt Request Acknowledge Bit
INTSCR.IMASK1          1   IRQ Interrupt Mask Bit
INTSCR.MODE1           0   IRQ Edge/Level Select Bit
CONFIG2               0x001E     Configuration Register 2
CONFIG2.OSCSTOPENB     1   Oscillator Stop Mode Enable Bar Bit
CONFIG2.SCIBDSRC       0   SCI Baud Rate Clock Source Bit
CONFIG1               0x001F     Configuration Register 1
CONFIG1.COPRS          7   COP Rate Select Bit
CONFIG1.LVISTOP        6   LVI Enable in Stop Mode Bit
CONFIG1.LVIRSTD        5   LVI Reset Disable Bit
CONFIG1.LVIPWRD        4   LVI Power Disable Bit
CONFIG1.LVI5OR3        3   LVI 5-V or 3-V Operating Mode Bit
CONFIG1.SSREC          2   Short Stop Recovery Bit
CONFIG1.STOP           1   STOP Instruction Enable Bit
CONFIG1.COPD           0   COP Disable Bit
T1SC                  0x0020     Timer 1 Status and Control Register
T1SC.TOF               7   TIM Overflow Flag Bit
T1SC.TOIE              6   TIM Overflow Interrupt Enable Bit
T1SC.TSTOP             5   TIM Stop Bit
T1SC.TRST              4   TIM Reset Bit
T1SC.PS2               2   Prescaler Select Bits 2
T1SC.PS1               1   Prescaler Select Bits 1
T1SC.PS0               0   Prescaler Select Bits 0
T1CNTH                0x0021     Timer 1 Counter Register High
T1CNTL                0x0022     Timer 1 Counter Register Low
T1MODH                0x0023     Timer 1 Counter Modulo Register High
T1MODL                0x0024     Timer 1 Counter Modulo Register Low
T1SC0                 0x0025     Timer 1 Channel 0 Status and Control Register
T1SC0.CH0F             7   Channel 0 Flag Bit
T1SC0.CH0IE            6   Channel 0 Interrupt Enable Bit
T1SC0.MS0B             5   Mode Select Bit B
T1SC0.MS0A             4   Mode Select Bit A
T1SC0.ELS0B            3   Edge/Level Select Bits
T1SC0.ELS0A            2   Edge/Level Select Bits
T1SC0.TOV0             1   Toggle On Overflow Bit
T1SC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
T1CH0H                0x0026     Timer 1 Channel 0 Register High
T1CH0L                0x0027     Timer 1 Channel 0 Register Low
T1SC1                 0x0028     Timer 1 Channel 1 Status and Control Register
T1SC1.CH1F             7   Channel 1 Flag Bit            
T1SC1.CH1IE            6   Channel 1 Interrupt Enable Bit
T1SC1.MS1A             4   Mode Select Bit A               
T1SC1.ELS1B            3   Edge/Level Select Bits          
T1SC1.ELS1A            2   Edge/Level Select Bits          
T1SC1.TOV1             1   Toggle On Overflow Bit          
T1SC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
T1CH1H                0x0029     Timer 1 Channel 1 Register High
T1CH1L                0x002A     Timer 1 Channel 1 Register Low
T2SC                  0x002B     Timer 2 Status and Control Register
T2SC.TOF               7   TIM Overflow Flag Bit            
T2SC.TOIE              6   TIM Overflow Interrupt Enable Bit
T2SC.TSTOP             5   TIM Stop Bit                     
T2SC.TRST              4   TIM Reset Bit                    
T2SC.PS2               2   Prescaler Select Bits 2          
T2SC.PS1               1   Prescaler Select Bits 1          
T2SC.PS0               0   Prescaler Select Bits 0          
T2CNTH                0x002C     Timer 2 Counter Register High
T2CNTL                0x002D     Timer 2 Counter Register Low
T2MODH                0x002E     Timer 2 Counter Modulo Register High
T2MODL                0x002F     Timer 2 Counter Modulo Register Low
T2SC0                 0x0030     Timer 2 Channel 0 Status and Control Register
T2SC0.CH0F             7   Channel 0 Flag Bit              
T2SC0.CH0IE            6   Channel 0 Interrupt Enable Bit  
T2SC0.MS0B             5   Mode Select Bit B               
T2SC0.MS0A             4   Mode Select Bit A               
T2SC0.ELS0B            3   Edge/Level Select Bits          
T2SC0.ELS0A            2   Edge/Level Select Bits          
T2SC0.TOV0             1   Toggle On Overflow Bit          
T2SC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
T2CH0H                0x0031     Timer 2 Channel 0 Register High
T2CH0L                0x0032     Timer 2 Channel 0 Register Low
T2SC1                 0x0033     Timer 2 Channel 1 Status and Control Register
T2SC1.CH1F             7   Channel 1 Flag Bit              
T2SC1.CH1IE            6   Channel 1 Interrupt Enable Bit  
T2SC1.MS1A             4   Mode Select Bit A               
T2SC1.ELS1B            3   Edge/Level Select Bits          
T2SC1.ELS1A            2   Edge/Level Select Bits          
T2SC1.TOV1             1   Toggle On Overflow Bit          
T2SC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
T2CH1H                0x0034     Timer 2 Channel 1 Register High
T2CH1L                0x0035     Timer 2 Channel 1 Register Low
PCTL                  0x0036     PLL Control Register
PCTL.PLLIE             7   PLL Interrupt Enable Bit
PCTL.PLLF              6   PLL Interrupt Flag Bit
PCTL.PLLON             5   PLL On Bit
PCTL.BCS               4   Base Clock Select Bit
PCTL.PRE1              3   Prescaler Program Bits 1
PCTL.PRE0              2   Prescaler Program Bits 0
PCTL.VPR1              1   VCO Power-of-Two Range Select Bits 1
PCTL.VPR0              0   VCO Power-of-Two Range Select Bits 0
PBWC                  0x0037     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               5   Acquisition Mode Bit
PMSH                  0x0038     PLL Multiplier Select High Register
PMSH.MUL11             3   Multiplier Select Bits 11
PMSH.MUL10             2   Multiplier Select Bits 10
PMSH.MUL9              1   Multiplier Select Bits 9
PMSH.MUL8              0   Multiplier Select Bits 8
PMSL                  0x0039     PLL Multiplier Select Low Register
PMSL.MUL7              7   Multiplier Select Bits 7
PMSL.MUL6              6   Multiplier Select Bits 6
PMSL.MUL5              5   Multiplier Select Bits 5
PMSL.MUL4              4   Multiplier Select Bits 4
PMSL.MUL3              3   Multiplier Select Bits 3
PMSL.MUL2              2   Multiplier Select Bits 2
PMSL.MUL1              1   Multiplier Select Bits 1
PMSL.MUL0              0   Multiplier Select Bits 0
PMRS                  0x003A     PLL VCO Range Select Register
PMRS.VRS7              7   VCO Range Select Bits 7
PMRS.VRS6              6   VCO Range Select Bits 6
PMRS.VRS5              5   VCO Range Select Bits 5
PMRS.VRS4              4   VCO Range Select Bits 4
PMRS.VRS3              3   VCO Range Select Bits 3
PMRS.VRS2              2   VCO Range Select Bits 2
PMRS.VRS1              1   VCO Range Select Bits 1
PMRS.VRS0              0   VCO Range Select Bits 0
PMDS                  0x003B     PLL Reference Divider Select Register
PMDS.RDS3              3   Reference Divider Select Bits 3
PMDS.RDS2              2   Reference Divider Select Bits 2
PMDS.RDS1              1   Reference Divider Select Bits 1
PMDS.RDS0              0   Reference Divider Select Bits 0
ADSCR                 0x003C     Analog-to-Digital Status and Control Register
ADSCR.COCO             7   Conversions Complete
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADR                   0x003D     Analog-to-Digital Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADCLK                 0x003E     Analog-to-Digital Clock Register
ADCLK.ADIV2            7   ADC Clock Prescaler Bits 2
ADCLK.ADIV1            6   ADC Clock Prescaler Bits 1
ADCLK.ADIV0            5   ADC Clock Prescaler Bits 0
ADCLK.ADICLK           4   ADC Input Clock Select Bit
UNUSED003F            0x003F     UNUSED
SBSR                  0xFE00     SIM Break Status Register
SBSR.SBSW              1   SIM Break Stop/Wait Bit
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Flag
SRSR.PIN               6   External Reset Flag
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
SUBAR                 0xFE02     SIM Upper Byte Address Register
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF6               7   Interrupt Flags 6
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF2               3   Interrupt Flags 2
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flags 14
INT2.IF13              6   Interrupt Flags 13
INT2.IF12              5   Interrupt Flags 12
INT2.IF11              4   Interrupt Flags 11
INT2.IF10              3   Interrupt Flags 10
INT2.IF9               2   Interrupt Flags 9
INT2.IF8               1   Interrupt Flags 8
INT2.IF7               0   Interrupt Flags 7
INT3                  0xFE06     Interrupt Status Register 3
INT3.IF16              1   Interrupt Flags 16
INT3.IF15              0   Interrupt Flags 15
ReservFE07            0xFE07     Reserved
FLCR                  0xFE08     FLASH Control Register
FLCR.HVEN              3   High-Voltage Enable Bit
FLCR.MASS              2   Mass Erase Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
BRKH                  0xFE09     Break Address Register High
BRKL                  0xFE0A     Break Address Register Low
BRKSCR                0xFE0B     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
LVISR                 0xFE0C     LVI Status Register
LVISR.LVIOUT           7   LVI Output Bit
FLBPR                 0xFF7E     FLASH Block Protect Register
FLBPR.BPR7             7   FLASH Block Protect Bits 7
FLBPR.BPR6             6   FLASH Block Protect Bits 6
FLBPR.BPR5             5   FLASH Block Protect Bits 5
FLBPR.BPR4             4   FLASH Block Protect Bits 4
FLBPR.BPR3             3   FLASH Block Protect Bits 3
FLBPR.BPR2             2   FLASH Block Protect Bits 2
FLBPR.BPR1             1   FLASH Block Protect Bits 1
FLBPR.BPR0             0   FLASH Block Protect Bits 0
COPCTL                0xFFFF     COP Control Register


.68HC908GR4
; MC68HC908GR8/D  http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=68HC908GR4&nodeId=01M98634
; MC68HC908GR8.pdf


; MEMORY MAP
area DATA FSR		   0x0000:0x0040
area DATA RAM		   0x0040:0x01C0
area BSS  Unimplemented	   0x01C0:0x1C00
area BSS  Reserved	   0x1C00:0x1E20
area BSS  Unimplemented	   0x1E20:0xEE00
area DATA FLASH_Memory	   0xEE00:0xFE00
area DATA FSR_1		   0xFE00:0xFE0D
area BSS  Reserved	   0xFE0D:0xFE10
area BSS  Unimplemented	   0xFE10:0xFE20
area DATA Monitor_ROM	   0xFE20:0xFF56
area BSS  Unimplemented	   0xFF56:0xFF7E
area DATA FSR_2		   0xFF7E:0xFF7F
area BSS  Unimplemented	   0xFF7F:0xFFDC
area DATA USER_VEC	   0xFFDC:0x10000


; Interrupt and reset vector assignments
interrupt __RESET       0xFFFE       Reset Vector
interrupt SWI           0xFFFC       SWI Vector
interrupt IRQ           0xFFFA       IRQ Vector
interrupt PLL           0xFFF8       PLL Vector
interrupt TIM1_CH0      0xFFF6       TIM1 Channel 0 Vector
interrupt TIM1_CH1      0xFFF4       TIM1 Channel 1 Vector
interrupt TIM1          0xFFF2       TIM1 Overflow Vector
interrupt TIM2_CH0      0xFFF0       TIM2 Channel 0 Vector
interrupt TIM2          0xFFEC       TIM2 Overflow Vector
interrupt SPI_R         0xFFEA       SPI Receive Vector
interrupt SPI_T         0xFFE8       SPI Transmit Vector
interrupt SCI_E         0xFFE6       SCI Error Vector
interrupt SCI_R         0xFFE4       SCI Receive Vector
interrupt SCI_T         0xFFE2       SCI Transmit Vector
interrupt KBRD          0xFFE0       Keyboard Vector
interrupt ADC           0xFFDE       ADC Conversion Complete Vector
interrupt TIME          0xFFDC       Timebase Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
PTC                   0x0002     Port C Data Register
PTC.PTC1               1   Port C Data Bits 1
PTC.PTC0               0   Port C Data Bits 0
PTD                   0x0003     Port D Data Register
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
DDRC                  0x0006     Data Direction Register C
DDRC.DDRC1             1   Data Direction Register C Bits 1
DDRC.DDRC0             0   Data Direction Register C Bits 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD6             6   Data Direction Register D Bits 6
DDRD.DDRD5             5   Data Direction Register D Bits 5
DDRD.DDRD4             4   Data Direction Register D Bits 4
DDRD.DDRD3             3   Data Direction Register D Bits 3
DDRD.DDRD2             2   Data Direction Register D Bits 2
DDRD.DDRD1             1   Data Direction Register D Bits 1
DDRD.DDRD0             0   Data Direction Register D Bits 0
PTE                   0x0008     Port E Data Register
PTE.PTE1               1   Port E Data Bits 1
PTE.PTE0               0   Port E Data Bits 0
UNUSED0009            0x0009     UNUSED
UNUSED000A            0x000A     UNUSED
UNUSED000B            0x000B     UNUSED
DDRE                  0x000C     Data Direction Register E
DDRE.DDRE1             1   Data Direction Register E Bits 1
DDRE.DDRE0             0   Data Direction Register E Bits 0
PTAPUE                0x000D     Port A Input Pullup Enable Register
PTAPUE.PTAPUE3         3   Port A Input Pullup Enable Bits 3
PTAPUE.PTAPUE2         2   Port A Input Pullup Enable Bits 2
PTAPUE.PTAPUE1         1   Port A Input Pullup Enable Bits 1
PTAPUE.PTAPUE0         0   Port A Input Pullup Enable Bits 0
PTCPUE                0x000E     Port C Input Pullup Enable Register
PTCPUE.PTCPUE1         1   Port C Input Pullup Enable Bits 1
PTCPUE.PTCPUE0         0   Port C Input Pullup Enable Bits 0
PTDPUE                0x000F     Port D Input Pullup Enable Register
PTDPUE.PTDPUE6         6   Port D Input Pullup Enable Bits 6
PTDPUE.PTDPUE5         5   Port D Input Pullup Enable Bits 5
PTDPUE.PTDPUE4         4   Port D Input Pullup Enable Bits 4
PTDPUE.PTDPUE3         3   Port D Input Pullup Enable Bits 3
PTDPUE.PTDPUE2         2   Port D Input Pullup Enable Bits 2
PTDPUE.PTDPUE1         1   Port D Input Pullup Enable Bits 1
PTDPUE.PTDPUE0         0   Port D Input Pullup Enable Bits 0
SPCR                  0x0010     SPI Control Register
SPCR.SPRIE             7   SPI Receiver Interrupt Enable Bit
SPCR.DMAS              6   DMA Select Bit
SPCR.SPMSTR            5   SPI Master Bit
SPCR.CPOL              4   Clock Polarity Bit
SPCR.CPHA              3   Clock Phase Bit
SPCR.SPWOM             2   SPI Wired-OR Mode Bit
SPCR.SPE               1   SPI Enable
SPCR.SPTIE             0   SPI Transmit Interrupt Enable
SPSCR                 0x0011     SPI Status and Control Register
SPSCR.SPRF             7   SPI Receiver Full Bit
SPSCR.ERRIE            6   Error Interrupt Enable Bit
SPSCR.OVRF             5   Overflow Bit
SPSCR.MODF             4   Mode Fault Bit
SPSCR.SPTE             3   SPI Transmitter Empty Bit
SPSCR.MODFEN           2   Mode Fault Enable Bit
SPSCR.SPR1             1   SPI Baud Rate Select Bits 1
SPSCR.SPR0             0   SPI Baud Rate Select Bits 0
SPDR                  0x0012     SPI Data Register
SPDR.T7_R7             7   Receive/Transmit Data Bits 7
SPDR.T6_R6             6   Receive/Transmit Data Bits 6
SPDR.T5_R5             5   Receive/Transmit Data Bits 5
SPDR.T4_R4             4   Receive/Transmit Data Bits 4
SPDR.T3_R3             3   Receive/Transmit Data Bits 3
SPDR.T2_R2             2   Receive/Transmit Data Bits 2
SPDR.T1_R1             1   Receive/Transmit Data Bits 1
SPDR.T0_R0             0   Receive/Transmit Data Bits 0
SCC1                  0x0013     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit
SCC1.ENSCI             6   Enable SCI Bit
SCC1.TXINV             5   Transmit Inversion Bit
SCC1.M                 4   Mode (Character Length) Bit
SCC1.WAKE              3   Wakeup Condition Bit
SCC1.ILTY              2   Idle Line Type Bit
SCC1.PEN               1   Parity Enable Bit
SCC1.PTY               0   Parity Bit
SCC2                  0x0014     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit
SCC2.ILIE              4   Idle Line Interrupt Enable Bit
SCC2.TE                3   Transmitter Enable Bit
SCC2.RE                2   Receiver Enable Bit
SCC2.RWU               1   Receiver Wakeup Bit
SCC2.SBK               0   Send Break Bit
SCC3                  0x0015     SCI Control Register 3
SCC3.R8                7   Received Bit 8
SCC3.T8                6   Transmitted Bit 8
SCC3.DMARE             5   DMA Receive Enable Bit
SCC3.DMATE             4   DMA Transfer Enable Bit
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit
SCS1                  0x0016     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit
SCS1.TC                6   Transmission Complete Bit
SCS1.SCRF              5   SCI Receiver Full Bit
SCS1.IDLE              4   Receiver Idle Bit
SCS1.OR                3   Receiver Overrun Bit
SCS1.NF                2   Receiver Noise Flag Bit
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit
SCS2                  0x0017     SCI Status Register 2
SCS2.BKF               1   Break Flag Bit
SCS2.RPF               0   Reception in Progress Flag Bit
SCDR                  0x0018     SCI Data Register
SCDR.T7_R7             7   Receive/Transmit Data Bits 7
SCDR.T6_R6             6   Receive/Transmit Data Bits 6
SCDR.T5_R5             5   Receive/Transmit Data Bits 5
SCDR.T4_R4             4   Receive/Transmit Data Bits 4
SCDR.T3_R3             3   Receive/Transmit Data Bits 3
SCDR.T2_R2             2   Receive/Transmit Data Bits 2
SCDR.T1_R1             1   Receive/Transmit Data Bits 1
SCDR.T0_R0             0   Receive/Transmit Data Bits 0
SCBR                  0x0019     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2
SCBR.SCR1              1   SCI Baud Rate Select Bits 1
SCBR.SCR0              0   SCI Baud Rate Select Bits 0
INTKBSCR              0x001A     Keyboard Status and Control Register
INTKBSCR.KEYF          3   Keyboard Flag Bit
INTKBSCR.ACKK          2   Keyboard Acknowledge Bit
INTKBSCR.IMASKK        1   Keyboard Interrupt Mask Bit
INTKBSCR.MODEK         0   Keyboard Triggering Sensitivity Bit
INTKBIER              0x001B     Keyboard Interrupt Enable Register
INTKBIER.KBIE3         3   Keyboard Interrupt Enable Bits 3
INTKBIER.KBIE2         2   Keyboard Interrupt Enable Bits 2
INTKBIER.KBIE1         1   Keyboard Interrupt Enable Bits 1
INTKBIER.KBIE0         0   Keyboard Interrupt Enable Bits 0
TBCR                  0x001C     Time Base Module Control Register
TBCR.TBIF              7   Timebase Interrupt Flag
TBCR.TBR2              6   Timebase Rate Selection 2
TBCR.TBR1              5   Timebase Rate Selection 1
TBCR.TBR0              4   Timebase Rate Selection 0
TBCR.TACK              3   Timebase ACKnowledge
TBCR.TBIE              2   Timebase Interrupt Enabled
TBCR.TBON              1   Timebase Enabled
INTSCR                0x001D     IRQ Status and Control Register
INTSCR.IRQF1           3   IRQ Flag Bit
INTSCR.ACK1            2   IRQ Interrupt Request Acknowledge Bit
INTSCR.IMASK1          1   IRQ Interrupt Mask Bit
INTSCR.MODE1           0   IRQ Edge/Level Select Bit
CONFIG2               0x001E     Configuration Register 2
CONFIG2.OSCSTOPENB     1   Oscillator Stop Mode Enable Bar Bit
CONFIG2.SCIBDSRC       0   SCI Baud Rate Clock Source Bit
CONFIG1               0x001F     Configuration Register 1
CONFIG1.COPRS          7   COP Rate Select Bit
CONFIG1.LVISTOP        6   LVI Enable in Stop Mode Bit
CONFIG1.LVIRSTD        5   LVI Reset Disable Bit
CONFIG1.LVIPWRD        4   LVI Power Disable Bit
CONFIG1.LVI5OR3        3   LVI 5V or 3V Operating Mode Bit
CONFIG1.SSREC          2   Short Stop Recovery Bit
CONFIG1.STOP           1   STOP Instruction Enable Bit
CONFIG1.COPD           0   COP Disable Bit
T1SC                  0x0020     Timer 1 Status and Control Register
T1SC.TOF               7   TIM Overflow Flag Bit
T1SC.TOIE              6   TIM Overflow Interrupt Enable Bit
T1SC.TSTOP             5   TIM Stop Bit
T1SC.TRST              4   TIM Reset Bit
T1SC.PS2               2   Prescaler Select Bits 2
T1SC.PS1               1   Prescaler Select Bits 1
T1SC.PS0               0   Prescaler Select Bits 0
T1CNTH                0x0021     Timer 1 Counter Register High
T1CNTL                0x0022     Timer 1 Counter Register Low
T1MODH                0x0023     Timer 1 Counter Modulo Register High
T1MODL                0x0024     Timer 1 Counter Modulo Register Low
T1SC0                 0x0025     Timer 1 Channel 0 Status and Control Register
T1SC0.CH0F             7   Channel 0 Flag Bit
T1SC0.CH0IE            6   Channel 0 Interrupt Enable Bit
T1SC0.MS0B             5   Mode Select Bit B
T1SC0.MS0A             4   Mode Select Bit A
T1SC0.ELS0B            3   Edge/Level Select Bits
T1SC0.ELS0A            2   Edge/Level Select Bits
T1SC0.TOV0             1   Toggle On Overflow Bit
T1SC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
T1CH0H                0x0026     Timer 1 Channel 0 Register High
T1CH0L                0x0027     Timer 1 Channel 0 Register Low
T1SC1                 0x0028     Timer 1 Channel 1 Status and Control Register
T1SC1.CH1F             7   Channel 0 Flag Bit            
T1SC1.CH1IE            6   Channel 0 Interrupt Enable Bit
T1SC1.MS1A             4   Mode Select Bit A               
T1SC1.ELS1B            3   Edge/Level Select Bits          
T1SC1.ELS1A            2   Edge/Level Select Bits          
T1SC1.TOV1             1   Toggle On Overflow Bit          
T1SC1.CH1MAX           0   Channel 0 Maximum Duty Cycle Bit
T1CH1H                0x0029     Timer 1 Channel 1 Register High
T1CH1L                0x002A     Timer 1 Channel 1 Register Low
T2SC                  0x002B     Timer 2 Status and Control Register
T2SC.TOF               7   TIM Overflow Flag Bit            
T2SC.TOIE              6   TIM Overflow Interrupt Enable Bit
T2SC.TSTOP             5   TIM Stop Bit                     
T2SC.TRST              4   TIM Reset Bit                    
T2SC.PS2               2   Prescaler Select Bits 2          
T2SC.PS1               1   Prescaler Select Bits 1          
T2SC.PS0               0   Prescaler Select Bits 0          
T2CNTH                0x002C     Timer 2 Counter Register High
T2CNTL                0x002D     Timer 2 Counter Register Low
T2MODH                0x002E     Timer 2 Counter Modulo Register High
T2MODL                0x002F     Timer 2 Counter Modulo Register Low
T2SC0                 0x0030     Timer 2 Channel 0 Status and Control Register
T2SC0.CH0F             7   Channel 0 Flag Bit            
T2SC0.CH0IE            6   Channel 0 Interrupt Enable Bit
T2SC0.MS0B             5   Mode Select Bit B               
T2SC0.MS0A             4   Mode Select Bit A               
T2SC0.ELS0B            3   Edge/Level Select Bits          
T2SC0.ELS0A            2   Edge/Level Select Bits          
T2SC0.TOV0             1   Toggle On Overflow Bit          
T2SC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
T2CH0H                0x0031     Timer 2 Channel 0 Register High
T2CH0L                0x0032     Timer 2 Channel 0 Register Low
UNUSED0033            0x0033     UNUSED
UNUSED0034            0x0034     UNUSED
UNUSED0035            0x0035     UNUSED
PCTL                  0x0036     PLL Control Register
PCTL.PLLIE             7   PLL Interrupt Enable Bit
PCTL.PLLF              6   PLL Interrupt Flag Bit
PCTL.PLLON             5   PLL On Bit
PCTL.BCS               4   Base Clock Select Bit
PCTL.PRE1              3   Prescaler Program Bits 1
PCTL.PRE0              2   Prescaler Program Bits 0
PCTL.VPR1              1   VCO Power-of-Two Range Select Bits 1
PCTL.VPR0              0   VCO Power-of-Two Range Select Bits 0
PBWC                  0x0037     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               5   Acquisition Mode Bit
PMSH                  0x0038     PLL Multiplier Select High Register
PMSH.MUL11             3   Multiplier Select Bits 11
PMSH.MUL10             2   Multiplier Select Bits 10
PMSH.MUL9              1   Multiplier Select Bits 9
PMSH.MUL8              0   Multiplier Select Bits 8
PMSL                  0x0039     PLL Multiplier Select Low Register
PMSL.MUL7              7   Multiplier Select Bits 7
PMSL.MUL6              6   Multiplier Select Bits 6
PMSL.MUL5              5   Multiplier Select Bits 5
PMSL.MUL4              4   Multiplier Select Bits 4
PMSL.MUL3              3   Multiplier Select Bits 3
PMSL.MUL2              2   Multiplier Select Bits 2
PMSL.MUL1              1   Multiplier Select Bits 1
PMSL.MUL0              0   Multiplier Select Bits 0
PMRS                  0x003A     PLL VCO Select Range Register
PMRS.VRS7              7   VCO Range Select Bits 7
PMRS.VRS6              6   VCO Range Select Bits 6
PMRS.VRS5              5   VCO Range Select Bits 5
PMRS.VRS4              4   VCO Range Select Bits 4
PMRS.VRS3              3   VCO Range Select Bits 3
PMRS.VRS2              2   VCO Range Select Bits 2
PMRS.VRS1              1   VCO Range Select Bits 1
PMRS.VRS0              0   VCO Range Select Bits 0
PMDS                  0x003B     PLL Reference Divider Select Register
PMDS.RDS3              3   Reference Divider Select Bits 3
PMDS.RDS2              2   Reference Divider Select Bits 2
PMDS.RDS1              1   Reference Divider Select Bits 1
PMDS.RDS0              0   Reference Divider Select Bits 0
ADSCR                 0x003C     and Control Register Analog-to-Digital Status
ADSCR.COCO             7   Conversions Complete/Interrupt DMA Select Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADR                   0x003D     Analog-to-Digital Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADCLK                 0x003E     Analog-to-Digital Input Clock Register
ADCLK.ADIV2            7   ADC Clock Prescaler Bits 2
ADCLK.ADIV1            6   ADC Clock Prescaler Bits 1
ADCLK.ADIV0            5   ADC Clock Prescaler Bits 0
ADCLK.ADICLK           4   ADC Input Clock Select Bit
UNUSED003F            0x003F     UNUSED
SBSR                  0xFE00     SIM Break Status Register
SBSR.SBSW              1   Break Wait Bit
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Flag
SRSR.PIN               6   External Reset Flag
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF6               7   Interrupt Flags 6
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF2               3   Interrupt Flags 2
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flags 14
INT2.IF13              6   Interrupt Flags 13
INT2.IF12              5   Interrupt Flags 12
INT2.IF11              4   Interrupt Flags 11
INT2.IF10              3   Interrupt Flags 10
INT2.IF9               2   Interrupt Flags 9
INT2.IF8               1   Interrupt Flags 8
INT2.IF7               0   Interrupt Flags 7
INT3                  0xFE06     Interrupt Status Register 3
INT3.IF16              1   Interrupt Flags 16
INT3.IF15              0   Interrupt Flags 15
FLTCR                 0xFE07     FLASH Test Control Register
FLCR                  0xFE08     FLASH Control Register
FLCR.HVEN              3   High-Voltage Enable Bit
FLCR.MASS              2   Mass Erase Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
BRKH                  0xFE09     Break Address Register High
BRKL                  0xFE0A     Break Address Register Low
BRKSCR                0xFE0B     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
LVISR                 0xFE0C     LVI Status Register
LVISR.LVIOUT           7   LVI Output Bit
FLBPR                 0xFF7E     FLASH Block Protect Register
FLBPR.BPR7             7   FLASH Block Protect Bits 7
FLBPR.BPR6             6   FLASH Block Protect Bits 6
FLBPR.BPR5             5   FLASH Block Protect Bits 5
FLBPR.BPR4             4   FLASH Block Protect Bits 4
FLBPR.BPR3             3   FLASH Block Protect Bits 3
FLBPR.BPR2             2   FLASH Block Protect Bits 2
FLBPR.BPR1             1   FLASH Block Protect Bits 1
FLBPR.BPR0             0   FLASH Block Protect Bits 0
ReservFFEE            0xFFEE     Reserved
ReservFFEF            0xFFEF     Reserved
COPCTL                0xFFFF     COP Control Register


.68HC908GR8
; MC68HC908GR8/D  http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=68HC908GR8&nodeId=01M98634
; MC68HC908GR8.pdf


; 8K bytes of FLASH memory, 7680 bytes of user space on the
; MC68HC908GR8 or 4K bytes of FLASH memory, 4096 bytes of user space on the
; MC68HC908GR4
; 384 bytes of random-access memory (RAM)
; 36 bytes of user-defined vectors
; 310 bytes of monitor routines in read-only memory (ROM)
; 544 bytes of integrated FLASH burn-in routines in ROM


; MEMORY MAP
area DATA FSR		   0x0000:0x0040
area DATA RAM		   0x0040:0x01C0
area BSS  Unimplemented	   0x01C0:0x1C00
area BSS  Reserved	   0x1C00:0x1E20
area BSS  Unimplemented	   0x1E20:0xE000
area DATA FLASH_Memory	   0xE000:0xFE00
area DATA FSR_1		   0xFE00:0xFE0D
area BSS  Reserved	   0xFE0D:0xFE10
area BSS  Unimplemented	   0xFE10:0xFE20
area DATA Monitor_ROM	   0xFE20:0xFF56
area BSS  Unimplemented	   0xFF56:0xFF7E
area DATA FSR_2		   0xFF7E:0xFF7F
area BSS  Unimplemented	   0xFF7F:0xFFDC
area DATA USER_VEC	   0xFFDC:0x10000


; Interrupt and reset vector assignments
interrupt __RESET       0xFFFE       Reset Vector
interrupt SWI           0xFFFC       SWI Vector
interrupt IRQ           0xFFFA       IRQ Vector
interrupt PLL           0xFFF8       PLL Vector
interrupt TIM1_CH0      0xFFF6       TIM1 Channel 0 Vector
interrupt TIM1_CH1      0xFFF4       TIM1 Channel 1 Vector
interrupt TIM1          0xFFF2       TIM1 Overflow Vector
interrupt TIM2_CH0      0xFFF0       TIM2 Channel 0 Vector
interrupt TIM2          0xFFEC       TIM2 Overflow Vector
interrupt SPI_R         0xFFEA       SPI Receive Vector
interrupt SPI_T         0xFFE8       SPI Transmit Vector
interrupt SCI_E         0xFFE6       SCI Error Vector
interrupt SCI_R         0xFFE4       SCI Receive Vector
interrupt SCI_T         0xFFE2       SCI Transmit Vector
interrupt KBRD          0xFFE0       Keyboard Vector
interrupt ADC           0xFFDE       ADC Conversion Complete Vector
interrupt TIME          0xFFDC       Timebase Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
PTC                   0x0002     Port C Data Register
PTC.PTC1               1   Port C Data Bits 1
PTC.PTC0               0   Port C Data Bits 0
PTD                   0x0003     Port D Data Register
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
DDRC                  0x0006     Data Direction Register C
DDRC.DDRC1             1   Data Direction Register C Bits 1
DDRC.DDRC0             0   Data Direction Register C Bits 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD6             6   Data Direction Register D Bits 6
DDRD.DDRD5             5   Data Direction Register D Bits 5
DDRD.DDRD4             4   Data Direction Register D Bits 4
DDRD.DDRD3             3   Data Direction Register D Bits 3
DDRD.DDRD2             2   Data Direction Register D Bits 2
DDRD.DDRD1             1   Data Direction Register D Bits 1
DDRD.DDRD0             0   Data Direction Register D Bits 0
PTE                   0x0008     Port E Data Register
PTE.PTE1               1   Port E Data Bits 1
PTE.PTE0               0   Port E Data Bits 0
UNUSED0009            0x0009     UNUSED
UNUSED000A            0x000A     UNUSED
UNUSED000B            0x000B     UNUSED
DDRE                  0x000C     Data Direction Register E
DDRE.DDRE1             1   Data Direction Register E Bits 1
DDRE.DDRE0             0   Data Direction Register E Bits 0
PTAPUE                0x000D     Port A Input Pullup Enable Register
PTAPUE.PTAPUE3         3   Port A Input Pullup Enable Bits 3
PTAPUE.PTAPUE2         2   Port A Input Pullup Enable Bits 2
PTAPUE.PTAPUE1         1   Port A Input Pullup Enable Bits 1
PTAPUE.PTAPUE0         0   Port A Input Pullup Enable Bits 0
PTCPUE                0x000E     Port C Input Pullup Enable Register
PTCPUE.PTCPUE1         1   Port C Input Pullup Enable Bits 1
PTCPUE.PTCPUE0         0   Port C Input Pullup Enable Bits 0
PTDPUE                0x000F     Port D Input Pullup Enable Register
PTDPUE.PTDPUE6         6   Port D Input Pullup Enable Bits 6
PTDPUE.PTDPUE5         5   Port D Input Pullup Enable Bits 5
PTDPUE.PTDPUE4         4   Port D Input Pullup Enable Bits 4
PTDPUE.PTDPUE3         3   Port D Input Pullup Enable Bits 3
PTDPUE.PTDPUE2         2   Port D Input Pullup Enable Bits 2
PTDPUE.PTDPUE1         1   Port D Input Pullup Enable Bits 1
PTDPUE.PTDPUE0         0   Port D Input Pullup Enable Bits 0
SPCR                  0x0010     SPI Control Register
SPCR.SPRIE             7   SPI Receiver Interrupt Enable Bit
SPCR.DMAS              6   DMA Select Bit
SPCR.SPMSTR            5   SPI Master Bit
SPCR.CPOL              4   Clock Polarity Bit
SPCR.CPHA              3   Clock Phase Bit
SPCR.SPWOM             2   SPI Wired-OR Mode Bit
SPCR.SPE               1   SPI Enable
SPCR.SPTIE             0   SPI Transmit Interrupt Enable
SPSCR                 0x0011     SPI Status and Control Register
SPSCR.SPRF             7   SPI Receiver Full Bit
SPSCR.ERRIE            6   Error Interrupt Enable Bit
SPSCR.OVRF             5   Overflow Bit
SPSCR.MODF             4   Mode Fault Bit
SPSCR.SPTE             3   SPI Transmitter Empty Bit
SPSCR.MODFEN           2   Mode Fault Enable Bit
SPSCR.SPR1             1   SPI Baud Rate Select Bits 1
SPSCR.SPR0             0   SPI Baud Rate Select Bits 0
SPDR                  0x0012     SPI Data Register
SPDR.T7_R7             7   Receive/Transmit Data Bits 7
SPDR.T6_R6             6   Receive/Transmit Data Bits 6
SPDR.T5_R5             5   Receive/Transmit Data Bits 5
SPDR.T4_R4             4   Receive/Transmit Data Bits 4
SPDR.T3_R3             3   Receive/Transmit Data Bits 3
SPDR.T2_R2             2   Receive/Transmit Data Bits 2
SPDR.T1_R1             1   Receive/Transmit Data Bits 1
SPDR.T0_R0             0   Receive/Transmit Data Bits 0
SCC1                  0x0013     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit
SCC1.ENSCI             6   Enable SCI Bit
SCC1.TXINV             5   Transmit Inversion Bit
SCC1.M                 4   Mode (Character Length) Bit
SCC1.WAKE              3   Wakeup Condition Bit
SCC1.ILTY              2   Idle Line Type Bit
SCC1.PEN               1   Parity Enable Bit
SCC1.PTY               0   Parity Bit
SCC2                  0x0014     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit
SCC2.ILIE              4   Idle Line Interrupt Enable Bit
SCC2.TE                3   Transmitter Enable Bit
SCC2.RE                2   Receiver Enable Bit
SCC2.RWU               1   Receiver Wakeup Bit
SCC2.SBK               0   Send Break Bit
SCC3                  0x0015     SCI Control Register 3
SCC3.R8                7   Received Bit 8
SCC3.T8                6   Transmitted Bit 8
SCC3.DMARE             5   DMA Receive Enable Bit
SCC3.DMATE             4   DMA Transfer Enable Bit
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit
SCS1                  0x0016     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit
SCS1.TC                6   Transmission Complete Bit
SCS1.SCRF              5   SCI Receiver Full Bit
SCS1.IDLE              4   Receiver Idle Bit
SCS1.OR                3   Receiver Overrun Bit
SCS1.NF                2   Receiver Noise Flag Bit
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit
SCS2                  0x0017     SCI Status Register 2
SCS2.BKF               1   Break Flag Bit
SCS2.RPF               0   Reception in Progress Flag Bit
SCDR                  0x0018     SCI Data Register
SCDR.T7_R7             7   Receive/Transmit Data Bits 7
SCDR.T6_R6             6   Receive/Transmit Data Bits 6
SCDR.T5_R5             5   Receive/Transmit Data Bits 5
SCDR.T4_R4             4   Receive/Transmit Data Bits 4
SCDR.T3_R3             3   Receive/Transmit Data Bits 3
SCDR.T2_R2             2   Receive/Transmit Data Bits 2
SCDR.T1_R1             1   Receive/Transmit Data Bits 1
SCDR.T0_R0             0   Receive/Transmit Data Bits 0
SCBR                  0x0019     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2
SCBR.SCR1              1   SCI Baud Rate Select Bits 1
SCBR.SCR0              0   SCI Baud Rate Select Bits 0
INTKBSCR              0x001A     Keyboard Status and Control Register
INTKBSCR.KEYF          3   Keyboard Flag Bit
INTKBSCR.ACKK          2   Keyboard Acknowledge Bit
INTKBSCR.IMASKK        1   Keyboard Interrupt Mask Bit
INTKBSCR.MODEK         0   Keyboard Triggering Sensitivity Bit
INTKBIER              0x001B     Keyboard Interrupt Enable Register
INTKBIER.KBIE3         3   Keyboard Interrupt Enable Bits 3
INTKBIER.KBIE2         2   Keyboard Interrupt Enable Bits 2
INTKBIER.KBIE1         1   Keyboard Interrupt Enable Bits 1
INTKBIER.KBIE0         0   Keyboard Interrupt Enable Bits 0
TBCR                  0x001C     Time Base Module Control Register
TBCR.TBIF              7   Timebase Interrupt Flag
TBCR.TBR2              6   Timebase Rate Selection 2
TBCR.TBR1              5   Timebase Rate Selection 1
TBCR.TBR0              4   Timebase Rate Selection 0
TBCR.TACK              3   Timebase ACKnowledge
TBCR.TBIE              2   Timebase Interrupt Enabled
TBCR.TBON              1   Timebase Enabled
INTSCR                0x001D     IRQ Status and Control Register
INTSCR.IRQF1           3   IRQ Flag Bit
INTSCR.ACK1            2   IRQ Interrupt Request Acknowledge Bit
INTSCR.IMASK1          1   IRQ Interrupt Mask Bit
INTSCR.MODE1           0   IRQ Edge/Level Select Bit
CONFIG2               0x001E     Configuration Register 2
CONFIG2.OSCSTOPENB     1   Oscillator Stop Mode Enable Bar Bit
CONFIG2.SCIBDSRC       0   SCI Baud Rate Clock Source Bit
CONFIG1               0x001F     Configuration Register 1
CONFIG1.COPRS          7   COP Rate Select Bit
CONFIG1.LVISTOP        6   LVI Enable in Stop Mode Bit
CONFIG1.LVIRSTD        5   LVI Reset Disable Bit
CONFIG1.LVIPWRD        4   LVI Power Disable Bit
CONFIG1.LVI5OR3        3   LVI 5V or 3V Operating Mode Bit
CONFIG1.SSREC          2   Short Stop Recovery Bit
CONFIG1.STOP           1   STOP Instruction Enable Bit
CONFIG1.COPD           0   COP Disable Bit
T1SC                  0x0020     Timer 1 Status and Control Register
T1SC.TOF               7   TIM Overflow Flag Bit
T1SC.TOIE              6   TIM Overflow Interrupt Enable Bit
T1SC.TSTOP             5   TIM Stop Bit
T1SC.TRST              4   TIM Reset Bit
T1SC.PS2               2   Prescaler Select Bits 2
T1SC.PS1               1   Prescaler Select Bits 1
T1SC.PS0               0   Prescaler Select Bits 0
T1CNTH                0x0021     Timer 1 Counter Register High
T1CNTL                0x0022     Timer 1 Counter Register Low
T1MODH                0x0023     Timer 1 Counter Modulo Register High
T1MODL                0x0024     Timer 1 Counter Modulo Register Low
T1SC0                 0x0025     Timer 1 Channel 0 Status and Control Register
T1SC0.CH0F             7   Channel 0 Flag Bit
T1SC0.CH0IE            6   Channel 0 Interrupt Enable Bit
T1SC0.MS0B             5   Mode Select Bit B
T1SC0.MS0A             4   Mode Select Bit A
T1SC0.ELS0B            3   Edge/Level Select Bits
T1SC0.ELS0A            2   Edge/Level Select Bits
T1SC0.TOV0             1   Toggle On Overflow Bit
T1SC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
T1CH0H                0x0026     Timer 1 Channel 0 Register High
T1CH0L                0x0027     Timer 1 Channel 0 Register Low
T1SC1                 0x0028     Timer 1 Channel 1 Status and Control Register
T1SC1.CH1F             7   Channel 0 Flag Bit            
T1SC1.CH1IE            6   Channel 0 Interrupt Enable Bit
T1SC1.MS1A             4   Mode Select Bit A               
T1SC1.ELS1B            3   Edge/Level Select Bits          
T1SC1.ELS1A            2   Edge/Level Select Bits          
T1SC1.TOV1             1   Toggle On Overflow Bit          
T1SC1.CH1MAX           0   Channel 0 Maximum Duty Cycle Bit
T1CH1H                0x0029     Timer 1 Channel 1 Register High
T1CH1L                0x002A     Timer 1 Channel 1 Register Low
T2SC                  0x002B     Timer 2 Status and Control Register
T2SC.TOF               7   TIM Overflow Flag Bit            
T2SC.TOIE              6   TIM Overflow Interrupt Enable Bit
T2SC.TSTOP             5   TIM Stop Bit                     
T2SC.TRST              4   TIM Reset Bit                    
T2SC.PS2               2   Prescaler Select Bits 2          
T2SC.PS1               1   Prescaler Select Bits 1          
T2SC.PS0               0   Prescaler Select Bits 0          
T2CNTH                0x002C     Timer 2 Counter Register High
T2CNTL                0x002D     Timer 2 Counter Register Low
T2MODH                0x002E     Timer 2 Counter Modulo Register High
T2MODL                0x002F     Timer 2 Counter Modulo Register Low
T2SC0                 0x0030     Timer 2 Channel 0 Status and Control Register
T2SC0.CH0F             7   Channel 0 Flag Bit            
T2SC0.CH0IE            6   Channel 0 Interrupt Enable Bit
T2SC0.MS0B             5   Mode Select Bit B               
T2SC0.MS0A             4   Mode Select Bit A               
T2SC0.ELS0B            3   Edge/Level Select Bits          
T2SC0.ELS0A            2   Edge/Level Select Bits          
T2SC0.TOV0             1   Toggle On Overflow Bit          
T2SC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
T2CH0H                0x0031     Timer 2 Channel 0 Register High
T2CH0L                0x0032     Timer 2 Channel 0 Register Low
UNUSED0033            0x0033     UNUSED
UNUSED0034            0x0034     UNUSED
UNUSED0035            0x0035     UNUSED
PCTL                  0x0036     PLL Control Register
PCTL.PLLIE             7   PLL Interrupt Enable Bit
PCTL.PLLF              6   PLL Interrupt Flag Bit
PCTL.PLLON             5   PLL On Bit
PCTL.BCS               4   Base Clock Select Bit
PCTL.PRE1              3   Prescaler Program Bits 1
PCTL.PRE0              2   Prescaler Program Bits 0
PCTL.VPR1              1   VCO Power-of-Two Range Select Bits 1
PCTL.VPR0              0   VCO Power-of-Two Range Select Bits 0
PBWC                  0x0037     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               5   Acquisition Mode Bit
PMSH                  0x0038     PLL Multiplier Select High Register
PMSH.MUL11             3   Multiplier Select Bits 11
PMSH.MUL10             2   Multiplier Select Bits 10
PMSH.MUL9              1   Multiplier Select Bits 9
PMSH.MUL8              0   Multiplier Select Bits 8
PMSL                  0x0039     PLL Multiplier Select Low Register
PMSL.MUL7              7   Multiplier Select Bits 7
PMSL.MUL6              6   Multiplier Select Bits 6
PMSL.MUL5              5   Multiplier Select Bits 5
PMSL.MUL4              4   Multiplier Select Bits 4
PMSL.MUL3              3   Multiplier Select Bits 3
PMSL.MUL2              2   Multiplier Select Bits 2
PMSL.MUL1              1   Multiplier Select Bits 1
PMSL.MUL0              0   Multiplier Select Bits 0
PMRS                  0x003A     PLL VCO Select Range Register
PMRS.VRS7              7   VCO Range Select Bits 7
PMRS.VRS6              6   VCO Range Select Bits 6
PMRS.VRS5              5   VCO Range Select Bits 5
PMRS.VRS4              4   VCO Range Select Bits 4
PMRS.VRS3              3   VCO Range Select Bits 3
PMRS.VRS2              2   VCO Range Select Bits 2
PMRS.VRS1              1   VCO Range Select Bits 1
PMRS.VRS0              0   VCO Range Select Bits 0
PMDS                  0x003B     PLL Reference Divider Select Register
PMDS.RDS3              3   Reference Divider Select Bits 3
PMDS.RDS2              2   Reference Divider Select Bits 2
PMDS.RDS1              1   Reference Divider Select Bits 1
PMDS.RDS0              0   Reference Divider Select Bits 0
ADSCR                 0x003C     and Control Register Analog-to-Digital Status
ADSCR.COCO             7   Conversions Complete/Interrupt DMA Select Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADR                   0x003D     Analog-to-Digital Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADCLK                 0x003E     Analog-to-Digital Input Clock Register
ADCLK.ADIV2            7   ADC Clock Prescaler Bits 2
ADCLK.ADIV1            6   ADC Clock Prescaler Bits 1
ADCLK.ADIV0            5   ADC Clock Prescaler Bits 0
ADCLK.ADICLK           4   ADC Input Clock Select Bit
UNUSED003F            0x003F     UNUSED
SBSR                  0xFE00     SIM Break Status Register
SBSR.SBSW              1   Break Wait Bit
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Flag
SRSR.PIN               6   External Reset Flag
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF6               7   Interrupt Flags 6
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF2               3   Interrupt Flags 2
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flags 14
INT2.IF13              6   Interrupt Flags 13
INT2.IF12              5   Interrupt Flags 12
INT2.IF11              4   Interrupt Flags 11
INT2.IF10              3   Interrupt Flags 10
INT2.IF9               2   Interrupt Flags 9
INT2.IF8               1   Interrupt Flags 8
INT2.IF7               0   Interrupt Flags 7
INT3                  0xFE06     Interrupt Status Register 3
INT3.IF16              1   Interrupt Flags 16
INT3.IF15              0   Interrupt Flags 15
FLTCR                 0xFE07     FLASH Test Control Register
FLCR                  0xFE08     FLASH Control Register
FLCR.HVEN              3   High-Voltage Enable Bit
FLCR.MASS              2   Mass Erase Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
BRKH                  0xFE09     Break Address Register High
BRKL                  0xFE0A     Break Address Register Low
BRKSCR                0xFE0B     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
LVISR                 0xFE0C     LVI Status Register
LVISR.LVIOUT           7   LVI Output Bit
FLBPR                 0xFF7E     FLASH Block Protect Register
FLBPR.BPR7             7   FLASH Block Protect Bits 7
FLBPR.BPR6             6   FLASH Block Protect Bits 6
FLBPR.BPR5             5   FLASH Block Protect Bits 5
FLBPR.BPR4             4   FLASH Block Protect Bits 4
FLBPR.BPR3             3   FLASH Block Protect Bits 3
FLBPR.BPR2             2   FLASH Block Protect Bits 2
FLBPR.BPR1             1   FLASH Block Protect Bits 1
FLBPR.BPR0             0   FLASH Block Protect Bits 0
ReservFFEE            0xFFEE     Reserved
ReservFFEF            0xFFEF     Reserved
COPCTL                0xFFFF     COP Control Register


.68HC908JB8
; MC68HC908JB8/D  http://
; MC68HC908JB8.pdf

; 8,192 bytes of user FLASH
; 256 bytes of RAM
; 32 bytes of user-defined vectors
; 976 bytes of monitor ROM


; MEMORY MAP
area DATA FSR		   0x0000:0x0040
area DATA RAM		   0x0040:0x0140
area BSS  Unimplemented	   0x0140:0xDC00
area DATA FLASH		   0xDC00:0xFC00    (user memory, 8192 bytes)
area DATA Monitor_ROM1	   0xFC00:0xFE00
area DATA FSR_1		   0xFE00:0xFE10
area DATA Monitor_ROM2	   0xFE10:0xFFE0
area DATA USER_VEC	   0xFFE0:0x10000   (user interrupt vectors, 32 bytes)


; Interrupt and reset vector assignments
interrupt __RESET   0xFFFE Reset Vector
interrupt SWI       0xFFFC SWI Vector
interrupt USB       0xFFFA USB Vector
interrupt IRQ1      0xFFF8 IRQ1 Vector
interrupt TIM_CH0   0xFFF6 TIM Channel 0 Vector
interrupt TIM_CH1   0xFFF4 TIM Channel 1 Vector
interrupt TIM       0xFFF2 TIM Overflow Vector 
interrupt KBRD      0xFFF0 Keyboard Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bits 7
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
PTC                   0x0002     Port C Data Register
PTC.PTC7               7   Port C Data Bits 7
PTC.PTC6               6   Port C Data Bits 6
PTC.PTC5               5   Port C Data Bits 5
PTC.PTC4               4   Port C Data Bits 4
PTC.PTC3               3   Port C Data Bits 3
PTC.PTC2               2   Port C Data Bits 2
PTC.PTC1               1   Port C Data Bits 1
PTC.PTC0               0   Port C Data Bits 0
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bits 7
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bits 7
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
DDRC                  0x0006     Data Direction Register C
DDRC.DDRC7             7   Data Direction Register C Bits 7
DDRC.DDRC6             6   Data Direction Register C Bits 6
DDRC.DDRC5             5   Data Direction Register C Bits 5
DDRC.DDRC4             4   Data Direction Register C Bits 4
DDRC.DDRC3             3   Data Direction Register C Bits 3
DDRC.DDRC2             2   Data Direction Register C Bits 2
DDRC.DDRC1             1   Data Direction Register C Bits 1
DDRC.DDRC0             0   Data Direction Register C Bits 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bits 7
DDRD.DDRD6             6   Data Direction Register D Bits 6
DDRD.DDRD5             5   Data Direction Register D Bits 5
DDRD.DDRD4             4   Data Direction Register D Bits 4
DDRD.DDRD3             3   Data Direction Register D Bits 3
DDRD.DDRD2             2   Data Direction Register D Bits 2
DDRD.DDRD1             1   Data Direction Register D Bits 1
DDRD.DDRD0             0   Data Direction Register D Bits 0
PTE                   0x0008     Port E Data Register
PTE.PTE4               4   Port E Data Bits 4
PTE.PTE3               3   Port E Data Bits 3
PTE.PTE2               2   Port E Data Bits 2
PTE.PTE1               1   Port E Data Bits 1
PTE.PTE0               0   Port E Data Bits 0
DDRE                  0x0009     Data Direction Register E
DDRE.DDRE4             4   Data Direction Register E Bits 4
DDRE.DDRE3             3   Data Direction Register E Bits 3
DDRE.DDRE2             2   Data Direction Register E Bits 2
DDRE.DDRE1             1   Data Direction Register E Bits 1
DDRE.DDRE0             0   Data Direction Register E Bits 0
TSC                   0x000A     TIM Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
UNUSED000B            0x000B     UNUSED
TCNTH                 0x000C     TIM Counter Register High
TCNTL                 0x000D     TIM Counter Register Low
TMODH                 0x000E     TIM Counter Modulo Register High
TMODL                 0x000F     TIM Counter Modulo Register Low
TSC0                  0x0010     TIM Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit
TSC0.MS0B              5   Mode Select Bit B
TSC0.MS0A              4   Mode Select Bit A
TSC0.ELS0B             3   Edge/Level Select Bits
TSC0.ELS0A             2   Edge/Level Select Bits
TSC0.TOV0              1   Toggle-On-Overflow Bit
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0011     TIM Channel 0 Register High
TCH0L                 0x0012     TIM Channel 0 Register Low
TSC1                  0x0013     TIM Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 1 Flag Bit            
TSC1.CH1IE             6   Channel 1 Interrupt Enable Bit
TSC1.MS1A              4   Mode Select Bit A               
TSC1.ELS1B             3   Edge/Level Select Bits          
TSC1.ELS1A             2   Edge/Level Select Bits          
TSC1.TOV1              1   Toggle-On-Overflow Bit          
TSC1.CH1MAX            0   Channel 1 Maximum Duty Cycle Bit
TCH1H                 0x0014     TIM Channel 1 Register High
TCH1L                 0x0015     TIM Channel 1 Register Low
KBSCR                 0x0016     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
KBIER                 0x0017     Keyboard Interrupt Enable Register
KBIER.KBIE7            7   Keyboard Interrupt Enable Bits 7
KBIER.KBIE6            6   Keyboard Interrupt Enable Bits 6
KBIER.KBIE5            5   Keyboard Interrupt Enable Bits 5
KBIER.KBIE4            4   Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Keyboard Interrupt Enable Bits 0
UIR2                  0x0018     USB Interrupt Register 2
UIR2.EOPFR             7   End-of-Packet Flag Reset
UIR2.RSTFR             6   Clear Reset Indicator Bit
UIR2.TXD2FR            5   Endpoint 2 Transmit Flag Reset
UIR2.RXD2FR            4   Endpoint 2 Receive Flag Reset
UIR2.TDX1FR            3   Endpoint 1 Transmit Flag Reset
UIR2.RESUMFR           2   Resume Flag Reset
UIR2.TXD0FR            1   Endpoint 0 Transmit Flag Reset
UIR2.RXD0FR            0   Endpoint 0 Receive Flag Reset
UCR2                  0x0019     USB Control Register 2
UCR2.T2SEQ             7   Endpoint 2 Transmit Sequence Bit
UCR2.STALL2            6   Endpoint 2 Force Stall Bit
UCR2.TX2E              5   Endpoint 2 Transmit Enable
UCR2.RX2E              4   Endpoint 2 Receive Enable
UCR2.TP2SIZ3           3   Endpoint 2 Transmit Data Packet Size 3
UCR2.TP2SIZ2           2   Endpoint 2 Transmit Data Packet Size 2
UCR2.TP2SIZ1           1   Endpoint 2 Transmit Data Packet Size 1
UCR2.TP2SIZ0           0   Endpoint 2 Transmit Data Packet Size 0
UCR3                  0x001A     USB Control Register 3
UCR3.TX1ST             7   Endpoint 0 Transmit First Flag
UCR3.TX1STR            6   Clear Endpoint 0 Transmit First Flag
UCR3.OSTALL0           5   Endpoint 0 Force STALL Bit for OUT token
UCR3.ISTALL0           4   Endpoint 0 Force STALL Bit for IN token
UCR3.PULLEN            2   Pull-up Enable
UCR3.ENABLE2           1   Endpoint 2 Enable
UCR3.ENABLE1           0   Endpoint 1 Enable
UCR4                  0x001B     USB Control Register 4
UCR4.FUSBO             2   Force USB Output
UCR4.FDP               1   Force D+
UCR4.FDM               0   Force D-
IOCR                  0x001C     IRQ Option Control Register
IOCR.PTE4IF            2   PTE4 Interrupt Flag
IOCR.PTE4IE            1   PTE4 Interrupt Enable
IOCR.IRQPD             0   IRQ Pullup Disable
POCR                  0x001D     Port Option Control Register
POCR.PTE20P            7   Pins PTE[2:0] Pullup Enable
POCR.PTDLDD            6   LED Direct Drive Control
POCR.PTDILDD           5   Infrared LED Drive Control
POCR.PTE4P             4   Pin PTE4 Pullup Enable
POCR.PTE3P             3   Pin PTE3 Pullup Enable
POCR.PCP               2   Port C Pullup Enable
POCR.PBP               1   Port B Pullup Enable
POCR.PAP               0   Port A Pullup Enable
ISCR                  0x001E     IRQ Status and Control Register
ISCR.IRQF1             3   IRQ1 Flag
ISCR.ACK1              2   IRQ1 Interrupt Request Acknowledge Bit
ISCR.IMASK1            1   IRQ1 Interrupt Mask Bit
ISCR.MODE1             0   IRQ1 Edge/Level Select Bit
CONFIG                0x001F     Configuration Register
CONFIG.URSTD           5   USB Reset Disable Bit
CONFIG.LVID            4   Low Voltage Inhibit Disable Bit
CONFIG.SSREC           3   Short Stop Recovery Bit
CONFIG.COPRS           2   COP Rate Select Bit
CONFIG.STOP            1   STOP Instruction Enable Bit
CONFIG.COPD            0   COP Disable Bit
UE0D0                 0x0020     USB Endpoint 0 Data Register 0
UE0D0.UE0R07_UE0T07    7   Endpoint 0 Receive/Transmit Data Buffer 7
UE0D0.UE0R06_UE0T06    6   Endpoint 0 Receive/Transmit Data Buffer 6
UE0D0.UE0R05_UE0T05    5   Endpoint 0 Receive/Transmit Data Buffer 5
UE0D0.UE0R04_UE0T04    4   Endpoint 0 Receive/Transmit Data Buffer 4
UE0D0.UE0R03_UE0T03    3   Endpoint 0 Receive/Transmit Data Buffer 3
UE0D0.UE0R02_UE0T02    2   Endpoint 0 Receive/Transmit Data Buffer 2
UE0D0.UE0R01_UE0T01    1   Endpoint 0 Receive/Transmit Data Buffer 1
UE0D0.UE0R00_UE0T00    0   Endpoint 0 Receive/Transmit Data Buffer 0
UE0D1                 0x0021     USB Endpoint 0 Data Register 1
UE0D1.UE0R17_UE0T17    7   Endpoint 0 Receive/Transmit Data Buffer 7
UE0D1.UE0R16_UE0T16    6   Endpoint 0 Receive/Transmit Data Buffer 6
UE0D1.UE0R15_UE0T15    5   Endpoint 0 Receive/Transmit Data Buffer 5
UE0D1.UE0R14_UE0T14    4   Endpoint 0 Receive/Transmit Data Buffer 4
UE0D1.UE0R13_UE0T13    3   Endpoint 0 Receive/Transmit Data Buffer 3
UE0D1.UE0R12_UE0T12    2   Endpoint 0 Receive/Transmit Data Buffer 2
UE0D1.UE0R11_UE0T11    1   Endpoint 0 Receive/Transmit Data Buffer 1
UE0D1.UE0R10_UE0T10    0   Endpoint 0 Receive/Transmit Data Buffer 0
UE0D2                 0x0022     USB Endpoint 0 Data Register 2
UE0D2.UE0R27_UE0T27    7   Endpoint 0 Receive/Transmit Data Buffer 7
UE0D2.UE0R26_UE0T26    6   Endpoint 0 Receive/Transmit Data Buffer 6
UE0D2.UE0R25_UE0T25    5   Endpoint 0 Receive/Transmit Data Buffer 5
UE0D2.UE0R24_UE0T24    4   Endpoint 0 Receive/Transmit Data Buffer 4
UE0D2.UE0R23_UE0T23    3   Endpoint 0 Receive/Transmit Data Buffer 3
UE0D2.UE0R22_UE0T22    2   Endpoint 0 Receive/Transmit Data Buffer 2
UE0D2.UE0R21_UE0T21    1   Endpoint 0 Receive/Transmit Data Buffer 1
UE0D2.UE0R20_UE0T20    0   Endpoint 0 Receive/Transmit Data Buffer 0
UE0D3                 0x0023     USB Endpoint 0 Data Register 3
UE0D3.UE0R37_UE0T37    7   Endpoint 0 Receive/Transmit Data Buffer 7
UE0D3.UE0R36_UE0T36    6   Endpoint 0 Receive/Transmit Data Buffer 6
UE0D3.UE0R35_UE0T35    5   Endpoint 0 Receive/Transmit Data Buffer 5
UE0D3.UE0R34_UE0T34    4   Endpoint 0 Receive/Transmit Data Buffer 4
UE0D3.UE0R33_UE0T33    3   Endpoint 0 Receive/Transmit Data Buffer 3
UE0D3.UE0R32_UE0T32    2   Endpoint 0 Receive/Transmit Data Buffer 2
UE0D3.UE0R31_UE0T31    1   Endpoint 0 Receive/Transmit Data Buffer 1
UE0D3.UE0R30_UE0T30    0   Endpoint 0 Receive/Transmit Data Buffer 0
UE0D4                 0x0024     USB Endpoint 0 Data Register 4
UE0D4.UE0R47_UE0T47    7   Endpoint 0 Receive/Transmit Data Buffer 7
UE0D4.UE0R46_UE0T46    6   Endpoint 0 Receive/Transmit Data Buffer 6
UE0D4.UE0R45_UE0T45    5   Endpoint 0 Receive/Transmit Data Buffer 5
UE0D4.UE0R44_UE0T44    4   Endpoint 0 Receive/Transmit Data Buffer 4
UE0D4.UE0R43_UE0T43    3   Endpoint 0 Receive/Transmit Data Buffer 3
UE0D4.UE0R42_UE0T42    2   Endpoint 0 Receive/Transmit Data Buffer 2
UE0D4.UE0R41_UE0T41    1   Endpoint 0 Receive/Transmit Data Buffer 1
UE0D4.UE0R40_UE0T40    0   Endpoint 0 Receive/Transmit Data Buffer 0
UE0D5                 0x0025     USB Endpoint 0 Data Register 5
UE0D5.UE0R57_UE0T57    7   Endpoint 0 Receive/Transmit Data Buffer 7
UE0D5.UE0R56_UE0T56    6   Endpoint 0 Receive/Transmit Data Buffer 6
UE0D5.UE0R55_UE0T55    5   Endpoint 0 Receive/Transmit Data Buffer 5
UE0D5.UE0R54_UE0T54    4   Endpoint 0 Receive/Transmit Data Buffer 4
UE0D5.UE0R53_UE0T53    3   Endpoint 0 Receive/Transmit Data Buffer 3
UE0D5.UE0R52_UE0T52    2   Endpoint 0 Receive/Transmit Data Buffer 2
UE0D5.UE0R51_UE0T51    1   Endpoint 0 Receive/Transmit Data Buffer 1
UE0D5.UE0R50_UE0T50    0   Endpoint 0 Receive/Transmit Data Buffer 0
UE0D6                 0x0026     USB Endpoint 0 Data Register 6
UE0D6.UE0R67_UE0T67    7   Endpoint 0 Receive/Transmit Data Buffer 7
UE0D6.UE0R66_UE0T66    6   Endpoint 0 Receive/Transmit Data Buffer 6
UE0D6.UE0R65_UE0T65    5   Endpoint 0 Receive/Transmit Data Buffer 5
UE0D6.UE0R64_UE0T64    4   Endpoint 0 Receive/Transmit Data Buffer 4
UE0D6.UE0R63_UE0T63    3   Endpoint 0 Receive/Transmit Data Buffer 3
UE0D6.UE0R62_UE0T62    2   Endpoint 0 Receive/Transmit Data Buffer 2
UE0D6.UE0R61_UE0T61    1   Endpoint 0 Receive/Transmit Data Buffer 1
UE0D6.UE0R60_UE0T60    0   Endpoint 0 Receive/Transmit Data Buffer 0
UE0D7                 0x0027     USB Endpoint 0 Data Register 7
UE0D7.UE0R77_UE0T77    7   Endpoint 0 Receive/Transmit Data Buffer 7
UE0D7.UE0R76_UE0T76    6   Endpoint 0 Receive/Transmit Data Buffer 6
UE0D7.UE0R75_UE0T75    5   Endpoint 0 Receive/Transmit Data Buffer 5
UE0D7.UE0R04_UE0T74    4   Endpoint 0 Receive/Transmit Data Buffer 4
UE0D7.UE0R73_UE0T73    3   Endpoint 0 Receive/Transmit Data Buffer 3
UE0D7.UE0R72_UE0T72    2   Endpoint 0 Receive/Transmit Data Buffer 2
UE0D7.UE0R71_UE0T71    1   Endpoint 0 Receive/Transmit Data Buffer 1
UE0D7.UE0R70_UE0T70    0   Endpoint 0 Receive/Transmit Data Buffer 0
UE1D0                 0x0028     USB Endpoint 1 Data Register 0
UE1D0.UE1T07           7   Endpoint 1 Transmit or Receive Data Buffer 7
UE1D0.UE1T06           6   Endpoint 1 Transmit or Receive Data Buffer 6
UE1D0.UE1T05           5   Endpoint 1 Transmit or Receive Data Buffer 5
UE1D0.UE1T04           4   Endpoint 1 Transmit or Receive Data Buffer 4
UE1D0.UE1T03           3   Endpoint 1 Transmit or Receive Data Buffer 3
UE1D0.UE1T02           2   Endpoint 1 Transmit or Receive Data Buffer 2
UE1D0.UE1T01           1   Endpoint 1 Transmit or Receive Data Buffer 1
UE1D0.UE1T00           0   Endpoint 1 Transmit or Receive Data Buffer 0
UE1D1                 0x0029     USB Endpoint 1 Data Register 1
UE1D1.UE1T17           7   Endpoint 1 Transmit or Receive Data Buffer 7
UE1D1.UE1T16           6   Endpoint 1 Transmit or Receive Data Buffer 6
UE1D1.UE1T15           5   Endpoint 1 Transmit or Receive Data Buffer 5
UE1D1.UE1T14           4   Endpoint 1 Transmit or Receive Data Buffer 4
UE1D1.UE1T13           3   Endpoint 1 Transmit or Receive Data Buffer 3
UE1D1.UE1T12           2   Endpoint 1 Transmit or Receive Data Buffer 2
UE1D1.UE1T11           1   Endpoint 1 Transmit or Receive Data Buffer 1
UE1D1.UE1T10           0   Endpoint 1 Transmit or Receive Data Buffer 0
UE1D2                 0x002A     USB Endpoint 1 Data Register 2
UE1D2.UE1T27           7   Endpoint 1 Transmit or Receive Data Buffer 7
UE1D2.UE1T26           6   Endpoint 1 Transmit or Receive Data Buffer 6
UE1D2.UE1T25           5   Endpoint 1 Transmit or Receive Data Buffer 5
UE1D2.UE1T24           4   Endpoint 1 Transmit or Receive Data Buffer 4
UE1D2.UE1T23           3   Endpoint 1 Transmit or Receive Data Buffer 3
UE1D2.UE1T22           2   Endpoint 1 Transmit or Receive Data Buffer 2
UE1D2.UE1T21           1   Endpoint 1 Transmit or Receive Data Buffer 1
UE1D2.UE1T20           0   Endpoint 1 Transmit or Receive Data Buffer 0
UE1D3                 0x002B     USB Endpoint 1 Data Register 3
UE1D3.UE1T37           7   Endpoint 1 Transmit or Receive Data Buffer 7
UE1D3.UE1T36           6   Endpoint 1 Transmit or Receive Data Buffer 6
UE1D3.UE1T35           5   Endpoint 1 Transmit or Receive Data Buffer 5
UE1D3.UE1T34           4   Endpoint 1 Transmit or Receive Data Buffer 4
UE1D3.UE1T33           3   Endpoint 1 Transmit or Receive Data Buffer 3
UE1D3.UE1T32           2   Endpoint 1 Transmit or Receive Data Buffer 2
UE1D3.UE1T31           1   Endpoint 1 Transmit or Receive Data Buffer 1
UE1D3.UE1T30           0   Endpoint 1 Transmit or Receive Data Buffer 0
UE1D4                 0x002C     USB Endpoint 1 Data Register 4
UE1D4.UE1T47           7   Endpoint 1 Transmit or Receive Data Buffer 7
UE1D4.UE1T46           6   Endpoint 1 Transmit or Receive Data Buffer 6
UE1D4.UE1T45           5   Endpoint 1 Transmit or Receive Data Buffer 5
UE1D4.UE1T44           4   Endpoint 1 Transmit or Receive Data Buffer 4
UE1D4.UE1T43           3   Endpoint 1 Transmit or Receive Data Buffer 3
UE1D4.UE1T42           2   Endpoint 1 Transmit or Receive Data Buffer 2
UE1D4.UE1T41           1   Endpoint 1 Transmit or Receive Data Buffer 1
UE1D4.UE1T40           0   Endpoint 1 Transmit or Receive Data Buffer 0
UE1D5                 0x002D     USB Endpoint 1 Data Register 5
UE1D5.UE1T57           7   Endpoint 1 Transmit or Receive Data Buffer 7
UE1D5.UE1T56           6   Endpoint 1 Transmit or Receive Data Buffer 6
UE1D5.UE1T55           5   Endpoint 1 Transmit or Receive Data Buffer 5
UE1D5.UE1T54           4   Endpoint 1 Transmit or Receive Data Buffer 4
UE1D5.UE1T53           3   Endpoint 1 Transmit or Receive Data Buffer 3
UE1D5.UE1T52           2   Endpoint 1 Transmit or Receive Data Buffer 2
UE1D5.UE1T51           1   Endpoint 1 Transmit or Receive Data Buffer 1
UE1D5.UE1T50           0   Endpoint 1 Transmit or Receive Data Buffer 0
UE1D6                 0x002E     USB Endpoint 1 Data Register 6
UE1D6.UE1T67           7   Endpoint 1 Transmit or Receive Data Buffer 7
UE1D6.UE1T66           6   Endpoint 1 Transmit or Receive Data Buffer 6
UE1D6.UE1T65           5   Endpoint 1 Transmit or Receive Data Buffer 5
UE1D6.UE1T64           4   Endpoint 1 Transmit or Receive Data Buffer 4
UE1D6.UE1T63           3   Endpoint 1 Transmit or Receive Data Buffer 3
UE1D6.UE1T62           2   Endpoint 1 Transmit or Receive Data Buffer 2
UE1D6.UE1T61           1   Endpoint 1 Transmit or Receive Data Buffer 1
UE1D6.UE1T60           0   Endpoint 1 Transmit or Receive Data Buffer 0
UE1D7                 0x002F     USB Endpoint 1 Data Register 7
UE1D7.UE1T77           7   Endpoint 1 Transmit or Receive Data Buffer 7
UE1D7.UE1T76           6   Endpoint 1 Transmit or Receive Data Buffer 6
UE1D7.UE1T75           5   Endpoint 1 Transmit or Receive Data Buffer 5
UE1D7.UE1T74           4   Endpoint 1 Transmit or Receive Data Buffer 4
UE1D7.UE1T73           3   Endpoint 1 Transmit or Receive Data Buffer 3
UE1D7.UE1T72           2   Endpoint 1 Transmit or Receive Data Buffer 2
UE1D7.UE1T71           1   Endpoint 1 Transmit or Receive Data Buffer 1
UE1D7.UE1T70           0   Endpoint 1 Transmit or Receive Data Buffer 0
UE2D0                 0x0030     USB Endpoint 2 Data Register 0
UE2D0.UE2R07_UE2T07    7   Endpoint 2 Receive/Transmit Data Buffer 7
UE2D0.UE2R06_UE2T06    6   Endpoint 2 Receive/Transmit Data Buffer 6
UE2D0.UE2R05_UE2T05    5   Endpoint 2 Receive/Transmit Data Buffer 5
UE2D0.UE2R04_UE2T04    4   Endpoint 2 Receive/Transmit Data Buffer 4
UE2D0.UE2R03_UE2T03    3   Endpoint 2 Receive/Transmit Data Buffer 3
UE2D0.UE2R02_UE2T02    2   Endpoint 2 Receive/Transmit Data Buffer 2
UE2D0.UE2R01_UE2T01    1   Endpoint 2 Receive/Transmit Data Buffer 1
UE2D0.UE2R00_UE2T00    0   Endpoint 2 Receive/Transmit Data Buffer 0
UE2D1                 0x0031     USB Endpoint 2 Data Register 1
UE2D1.UE2R17_UE2T17    7   Endpoint 2 Receive/Transmit Data Buffer 7
UE2D1.UE2R16_UE2T16    6   Endpoint 2 Receive/Transmit Data Buffer 6
UE2D1.UE2R15_UE2T15    5   Endpoint 2 Receive/Transmit Data Buffer 5
UE2D1.UE2R14_UE2T14    4   Endpoint 2 Receive/Transmit Data Buffer 4
UE2D1.UE2R13_UE2T13    3   Endpoint 2 Receive/Transmit Data Buffer 3
UE2D1.UE2R12_UE2T12    2   Endpoint 2 Receive/Transmit Data Buffer 2
UE2D1.UE2R11_UE2T11    1   Endpoint 2 Receive/Transmit Data Buffer 1
UE2D1.UE2R10_UE2T10    0   Endpoint 2 Receive/Transmit Data Buffer 0
UE2D2                 0x0032     USB Endpoint 2 Data Register 2
UE2D2.UE2R27_UE2T27    7   Endpoint 2 Receive/Transmit Data Buffer 7
UE2D2.UE2R26_UE2T26    6   Endpoint 2 Receive/Transmit Data Buffer 6
UE2D2.UE2R25_UE2T25    5   Endpoint 2 Receive/Transmit Data Buffer 5
UE2D2.UE2R24_UE2T24    4   Endpoint 2 Receive/Transmit Data Buffer 4
UE2D2.UE2R23_UE2T23    3   Endpoint 2 Receive/Transmit Data Buffer 3
UE2D2.UE2R22_UE2T22    2   Endpoint 2 Receive/Transmit Data Buffer 2
UE2D2.UE2R21_UE2T21    1   Endpoint 2 Receive/Transmit Data Buffer 1
UE2D2.UE2R20_UE2T20    0   Endpoint 2 Receive/Transmit Data Buffer 0
UE2D3                 0x0033     USB Endpoint 2 Data Register 3
UE2D3.UE2R37_UE2T37    7   Endpoint 2 Receive/Transmit Data Buffer 7
UE2D3.UE2R36_UE2T36    6   Endpoint 2 Receive/Transmit Data Buffer 6
UE2D3.UE2R35_UE2T35    5   Endpoint 2 Receive/Transmit Data Buffer 5
UE2D3.UE2R34_UE2T34    4   Endpoint 2 Receive/Transmit Data Buffer 4
UE2D3.UE2R33_UE2T33    3   Endpoint 2 Receive/Transmit Data Buffer 3
UE2D3.UE2R32_UE2T32    2   Endpoint 2 Receive/Transmit Data Buffer 2
UE2D3.UE2R31_UE2T31    1   Endpoint 2 Receive/Transmit Data Buffer 1
UE2D3.UE2R30_UE2T30    0   Endpoint 2 Receive/Transmit Data Buffer 0
UE2D4                 0x0034     USB Endpoint 2 Data Register 4
UE2D4.UE2R47_UE2T47    7   Endpoint 2 Receive/Transmit Data Buffer 7
UE2D4.UE2R46_UE2T46    6   Endpoint 2 Receive/Transmit Data Buffer 6
UE2D4.UE2R45_UE2T45    5   Endpoint 2 Receive/Transmit Data Buffer 5
UE2D4.UE2R44_UE2T44    4   Endpoint 2 Receive/Transmit Data Buffer 4
UE2D4.UE2R43_UE2T43    3   Endpoint 2 Receive/Transmit Data Buffer 3
UE2D4.UE2R42_UE2T42    2   Endpoint 2 Receive/Transmit Data Buffer 2
UE2D4.UE2R41_UE2T41    1   Endpoint 2 Receive/Transmit Data Buffer 1
UE2D4.UE2R40_UE2T40    0   Endpoint 2 Receive/Transmit Data Buffer 0
UE2D5                 0x0035     USB Endpoint 2 Data Register 5
UE2D5.UE2R57_UE2T57    7   Endpoint 2 Receive/Transmit Data Buffer 7
UE2D5.UE2R56_UE2T56    6   Endpoint 2 Receive/Transmit Data Buffer 6
UE2D5.UE2R55_UE2T55    5   Endpoint 2 Receive/Transmit Data Buffer 5
UE2D5.UE2R54_UE2T54    4   Endpoint 2 Receive/Transmit Data Buffer 4
UE2D5.UE2R53_UE2T53    3   Endpoint 2 Receive/Transmit Data Buffer 3
UE2D5.UE2R52_UE2T52    2   Endpoint 2 Receive/Transmit Data Buffer 2
UE2D5.UE2R51_UE2T51    1   Endpoint 2 Receive/Transmit Data Buffer 1
UE2D5.UE2R50_UE2T50    0   Endpoint 2 Receive/Transmit Data Buffer 0
UE2D6                 0x0036     USB Endpoint 2 Data Register 6
UE2D6.UE2R67_UE2T67    7   Endpoint 2 Receive/Transmit Data Buffer 7
UE2D6.UE2R66_UE2T66    6   Endpoint 2 Receive/Transmit Data Buffer 6
UE2D6.UE2R65_UE2T65    5   Endpoint 2 Receive/Transmit Data Buffer 5
UE2D6.UE2R64_UE2T64    4   Endpoint 2 Receive/Transmit Data Buffer 4
UE2D6.UE2R63_UE2T63    3   Endpoint 2 Receive/Transmit Data Buffer 3
UE2D6.UE2R62_UE2T62    2   Endpoint 2 Receive/Transmit Data Buffer 2
UE2D6.UE2R61_UE2T61    1   Endpoint 2 Receive/Transmit Data Buffer 1
UE2D6.UE2R60_UE2T60    0   Endpoint 2 Receive/Transmit Data Buffer 0
UE2D7                 0x0037     USB Endpoint 2 Data Register 7
UE2D7.UE2R77_UE2T77    7   Endpoint 2 Receive/Transmit Data Buffer 7
UE2D7.UE2R76_UE2T76    6   Endpoint 2 Receive/Transmit Data Buffer 6
UE2D7.UE2R75_UE2T75    5   Endpoint 2 Receive/Transmit Data Buffer 5
UE2D7.UE2R74_UE2T74    4   Endpoint 2 Receive/Transmit Data Buffer 4
UE2D7.UE2R73_UE2T73    3   Endpoint 2 Receive/Transmit Data Buffer 3
UE2D7.UE2R72_UE2T72    2   Endpoint 2 Receive/Transmit Data Buffer 2
UE2D7.UE2R71_UE2T71    1   Endpoint 2 Receive/Transmit Data Buffer 1
UE2D7.UE2R70_UE2T70    0   Endpoint 2 Receive/Transmit Data Buffer 0
UADDR                 0x0038     USB Address Register
UADDR.USBEN            7   USB Module Enable
UADDR.UADD6            6   USB Function Address 6
UADDR.UADD5            5   USB Function Address 5
UADDR.UADD4            4   USB Function Address 4
UADDR.UADD3            3   USB Function Address 3
UADDR.UADD2            2   USB Function Address 2
UADDR.UADD1            1   USB Function Address 1
UADDR.UADD0            0   USB Function Address 0
UIR0                  0x0039     USB Interrupt Register 0
UIR0.EOPIE             7   End-of-Packet Detect Interrupt Enable
UIR0.SUSPND            6   USB Suspend Bit
UIR0.TXD2IE            5   Endpoint 2 Transmit Interrupt Enable
UIR0.RXD2IE            4   Endpoint 2 Receive Interrupt Enable
UIR0.TXD1IE            3   Endpoint 1 Transmit Interrupt Enable
UIR0.TXD0IE            1   Endpoint 0 Transmit Interrupt Enable
UIR0.RXD0IE            0   Endpoint 0 Receive Interrupt Enable
UIR1                  0x003A     USB Interrupt Register 1
UIR1.EOPF              7   End-of-Packet Detect Flag
UIR1.RSTF              6   USB Reset Flag
UIR1.TXD2F             5   Endpoint 2 Data Transmit Flag
UIR1.RXD2F             4   Endpoint 2 Data Receive Flag
UIR1.TXD1F             3   Endpoint 1 Data Transmit Flag
UIR1.RESUMF            2   Resume Flag
UIR1.TXD0F             1   Endpoint 0 Data Transmit Flag
UIR1.RXD0F             0   Endpoint 0 Data Receive Flag
UCR0                  0x003B     USB Control Register 0
UCR0.T0SEQ             7   Endpoint 0 Transmit Sequence Bit
UCR0.TX0E              5   Endpoint 0 Transmit Enable
UCR0.RX0E              4   Endpoint 0 Receive Enable
UCR0.TP0SIZ3           3   Endpoint 0 Transmit Data Packet Size 3
UCR0.TP0SIZ2           2   Endpoint 0 Transmit Data Packet Size 2
UCR0.TP0SIZ1           1   Endpoint 0 Transmit Data Packet Size 1
UCR0.TP0SIZ0           0   Endpoint 0 Transmit Data Packet Size 0
UCR1                  0x003C     USB Control Register 1
UCR1.T1SEQ             7   Endpoint 1 Transmit Sequence Bit
UCR1.STALL1            6   Endpoint 1 Force Stall Bit
UCR1.TX1E              5   Endpoint 1 Transmit Enable
UCR1.FRESUM            4   Force Resume
UCR1.TP1SIZ3           3   Endpoint 1 Transmit Data Packet Size 3
UCR1.TP1SIZ2           2   Endpoint 1 Transmit Data Packet Size 2
UCR1.TP1SIZ1           1   Endpoint 1 Transmit Data Packet Size 1
UCR1.TP1SIZ0           0   Endpoint 1 Transmit Data Packet Size 0
USR0                  0x003D     USB Status Register 0
USR0.R0SEQ             7   Endpoint 0 Receive Sequence Bit
USR0.SETUP             6   SETUP Token Detect Bit
USR0.RP0SIZ3           3   Endpoint 0 Receive Data Packet Size 3
USR0.RP0SIZ2           2   Endpoint 0 Receive Data Packet Size 2
USR0.RP0SIZ1           1   Endpoint 0 Receive Data Packet Size 1
USR0.RP0SIZ0           0   Endpoint 0 Receive Data Packet Size 0
USR1                  0x003E     USB Status Register 1
USR1.R2SEQ             7   Endpoint 2 Receive Sequence Bit
USR1.TXACK             6   ACK Token Transmit Bit
USR1.TXNAK             5   NAK Token Transmit Bit
USR1.TXSTL             4   STALL Token Transmit Bit
USR1.RP2SIZ3           3   Endpoint 2 Receive Data Packet Size 3
USR1.RP2SIZ2           2   Endpoint 2 Receive Data Packet Size 2
USR1.RP2SIZ1           1   Endpoint 2 Receive Data Packet Size 1
USR1.RP2SIZ0           0   Endpoint 2 Receive Data Packet Size 0
UNUSED003F            0x003F     UNUSED
BSR                   0xFE00     Break Status Register
BSR.SBSW               1   SIM Break Stop/Wait
RSR                   0xFE01     Reset Status Register
RSR.POR                7   Power-On Reset Bit
RSR.PIN                6   External Reset Bit
RSR.COP                5   Computer Operating Properly Reset Bit
RSR.ILOP               4   Illegal Opcode Reset Bit
RSR.ILAD               3   Illegal Address Reset Bit (opcode fetches only)
RSR.USB                2   Universal Serial Bus Reset Bit
RSR.LVI                1   Low voltage inhibit Reset Bit
ReservFE02            0xFE02     Reserved
BFCR                  0xFE03     Break Flag Control Register
BFCR.BCFE              7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF6               7   Interrupt Flags 6
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF2               3   Interrupt Flags 2
INT1.IF1               2   Interrupt Flags 1
ReservFE05            0xFE05     Reserved
ReservFE06            0xFE06     Reserved
ReservFE07            0xFE07     Reserved
FLCR                  0xFE08     FLASH Control Register
FLCR.HVEN              3   High Voltage Enable Bit
FLCR.MASS              2   Mass Erase Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
FLBPR                 0xFE09     FLASH Block Protect Register
FLBPR.BPR7             7   FLASH Block Protect Register Bits 7
FLBPR.BPR6             6   FLASH Block Protect Register Bits 6
FLBPR.BPR5             5   FLASH Block Protect Register Bits 5
FLBPR.BPR4             4   FLASH Block Protect Register Bits 4
FLBPR.BPR3             3   FLASH Block Protect Register Bits 3
FLBPR.BPR2             2   FLASH Block Protect Register Bits 2
FLBPR.BPR1             1   FLASH Block Protect Register Bits 1
FLBPR.BPR0             0   FLASH Block Protect Register Bits 0
ReservFE0A            0xFE0A     Reserved
ReservFE0B            0xFE0B     Reserved
BRKH                  0xFE0C     Break Address High Register
BRKL                  0xFE0D     Break Address low Register
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
COPCTL                0xFFFF     COP Control Register


.68HC908JK1
; MC68HC908JL3/H  http://
; MC68HC908JL3.pdf

; 1536 bytes of user FLASH
; 128 bytes of RAM
; 48 bytes of user-defined vectors
; 960 bytes of Monitor ROM


; MEMORY MAP
area DATA FSR		   0x0000:0x0040
area BSS  RESERVED	   0x0040:0x0080
area DATA RAM		   0x0080:0x0100
area BSS  UNIMPLEMENTED	   0x0100:0xF600
area DATA FLASH_MEMORY	   0xF600:0xFC00
area DATA MONITOR_ROM1	   0xFC00:0xFE00
area DATA FSR_1		   0xFE00:0xFE10
area DATA MONITOR_ROM2	   0xFE10:0xFFD0
area DATA USER_VEC	   0xFFD0:0x10000


; Interrupt and reset vector assignments
interrupt __RESET   0xFFFE       Reset Vector
interrupt SWI       0xFFFC       SWI Vector
interrupt IRQ       0xFFFA       IRQ Vector
interrupt TIM_CH0   0xFFF6       TIM Channel 0 Vector
interrupt TIM_CH1   0xFFF4       TIM Channel 1 Vector
interrupt TIM       0xFFF2       TIM Overflow Vector
interrupt KBRD      0xFFE0       Keyboard Vector
interrupt ADC       0xFFDE       ADC Conversion Complete Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
UNUSED0002            0x0002     UNUSED
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bits 7
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
UNUSED0006            0x0006     UNUSED
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bits 7
DDRD.DDRD6             6   Data Direction Register D Bits 6
DDRD.DDRD5             5   Data Direction Register D Bits 5
DDRD.DDRD4             4   Data Direction Register D Bits 4
DDRD.DDRD3             3   Data Direction Register D Bits 3
DDRD.DDRD2             2   Data Direction Register D Bits 2
DDRD.DDRD1             1   Data Direction Register D Bits 1
DDRD.DDRD0             0   Data Direction Register D Bits 0
UNUSED0008            0x0008     UNUSED
UNUSED0009            0x0009     UNUSED
PDCR                  0x000A     Port D Control Register
PDCR.SLOWD7            3   Slow Edge Enable 7
PDCR.SLOWD6            2   Slow Edge Enable 6
PDCR.PTDPU7            1   Pull-up Enable 7
PDCR.PTDPU6            0   Pull-up Enable 6
UNUSED000B            0x000B     UNUSED
UNUSED000C            0x000C     UNUSED
PTAPUE                0x000D     Port A Input Pull-up Enable Register
PTAPUE.PTA6EN          7   Enable PTA6 on OSC2
PTAPUE.PTAPUE6         6   Port A Input Pull-up Enable bits 6
PTAPUE.PTAPUE5         5   Port A Input Pull-up Enable bits 5
PTAPUE.PTAPUE4         4   Port A Input Pull-up Enable bits 4
PTAPUE.PTAPUE3         3   Port A Input Pull-up Enable bits 3
PTAPUE.PTAPUE2         2   Port A Input Pull-up Enable bits 2
PTAPUE.PTAPUE1         1   Port A Input Pull-up Enable bits 1
PTAPUE.PTAPUE0         0   Port A Input Pull-up Enable bits 0
UNUSED000E            0x000E     UNUSED
UNUSED000F            0x000F     UNUSED
UNUSED0010            0x0010     UNUSED
UNUSED0011            0x0011     UNUSED
UNUSED0012            0x0012     UNUSED
UNUSED0013            0x0013     UNUSED
UNUSED0014            0x0014     UNUSED
UNUSED0015            0x0015     UNUSED
UNUSED0016            0x0016     UNUSED
UNUSED0017            0x0017     UNUSED
UNUSED0018            0x0018     UNUSED
UNUSED0019            0x0019     UNUSED
KBSCR                 0x001A     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
KBIER                 0x001B     Keyboard Interrupt Enable Register
KBIER.KBIE6            6   Port-A Keyboard Interrupt Enable Bits 6
KBIER.KBIE5            5   Port-A Keyboard Interrupt Enable Bits 5
KBIER.KBIE4            4   Port-A Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Port-A Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Port-A Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Port-A Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Port-A Keyboard Interrupt Enable Bits 0
UNUSED001C            0x001C     UNUSED
INTSCR                0x001D     IRQ Status and Control Register
INTSCR.IRQF1           3   IRQ1 Flag
INTSCR.ACK1            2   IRQ1 Interrupt Request Acknowledge Bit
INTSCR.IMASK1          1   IRQ1 Interrupt Mask Bit
INTSCR.MODE1           0   IRQ1 Edge/Level Select Bit
CONFIG2               0x001E     Configuration Register 2
CONFIG2.IRQPUD         7   IRQ1 Pin Pull-up control bit
CONFIG2.LVIT1          4   Low Voltage Inhibit trip voltage selection bits 1
CONFIG2.LVIT0          3   Low Voltage Inhibit trip voltage selection bits 0
CONFIG1               0x001F     Configuration Register 1
CONFIG1.COPRS          7   COP reset period selection bit
CONFIG1.LVID           4   Low Voltage Inhibit Disable Bit
CONFIG1.SSREC          2   Short Stop Recovery Bit
CONFIG1.STOP           1   enables the STOP instruction
CONFIG1.COPD           0   COP Disable Bit
TSC                   0x0020     TIM Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
TCNTH                 0x0021     TIM Counter Register High
TCNTL                 0x0022     TIM Counter Register Low
TMODH                 0x0023     TIM Counter Modulo Register High
TMODL                 0x0024     TIM Counter Modulo Register Low
TSC0                  0x0025     TIM Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit
TSC0.MS0B              5   Mode Select Bit B
TSC0.MS0A              4   Mode Select Bit A
TSC0.ELS0B             3   Edge/Level Select Bits
TSC0.ELS0A             2   Edge/Level Select Bits
TSC0.TOV0              1   Toggle-On-Overflow Bit
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0026     TIM Channel 0 Register High
TCH0L                 0x0027     TIM Channel 0 Register Low
TSC1                  0x0028     TIM Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 1 Flag Bit            
TSC1.CH1IE             6   Channel 1 Interrupt Enable Bit
TSC1.MS1A              4   Mode Select Bit A               
TSC1.ELS1B             3   Edge/Level Select Bits          
TSC1.ELS1A             2   Edge/Level Select Bits          
TSC1.TOV1              1   Toggle-On-Overflow Bit          
TSC1.CH1MAX            0   Channel 1 Maximum Duty Cycle Bit
TCH1H                 0x0029     TIM Channel 1 Register High
TCH1L                 0x002A     TIM Channel 1 Register Low
UNUSED002B            0x002B     UNUSED
UNUSED002C            0x002C     UNUSED
UNUSED002D            0x002D     UNUSED
UNUSED002E            0x002E     UNUSED
UNUSED002F            0x002F     UNUSED
UNUSED0030            0x0030     UNUSED
UNUSED0031            0x0031     UNUSED
UNUSED0032            0x0032     UNUSED
UNUSED0033            0x0033     UNUSED
UNUSED0034            0x0034     UNUSED
UNUSED0035            0x0035     UNUSED
UNUSED0036            0x0036     UNUSED
UNUSED0037            0x0037     UNUSED
UNUSED0038            0x0038     UNUSED
UNUSED0039            0x0039     UNUSED
UNUSED003A            0x003A     UNUSED
UNUSED003B            0x003B     UNUSED
ADSCR                 0x003C     ADC Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.CH4              4   ADC Channel Select Bits 4
ADSCR.CH3              3   ADC Channel Select Bits 3
ADSCR.CH2              2   ADC Channel Select Bits 2
ADSCR.CH1              1   ADC Channel Select Bits 1
ADSCR.CH0              0   ADC Channel Select Bits 0
ADR                   0x003D     ADC Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADICLK                0x003E     ADC Input Clock Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bits 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bits 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bits 0
UNUSED003F            0x003F     UNUSED
BSR                   0xFE00     Break Status Register
BSR.SBSW               1   SIM Break Stop/Wait
RSR                   0xFE01     Reset Status Register
RSR.POR                7   Power-On Reset Bit
RSR.PIN                6   External Reset Bit
RSR.COP                5   Computer Operating Properly Reset Bit
RSR.ILOP               4   Illegal Opcode Reset Bit
RSR.ILAD               3   Illegal Address Reset Bit (opcode fetches only)
RSR.MODRST             2   Monitor Mode Entry Module Reset bit
RSR.LVI                1   Low Voltage Inhibit Reset bit
ReservFE02            0xFE02     Reserved
BFCR                  0xFE03     Break Flag Control Register
BFCR.BCFE              7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flags 14
INT3                  0xFE06     Interrupt Status Register 3
INT3.IF15              0   Interrupt Flags 15
ReservFE07            0xFE07     Reserved
FLCR                  0xFE08     FLASH Control Register
FLCR.HVEN              3   High Voltage Enable Bit
FLCR.MASS              2   Mass Erase Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
FLBPR                 0xFE09     FLASH Block Protect Register
FLBPR.BPR7             7   FLASH Protection Register Bits 7
FLBPR.BPR6             6   FLASH Protection Register Bits 6
FLBPR.BPR5             5   FLASH Protection Register Bits 5
FLBPR.BPR4             4   FLASH Protection Register Bits 4
FLBPR.BPR3             3   FLASH Protection Register Bits 3
FLBPR.BPR2             2   FLASH Protection Register Bits 2
FLBPR.BPR1             1   FLASH Protection Register Bits 1
ReservFE0A            0xFE0A     Reserved
ReservFE0B            0xFE0B     Reserved
BRKH                  0xFE0C     Break Address High Register
BRKL                  0xFE0D     Break Address low Register
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
UNUSEDFFE2            0xFFE2     UNUSED
UNUSEDFFE3            0xFFE3     UNUSED
UNUSEDFFE4            0xFFE4     UNUSED
UNUSEDFFE5            0xFFE5     UNUSED
UNUSEDFFE6            0xFFE6     UNUSED
UNUSEDFFE7            0xFFE7     UNUSED
UNUSEDFFE8            0xFFE8     UNUSED
UNUSEDFFE9            0xFFE9     UNUSED
UNUSEDFFEA            0xFFEA     UNUSED
UNUSEDFFEB            0xFFEB     UNUSED
UNUSEDFFEC            0xFFEC     UNUSED
UNUSEDFFED            0xFFED     UNUSED
UNUSEDFFEE            0xFFEE     UNUSED
UNUSEDFFEF            0xFFEF     UNUSED
UNUSEDFFF0            0xFFF0     UNUSED
UNUSEDFFF1            0xFFF1     UNUSED
UNUSEDFFF8            0xFFF8     UNUSED
UNUSEDFFF9            0xFFF9     UNUSED
COPCTL                0xFFFF     COP Control Register


.68HC908JK3
; MC68HC908JL3/H  http://
; MC68HC908JL3.pdf

; 4096 bytes of user FLASH for MC68H(R)C908JL3/JK3
; 128 bytes of RAM
; 48 bytes of user-defined vectors
; 960 bytes of Monitor ROM


; MEMORY MAP
area DATA FSR		   0x0000:0x0040
area BSS  RESERVED	   0x0040:0x0080
area DATA RAM		   0x0080:0x0100
area BSS  UNIMPLEMENTED	   0x0100:0xEC00
area DATA FLASH_MEMORY	   0xEC00:0xFC00
area DATA MONITOR_ROM1	   0xFC00:0xFE00
area DATA FSR_1		   0xFE00:0xFE10
area DATA MONITOR_ROM2	   0xFE10:0xFFD0
area DATA USER_VEC	   0xFFD0:0x10000


; Interrupt and reset vector assignments
interrupt __RESET   0xFFFE       Reset Vector
interrupt SWI       0xFFFC       SWI Vector
interrupt IRQ       0xFFFA       IRQ Vector
interrupt TIM_CH0   0xFFF6       TIM Channel 0 Vector
interrupt TIM_CH1   0xFFF4       TIM Channel 1 Vector
interrupt TIM       0xFFF2       TIM Overflow Vector
interrupt KBRD      0xFFE0       Keyboard Vector
interrupt ADC       0xFFDE       ADC Conversion Complete Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
UNUSED0002            0x0002     UNUSED
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bits 7
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
UNUSED0006            0x0006     UNUSED
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bits 7
DDRD.DDRD6             6   Data Direction Register D Bits 6
DDRD.DDRD5             5   Data Direction Register D Bits 5
DDRD.DDRD4             4   Data Direction Register D Bits 4
DDRD.DDRD3             3   Data Direction Register D Bits 3
DDRD.DDRD2             2   Data Direction Register D Bits 2
DDRD.DDRD1             1   Data Direction Register D Bits 1
DDRD.DDRD0             0   Data Direction Register D Bits 0
UNUSED0008            0x0008     UNUSED
UNUSED0009            0x0009     UNUSED
PDCR                  0x000A     Port D Control Register
PDCR.SLOWD7            3   Slow Edge Enable 7
PDCR.SLOWD6            2   Slow Edge Enable 6
PDCR.PTDPU7            1   Pull-up Enable 7
PDCR.PTDPU6            0   Pull-up Enable 6
UNUSED000B            0x000B     UNUSED
UNUSED000C            0x000C     UNUSED
PTAPUE                0x000D     Port A Input Pull-up Enable Register
PTAPUE.PTA6EN          7   Enable PTA6 on OSC2
PTAPUE.PTAPUE6         6   Port A Input Pull-up Enable bits 6
PTAPUE.PTAPUE5         5   Port A Input Pull-up Enable bits 5
PTAPUE.PTAPUE4         4   Port A Input Pull-up Enable bits 4
PTAPUE.PTAPUE3         3   Port A Input Pull-up Enable bits 3
PTAPUE.PTAPUE2         2   Port A Input Pull-up Enable bits 2
PTAPUE.PTAPUE1         1   Port A Input Pull-up Enable bits 1
PTAPUE.PTAPUE0         0   Port A Input Pull-up Enable bits 0
UNUSED000E            0x000E     UNUSED
UNUSED000F            0x000F     UNUSED
UNUSED0010            0x0010     UNUSED
UNUSED0011            0x0011     UNUSED
UNUSED0012            0x0012     UNUSED
UNUSED0013            0x0013     UNUSED
UNUSED0014            0x0014     UNUSED
UNUSED0015            0x0015     UNUSED
UNUSED0016            0x0016     UNUSED
UNUSED0017            0x0017     UNUSED
UNUSED0018            0x0018     UNUSED
UNUSED0019            0x0019     UNUSED
KBSCR                 0x001A     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
KBIER                 0x001B     Keyboard Interrupt Enable Register
KBIER.KBIE6            6   Port-A Keyboard Interrupt Enable Bits 6
KBIER.KBIE5            5   Port-A Keyboard Interrupt Enable Bits 5
KBIER.KBIE4            4   Port-A Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Port-A Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Port-A Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Port-A Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Port-A Keyboard Interrupt Enable Bits 0
UNUSED001C            0x001C     UNUSED
INTSCR                0x001D     IRQ Status and Control Register
INTSCR.IRQF1           3   IRQ1 Flag
INTSCR.ACK1            2   IRQ1 Interrupt Request Acknowledge Bit
INTSCR.IMASK1          1   IRQ1 Interrupt Mask Bit
INTSCR.MODE1           0   IRQ1 Edge/Level Select Bit
CONFIG2               0x001E     Configuration Register 2
CONFIG2.IRQPUD         7   IRQ1 Pin Pull-up control bit
CONFIG2.LVIT1          4   Low Voltage Inhibit trip voltage selection bits 1
CONFIG2.LVIT0          3   Low Voltage Inhibit trip voltage selection bits 0
CONFIG1               0x001F     Configuration Register 1
CONFIG1.COPRS          7   COP reset period selection bit
CONFIG1.LVID           4   Low Voltage Inhibit Disable Bit
CONFIG1.SSREC          2   Short Stop Recovery Bit
CONFIG1.STOP           1   enables the STOP instruction
CONFIG1.COPD           0   COP Disable Bit
TSC                   0x0020     TIM Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
TCNTH                 0x0021     TIM Counter Register High
TCNTL                 0x0022     TIM Counter Register Low
TMODH                 0x0023     TIM Counter Modulo Register High
TMODL                 0x0024     TIM Counter Modulo Register Low
TSC0                  0x0025     TIM Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit
TSC0.MS0B              5   Mode Select Bit B
TSC0.MS0A              4   Mode Select Bit A
TSC0.ELS0B             3   Edge/Level Select Bits
TSC0.ELS0A             2   Edge/Level Select Bits
TSC0.TOV0              1   Toggle-On-Overflow Bit
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0026     TIM Channel 0 Register High
TCH0L                 0x0027     TIM Channel 0 Register Low
TSC1                  0x0028     TIM Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 1 Flag Bit            
TSC1.CH1IE             6   Channel 1 Interrupt Enable Bit
TSC1.MS1A              4   Mode Select Bit A               
TSC1.ELS1B             3   Edge/Level Select Bits          
TSC1.ELS1A             2   Edge/Level Select Bits          
TSC1.TOV1              1   Toggle-On-Overflow Bit          
TSC1.CH1MAX            0   Channel 1 Maximum Duty Cycle Bit
TCH1H                 0x0029     TIM Channel 1 Register High
TCH1L                 0x002A     TIM Channel 1 Register Low
UNUSED002B            0x002B     UNUSED
UNUSED002C            0x002C     UNUSED
UNUSED002D            0x002D     UNUSED
UNUSED002E            0x002E     UNUSED
UNUSED002F            0x002F     UNUSED
UNUSED0030            0x0030     UNUSED
UNUSED0031            0x0031     UNUSED
UNUSED0032            0x0032     UNUSED
UNUSED0033            0x0033     UNUSED
UNUSED0034            0x0034     UNUSED
UNUSED0035            0x0035     UNUSED
UNUSED0036            0x0036     UNUSED
UNUSED0037            0x0037     UNUSED
UNUSED0038            0x0038     UNUSED
UNUSED0039            0x0039     UNUSED
UNUSED003A            0x003A     UNUSED
UNUSED003B            0x003B     UNUSED
ADSCR                 0x003C     ADC Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.CH4              4   ADC Channel Select Bits 4
ADSCR.CH3              3   ADC Channel Select Bits 3
ADSCR.CH2              2   ADC Channel Select Bits 2
ADSCR.CH1              1   ADC Channel Select Bits 1
ADSCR.CH0              0   ADC Channel Select Bits 0
ADR                   0x003D     ADC Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADICLK                0x003E     ADC Input Clock Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bits 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bits 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bits 0
UNUSED003F            0x003F     UNUSED
BSR                   0xFE00     Break Status Register
BSR.SBSW               1   SIM Break Stop/Wait
RSR                   0xFE01     Reset Status Register
RSR.POR                7   Power-On Reset Bit
RSR.PIN                6   External Reset Bit
RSR.COP                5   Computer Operating Properly Reset Bit
RSR.ILOP               4   Illegal Opcode Reset Bit
RSR.ILAD               3   Illegal Address Reset Bit (opcode fetches only)
RSR.MODRST             2   Monitor Mode Entry Module Reset bit
RSR.LVI                1   Low Voltage Inhibit Reset bit
ReservFE02            0xFE02     Reserved
BFCR                  0xFE03     Break Flag Control Register
BFCR.BCFE              7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flags 14
INT3                  0xFE06     Interrupt Status Register 3
INT3.IF15              0   Interrupt Flags 15
ReservFE07            0xFE07     Reserved
FLCR                  0xFE08     FLASH Control Register
FLCR.HVEN              3   High Voltage Enable Bit
FLCR.MASS              2   Mass Erase Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
FLBPR                 0xFE09     FLASH Block Protect Register
FLBPR.BPR7             7   FLASH Protection Register Bits 7
FLBPR.BPR6             6   FLASH Protection Register Bits 6
FLBPR.BPR5             5   FLASH Protection Register Bits 5
FLBPR.BPR4             4   FLASH Protection Register Bits 4
FLBPR.BPR3             3   FLASH Protection Register Bits 3
FLBPR.BPR2             2   FLASH Protection Register Bits 2
FLBPR.BPR1             1   FLASH Protection Register Bits 1
ReservFE0A            0xFE0A     Reserved
ReservFE0B            0xFE0B     Reserved
BRKH                  0xFE0C     Break Address High Register
BRKL                  0xFE0D     Break Address low Register
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
UNUSEDFFE2            0xFFE2     UNUSED
UNUSEDFFE3            0xFFE3     UNUSED
UNUSEDFFE4            0xFFE4     UNUSED
UNUSEDFFE5            0xFFE5     UNUSED
UNUSEDFFE6            0xFFE6     UNUSED
UNUSEDFFE7            0xFFE7     UNUSED
UNUSEDFFE8            0xFFE8     UNUSED
UNUSEDFFE9            0xFFE9     UNUSED
UNUSEDFFEA            0xFFEA     UNUSED
UNUSEDFFEB            0xFFEB     UNUSED
UNUSEDFFEC            0xFFEC     UNUSED
UNUSEDFFED            0xFFED     UNUSED
UNUSEDFFEE            0xFFEE     UNUSED
UNUSEDFFEF            0xFFEF     UNUSED
UNUSEDFFF0            0xFFF0     UNUSED
UNUSEDFFF1            0xFFF1     UNUSED
UNUSEDFFF8            0xFFF8     UNUSED
UNUSEDFFF9            0xFFF9     UNUSED
COPCTL                0xFFFF     COP Control Register


.68HC908JL3
;MC68HC908JL3/H  http://

; 4096 bytes of user FLASH for MC68H(R)C908JL3/JK3
; 128 bytes of RAM
; 48 bytes of user-defined vectors
; 960 bytes of Monitor ROM


; MEMORY MAP
area DATA FSR		   0x0000:0x0040
area BSS  RESERVED	   0x0040:0x0080
area DATA RAM		   0x0080:0x0100
area BSS  UNIMPLEMENTED	   0x0100:0xEC00
area DATA FLASH_MEMORY	   0xEC00:0xFC00
area DATA MONITOR_ROM1	   0xFC00:0xFE00
area DATA FSR_1		   0xFE00:0xFE10
area DATA MONITOR_ROM2	   0xFE10:0xFFD0
area DATA USER_VEC	   0xFFD0:0x10000


; Interrupt and reset vector assignments
interrupt __RESET   0xFFFE       Reset Vector
interrupt SWI       0xFFFC       SWI Vector
interrupt IRQ       0xFFFA       IRQ Vector
interrupt TIM_CH0   0xFFF6       TIM Channel 0 Vector
interrupt TIM_CH1   0xFFF4       TIM Channel 1 Vector
interrupt TIM       0xFFF2       TIM Overflow Vector
interrupt KBRD      0xFFE0       Keyboard Vector
interrupt ADC       0xFFDE       ADC Conversion Complete Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
UNUSED0002            0x0002     UNUSED
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bits 7
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
UNUSED0006            0x0006     UNUSED
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bits 7
DDRD.DDRD6             6   Data Direction Register D Bits 6
DDRD.DDRD5             5   Data Direction Register D Bits 5
DDRD.DDRD4             4   Data Direction Register D Bits 4
DDRD.DDRD3             3   Data Direction Register D Bits 3
DDRD.DDRD2             2   Data Direction Register D Bits 2
DDRD.DDRD1             1   Data Direction Register D Bits 1
DDRD.DDRD0             0   Data Direction Register D Bits 0
UNUSED0008            0x0008     UNUSED
UNUSED0009            0x0009     UNUSED
PDCR                  0x000A     Port D Control Register
PDCR.SLOWD7            3   Slow Edge Enable 7
PDCR.SLOWD6            2   Slow Edge Enable 6
PDCR.PTDPU7            1   Pull-up Enable 7
PDCR.PTDPU6            0   Pull-up Enable 6
UNUSED000B            0x000B     UNUSED
UNUSED000C            0x000C     UNUSED
PTAPUE                0x000D     Port A Input Pull-up Enable Register
PTAPUE.PTA6EN          7   Enable PTA6 on OSC2
PTAPUE.PTAPUE6         6   Port A Input Pull-up Enable bits 6
PTAPUE.PTAPUE5         5   Port A Input Pull-up Enable bits 5
PTAPUE.PTAPUE4         4   Port A Input Pull-up Enable bits 4
PTAPUE.PTAPUE3         3   Port A Input Pull-up Enable bits 3
PTAPUE.PTAPUE2         2   Port A Input Pull-up Enable bits 2
PTAPUE.PTAPUE1         1   Port A Input Pull-up Enable bits 1
PTAPUE.PTAPUE0         0   Port A Input Pull-up Enable bits 0
UNUSED000E            0x000E     UNUSED
UNUSED000F            0x000F     UNUSED
UNUSED0010            0x0010     UNUSED
UNUSED0011            0x0011     UNUSED
UNUSED0012            0x0012     UNUSED
UNUSED0013            0x0013     UNUSED
UNUSED0014            0x0014     UNUSED
UNUSED0015            0x0015     UNUSED
UNUSED0016            0x0016     UNUSED
UNUSED0017            0x0017     UNUSED
UNUSED0018            0x0018     UNUSED
UNUSED0019            0x0019     UNUSED
KBSCR                 0x001A     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
KBIER                 0x001B     Keyboard Interrupt Enable Register
KBIER.KBIE6            6   Port-A Keyboard Interrupt Enable Bits 6
KBIER.KBIE5            5   Port-A Keyboard Interrupt Enable Bits 5
KBIER.KBIE4            4   Port-A Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Port-A Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Port-A Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Port-A Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Port-A Keyboard Interrupt Enable Bits 0
UNUSED001C            0x001C     UNUSED
INTSCR                0x001D     IRQ Status and Control Register
INTSCR.IRQF1           3   IRQ1 Flag
INTSCR.ACK1            2   IRQ1 Interrupt Request Acknowledge Bit
INTSCR.IMASK1          1   IRQ1 Interrupt Mask Bit
INTSCR.MODE1           0   IRQ1 Edge/Level Select Bit
CONFIG2               0x001E     Configuration Register 2
CONFIG2.IRQPUD         7   IRQ1 Pin Pull-up control bit
CONFIG2.LVIT1          4   Low Voltage Inhibit trip voltage selection bits 1
CONFIG2.LVIT0          3   Low Voltage Inhibit trip voltage selection bits 0
CONFIG1               0x001F     Configuration Register 1
CONFIG1.COPRS          7   COP reset period selection bit
CONFIG1.LVID           4   Low Voltage Inhibit Disable Bit
CONFIG1.SSREC          2   Short Stop Recovery Bit
CONFIG1.STOP           1   enables the STOP instruction
CONFIG1.COPD           0   COP Disable Bit
TSC                   0x0020     TIM Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
TCNTH                 0x0021     TIM Counter Register High
TCNTL                 0x0022     TIM Counter Register Low
TMODH                 0x0023     TIM Counter Modulo Register High
TMODL                 0x0024     TIM Counter Modulo Register Low
TSC0                  0x0025     TIM Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit
TSC0.MS0B              5   Mode Select Bit B
TSC0.MS0A              4   Mode Select Bit A
TSC0.ELS0B             3   Edge/Level Select Bits
TSC0.ELS0A             2   Edge/Level Select Bits
TSC0.TOV0              1   Toggle-On-Overflow Bit
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0026     TIM Channel 0 Register High
TCH0L                 0x0027     TIM Channel 0 Register Low
TSC1                  0x0028     TIM Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 1 Flag Bit            
TSC1.CH1IE             6   Channel 1 Interrupt Enable Bit
TSC1.MS1A              4   Mode Select Bit A               
TSC1.ELS1B             3   Edge/Level Select Bits          
TSC1.ELS1A             2   Edge/Level Select Bits          
TSC1.TOV1              1   Toggle-On-Overflow Bit          
TSC1.CH1MAX            0   Channel 1 Maximum Duty Cycle Bit
TCH1H                 0x0029     TIM Channel 1 Register High
TCH1L                 0x002A     TIM Channel 1 Register Low
UNUSED002B            0x002B     UNUSED
UNUSED002C            0x002C     UNUSED
UNUSED002D            0x002D     UNUSED
UNUSED002E            0x002E     UNUSED
UNUSED002F            0x002F     UNUSED
UNUSED0030            0x0030     UNUSED
UNUSED0031            0x0031     UNUSED
UNUSED0032            0x0032     UNUSED
UNUSED0033            0x0033     UNUSED
UNUSED0034            0x0034     UNUSED
UNUSED0035            0x0035     UNUSED
UNUSED0036            0x0036     UNUSED
UNUSED0037            0x0037     UNUSED
UNUSED0038            0x0038     UNUSED
UNUSED0039            0x0039     UNUSED
UNUSED003A            0x003A     UNUSED
UNUSED003B            0x003B     UNUSED
ADSCR                 0x003C     ADC Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.CH4              4   ADC Channel Select Bits 4
ADSCR.CH3              3   ADC Channel Select Bits 3
ADSCR.CH2              2   ADC Channel Select Bits 2
ADSCR.CH1              1   ADC Channel Select Bits 1
ADSCR.CH0              0   ADC Channel Select Bits 0
ADR                   0x003D     ADC Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADICLK                0x003E     ADC Input Clock Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bit 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bit 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bit 0
UNUSED003F            0x003F     UNUSED
BSR                   0xFE00     Break Status Register
BSR.SBSW               1   SIM Break Stop/Wait
RSR                   0xFE01     Reset Status Register
RSR.POR                7   Power-On Reset Bit
RSR.PIN                6   External Reset Bit
RSR.COP                5   Computer Operating Properly Reset Bit
RSR.ILOP               4   Illegal Opcode Reset Bit
RSR.ILAD               3   Illegal Address Reset Bit (opcode fetches only)
RSR.MODRST             2   Monitor Mode Entry Module Reset bit
RSR.LVI                1   Low Voltage Inhibit Reset bit
RESERVFE02            0xFE02     RESERVED
BFCR                  0xFE03     Break Flag Control Register
BFCR.BCFE              7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF5               6   Interrupt Flag 5
INT1.IF4               5   Interrupt Flag 4
INT1.IF3               4   Interrupt Flag 3
INT1.IF1               2   Interrupt Flag 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flag 14
INT3                  0xFE06     Interrupt Status Register 3
INT3.IF15              0   Interrupt Flag 15
RESERVFE07            0xFE07     RESERVED
FLCR                  0xFE08     FLASH Control Register
FLCR.HVEN              3   High Voltage Enable Bit
FLCR.MASS              2   Mass Erase Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
FLBPR                 0xFE09     FLASH Block Protect Register
FLBPR.BPR7             7   FLASH Protection Register Bit 7
FLBPR.BPR6             6   FLASH Protection Register Bit 6
FLBPR.BPR5             5   FLASH Protection Register Bit 5
FLBPR.BPR4             4   FLASH Protection Register Bit 4
FLBPR.BPR3             3   FLASH Protection Register Bit 3
FLBPR.BPR2             2   FLASH Protection Register Bit 2
FLBPR.BPR1             1   FLASH Protection Register Bit 1
RESERVFE0A            0xFE0A     RESERVED
RESERVFE0B            0xFE0B     RESERVED
BRKH                  0xFE0C     Break Address High Register
BRKL                  0xFE0D     Break Address low Register
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
UNUSEDFFE2            0xFFE2     UNUSED
UNUSEDFFE3            0xFFE3     UNUSED
UNUSEDFFE4            0xFFE4     UNUSED
UNUSEDFFE5            0xFFE5     UNUSED
UNUSEDFFE6            0xFFE6     UNUSED
UNUSEDFFE7            0xFFE7     UNUSED
UNUSEDFFE8            0xFFE8     UNUSED
UNUSEDFFE9            0xFFE9     UNUSED
UNUSEDFFEA            0xFFEA     UNUSED
UNUSEDFFEB            0xFFEB     UNUSED
UNUSEDFFEC            0xFFEC     UNUSED
UNUSEDFFED            0xFFED     UNUSED
UNUSEDFFEE            0xFFEE     UNUSED
UNUSEDFFEF            0xFFEF     UNUSED
UNUSEDFFF0            0xFFF0     UNUSED
UNUSEDFFF1            0xFFF1     UNUSED
UNUSEDFFF8            0xFFF8     UNUSED
UNUSEDFFF9            0xFFF9     UNUSED
COPCTL                0xFFFF     COP Control Register


.68HC908KX2
; MC68HC908KX8/D  http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=68HC908KX2&nodeId=01M98634
; MC68HC908KX8.pdf

; 7680 bytes of FLASH memory
; 192 bytes of random-access memory (RAM)
; 36 bytes of user-defined vectors
; 295 bytes of monitor read-only memory (ROM)


; MEMORY MAP
area DATA FSR             0x0000:0x0040
area DATA RAM             0x0040:0x0100
area BSS  UNIMPLEMENTED   0x0100:0x1000
area DATA FLASH           0x1000:0x1400
area BSS  UNIMPLEMENTED   0x1400:0xF600
area DATA FLASH           0xF600:0xFE00
area DATA FSR_1           0xFE00:0xFE0D
area BSS  UNIMPLEMENTED   0xFE0D:0xFE20
area DATA MONITOR_ROM     0xFE20:0xFF47
area BSS  UNIMPLEMENTED   0xFF47:0xFF7E
area DATA FSR_2           0xFF7E:0xFF7F
area BSS  UNIMPLEMENTED   0xFF7F:0xFFDC
area DATA USER_VEC        0xFFDC:0x10000


; Interrupt and reset vector assignments
interrupt __RESET   0xFFFE       Reset vector
interrupt SWI       0xFFFC       SWI vector
interrupt IRQ1      0xFFFA       IRQ1 vector
interrupt CMIREQ    0xFFF8       CMIREQ vector
interrupt TIM_CH0   0xFFF6       TIM channel 0 vector
interrupt TIM_CH1   0xFFF4       TIM channel 1 vector
interrupt TIM       0xFFF2       TIM overflow vector
interrupt SCI_E     0xFFE6       SCI receive error vector
interrupt SCI_R     0xFFE4       SCI receive vector
interrupt SCI_T     0xFFE2       SCI transmit vector
interrupt KBRD      0xFFE0       Keyboard vector
interrupt ADC       0xFFDE       ADC conversion complete vector
interrupt TIME      0xFFDC       Timebase module vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
RESERV0002            0x0002     RESERVED
RESERV0003            0x0003     RESERVED
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
RESERV0006            0x0006     RESERVED
RESERV0007            0x0007     RESERVED
RESERV0008            0x0008     RESERVED
RESERV0009            0x0009     RESERVED
RESERV000A            0x000A     RESERVED
RESERV000B            0x000B     RESERVED
RESERV000C            0x000C     RESERVED
PTAPUE                0x000D     Port A Input Pullup Enable Register
PTAPUE.PTAPUE4         4   Port A Input Pullup Enable Bits 4
PTAPUE.PTAPUE3         3   Port A Input Pullup Enable Bits 3
PTAPUE.PTAPUE2         2   Port A Input Pullup Enable Bits 2
PTAPUE.PTAPUE1         1   Port A Input Pullup Enable Bits 1
PTAPUE.PTAPUE0         0   Port A Input Pullup Enable Bits 0
RESERV000E            0x000E     RESERVED
RESERV000F            0x000F     RESERVED
RESERV0010            0x0010     RESERVED
RESERV0011            0x0011     RESERVED
RESERV0012            0x0012     RESERVED
SCC1                  0x0013     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit
SCC1.ENSCI             6   Enable SCI Bit
SCC1.TXINV             5   Transmit Inversion Bit
SCC1.M                 4   Mode (Character Length) Bit
SCC1.WAKE              3   Wakeup Condition Bit
SCC1.ILTY              2   Idle Line Type Bit
SCC1.PEN               1   Parity Enable Bit
SCC1.PTY               0   Parity Bit
SCC2                  0x0014     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit
SCC2.ILIE              4   Idle Line Interrupt Enable Bit
SCC2.TE                3   Transmitter Enable Bit
SCC2.RE                2   Receiver Enable Bit
SCC2.RWU               1   Receiver Wakeup Bit
SCC2.SBK               0   Send Break Bit
SCC3                  0x0015     SCI Control Register 3
SCC3.R8                7   Received Bit 8
SCC3.T8                6   Transmitted Bit 8
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit
SCS1                  0x0016     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit
SCS1.TC                6   Transmission Complete Bit
SCS1.SCRF              5   SCI Receiver Full Bit
SCS1.IDLE              4   Receiver Idle Bit
SCS1.OR                3   Receiver Overrun Bit
SCS1.NF                2   Receiver Noise Flag Bit
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit
SCS2                  0x0017     SCI Status Register 2
SCS2.BKF               1   Break Flag Bit
SCS2.RPF               0   Reception-in-Progress Flag Bit
SCDR                  0x0018     SCI Data Register
SCDR.R7_T7             7   Receive/Transmit Data Bits 7
SCDR.R6_T6             6   Receive/Transmit Data Bits 6
SCDR.R5_T5             5   Receive/Transmit Data Bits 5
SCDR.R4_T4             4   Receive/Transmit Data Bits 4
SCDR.R3_T3             3   Receive/Transmit Data Bits 3
SCDR.R2_T2             2   Receive/Transmit Data Bits 2
SCDR.R1_T1             1   Receive/Transmit Data Bits 1
SCDR.R0_T0             0   Receive/Transmit Data Bits 0
SCBR                  0x0019     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2
SCBR.SCR1              1   SCI Baud Rate Select Bits 1
SCBR.SCR0              0   SCI Baud Rate Select Bits 0
KBSCR                 0x001A     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
KBIER                 0x001B     Keyboard Interrupt Enable Register
KBIER.KBIE4            4   Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Keyboard Interrupt Enable Bits 0
TBCR                  0x001C     Timebase Control Register
TBCR.TBIF              7   Timebase Interrupt Flag
TBCR.TBR2              6   Timebase Divider Selection Bits 2
TBCR.TBR1              5   Timebase Divider Selection Bits 1
TBCR.TBR0              4   Timebase Divider Selection Bits 0
TBCR.TACK              3   Timebase ACKnowledge Bit
TBCR.TBIE              2   Timebase Interrupt Enabled Bit
TBCR.TBON              1   Timebase Enabled Bit
ISCR                  0x001D     IRQ Status and Control Register
ISCR.IRQF1             3   IRQ1 Flag Bit
ISCR.ACK1              2   IRQ1 Interrupt Request Acknowledge Bit
ISCR.IMASK1            1   IRQ1 Interrupt Mask Bit
ISCR.MODE1             0   IRQ1 Edge/Level Select Bit
CONFIG2               0x001E     Configuration Register 2
CONFIG2.EXTXTALEN      5   External Crystal Enable Bit
CONFIG2.EXTSLOW        4   Slow External Crystal Enable Bit
CONFIG2.EXTCLKEN       3   External Clock Enable Bit
CONFIG2.OSCENINSTOP    1   Oscillator Enable In Stop Mode Bit
CONFIG2.SCIBDSRC       0   SCI Baud Rate Clock Source Bit
CONFIG1               0x001F     Configuration Register 1
CONFIG1.COPRS          7   COP Rate Select Bit
CONFIG1.LVISTOP        6   LVI Enable in Stop Mode Bit
CONFIG1.LVIRSTD        5   LVI Reset Disable Bit
CONFIG1.LVIPWRD        4   LVI Power Disable Bit
CONFIG1.LVI5OR3        3   LVI 5-V or 3-V Operating Mode Bit
CONFIG1.SSREC          2   Short Stop Recovery Bit
CONFIG1.STOP           1   STOP Instruction Enable Bit
CONFIG1.COPD           0   COP Disable Bit
TSC                   0x0020     Timer Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
TCNTH                 0x0021     Timer Counter Register High
TCNTL                 0x0022     Timer Counter Register Low
TMODH                 0x0023     Timer Counter Modulo Register High
TMODL                 0x0024     Timer Counter Modulo Register Low
TSC0                  0x0025     Timer Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit
TSC0.MS0B              5   Mode Select Bit B
TSC0.MS0A              4   Mode Select Bit A
TSC0.ELS0B             3   Edge/Level Select Bits
TSC0.ELS0A             2   Edge/Level Select Bits
TSC0.TOV0              1   Toggle On Overflow Bit
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0026     Timer Channel 0 Register High
TCH0L                 0x0027     Timer Channel 0 Register Low
TSC1                  0x0028     Timer Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 1 Flag Bit            
TSC1.CH1IE             6   Channel 1 Interrupt Enable Bit
TSC1.MS1A              4   Mode Select Bit A               
TSC1.ELS1B             3   Edge/Level Select Bits          
TSC1.ELS1A             2   Edge/Level Select Bits          
TSC1.TOV1              1   Toggle On Overflow Bit          
TSC1.CH1MAX            0   Channel 1 Maximum Duty Cycle Bit
TCH1H                 0x0029     Timer Channel 1 Register High
TCH1L                 0x002A     Timer Channel 1 Register Low
RESERV002B            0x002B     RESERVED
RESERV002C            0x002C     RESERVED
RESERV002D            0x002D     RESERVED
RESERV002E            0x002E     RESERVED
RESERV002F            0x002F     RESERVED
RESERV0030            0x0030     RESERVED
RESERV0031            0x0031     RESERVED
RESERV0032            0x0032     RESERVED
RESERV0033            0x0033     RESERVED
RESERV0034            0x0034     RESERVED
RESERV0035            0x0035     RESERVED
ICGCR                 0x0036     ICG Control Register
ICGCR.CMIE             7   Clock Monitor Interrupt Enable Bit
ICGCR.CMF              6   Clock Monitor Interrupt Flag
ICGCR.CMON             5   Clock Monitor On Bit
ICGCR.CS               4   Clock Select Bit
ICGCR.ICGON            3   Internal Clock Generator On Bit
ICGCR.ICGS             2   Internal Clock Generator Stable Bit
ICGCR.ECGON            1   External Clock Generator On Bit
ICGCR.ECGS             0   External Clock Generator Stable Bit
ICGMR                 0x0037     ICG Multiplier Register
ICGMR.N6               6   ICG Multiplier Factor Bits 6
ICGMR.N5               5   ICG Multiplier Factor Bits 5
ICGMR.N4               4   ICG Multiplier Factor Bits 4
ICGMR.N3               3   ICG Multiplier Factor Bits 3
ICGMR.N2               2   ICG Multiplier Factor Bits 2
ICGMR.N1               1   ICG Multiplier Factor Bits 1
ICGMR.N0               0   ICG Multiplier Factor Bits 0
ICGTR                 0x0038     ICG Trim Register
ICGTR.TRIM7            7   ICG Trim Factor Bits 7
ICGTR.TRIM6            6   ICG Trim Factor Bits 6
ICGTR.TRIM5            5   ICG Trim Factor Bits 5
ICGTR.TRIM4            4   ICG Trim Factor Bits 4
ICGTR.TRIM3            3   ICG Trim Factor Bits 3
ICGTR.TRIM2            2   ICG Trim Factor Bits 2
ICGTR.TRIM1            1   ICG Trim Factor Bits 1
ICGTR.TRIM0            0   ICG Trim Factor Bits 0
ICGDVR                0x0039     ICG Divider Control Register
ICGDVR.DDIV3           3   ICG DCO Divider Control Bits 3
ICGDVR.DDIV2           2   ICG DCO Divider Control Bits 2
ICGDVR.DDIV1           1   ICG DCO Divider Control Bits 1
ICGDVR.DDIV0           0   ICG DCO Divider Control Bits 0
ICGDSR                0x003A     ICG DCO Stage Control Register
ICGDSR.DSTG7           7   ICG DCO Stage Control Bits 7
ICGDSR.DSTG6           6   ICG DCO Stage Control Bits 6
ICGDSR.DSTG5           5   ICG DCO Stage Control Bits 5
ICGDSR.DSTG4           4   ICG DCO Stage Control Bits 4
ICGDSR.DSTG3           3   ICG DCO Stage Control Bits 3
ICGDSR.DSTG2           2   ICG DCO Stage Control Bits 2
ICGDSR.DSTG1           1   ICG DCO Stage Control Bits 1
ICGDSR.DSTG0           0   ICG DCO Stage Control Bits 0
RESERV003B            0x003B     RESERVED
ADSCR                 0x003C     Analog-to-Digital Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADR                   0x003D     Analog-to-Digital Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADCLK                 0x003E     Analog-to-Digital Input Clock Register
ADCLK.ADIV2            7   ADC Clock Prescaler Bits 2
ADCLK.ADIV1            6   ADC Clock Prescaler Bits 1
ADCLK.ADIV0            5   ADC Clock Prescaler Bits 0
ADCLK.ADICLK           4   ADC Input Clock Select Bit
RESERV003F            0x003F     RESERVED
SBSR                  0xFE00     SIM Break Status Register
SBSR.BW_NOTE           1   Break Wait Bit
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Bit
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit (opcode fetches only)
SRSR.MENRST            2   Forced Monitor Mode Entry Reset Bit
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
BRKAR                 0xFE02     Break Auxiliary Register
BRKAR.BDCOP            0   Break Disable COP Bit
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7
INT1                  0xFE04     Interrupt Status Register
INT1.IF6               7   Interrupt Flags 6
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF2               3   Interrupt Flags 2
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flags 14
INT2.IF13              6   Interrupt Flags 13
INT2.IF12              5   Interrupt Flags 12
INT2.IF11              4   Interrupt Flags 11
INT2.IF10              3   Interrupt Flags 10
INT2.IF9               2   Interrupt Flags 9
INT2.IF8               1   Interrupt Flags 8
INT2.IF7               0   Interrupt Flags 7
INT3                  0xFE06     Interrupt Status Register 3
INT3.IF22              7   Interrupt Flags 22
INT3.IF21              6   Interrupt Flags 21
INT3.IF20              5   Interrupt Flags 20
INT3.IF19              4   Interrupt Flags 19
INT3.IF18              3   Interrupt Flags 18
INT3.IF17              2   Interrupt Flags 17
INT3.IF16              1   Interrupt Flags 16
INT3.IF15              0   Interrupt Flags 15
FLTCR                 0xFE07     FLASH Test Control Register
FLCR                  0xFE08     FLASH Control Register
FLCR.HVEN              3   High-Voltage Enable Bit
FLCR.MASS              2   Mass Erase Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
BRKH                  0xFE09     Break Addres Register High
BRKL                  0xFE0A     Break Addres Register Low
BRKSCR                0xFE0B     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
LVISR                 0xFE0C     LVI Status Register
LVISR.LVIOUT           7   LVI Output Bit
FLBPR                 0xFF7E     FLASH Block Protect Register
FLBPR.BPR7             7   FLASH Block Protect Bits 7
FLBPR.BPR6             6   FLASH Block Protect Bits 6
FLBPR.BPR5             5   FLASH Block Protect Bits 5
FLBPR.BPR4             4   FLASH Block Protect Bits 4
FLBPR.BPR3             3   FLASH Block Protect Bits 3
FLBPR.BPR2             2   FLASH Block Protect Bits 2
FLBPR.BPR1             1   FLASH Block Protect Bits 1
FLBPR.BPR0             0   FLASH Block Protect Bits 0
RESERVFFE8            0xFFE8     RESERVED
RESERVFFE9            0xFFE9     RESERVED
RESERVFFEA            0xFFEA     RESERVED
RESERVFFEB            0xFFEB     RESERVED
RESERVFFEC            0xFFEC     RESERVED
RESERVFFED            0xFFED     RESERVED
RESERVFFEE            0xFFEE     RESERVED
RESERVFFEF            0xFFEF     RESERVED
RESERVFFF0            0xFFF0     RESERVED
RESERVFFF1            0xFFF1     RESERVED
COPCTL                0xFFFF     COP Control Register


.68HC908KX8
; MC68HC908KX8/D  http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=68HC908KX8&nodeId=01M98634
; MC68HC908KX8.pdf

; 7680 bytes of FLASH memory
; 192 bytes of random-access memory (RAM)
; 36 bytes of user-defined vectors
; 295 bytes of monitor read-only memory (ROM)


; MEMORY MAP
area DATA FSR             0x0000:0x0040
area DATA RAM             0x0040:0x0100
area BSS  UNIMPLEMENTED   0x0100:0x1000
area DATA FLASH1          0x1000:0x1400
area BSS  UNIMPLEMENTED   0x1400:0xE000
area DATA FLASH2          0xE000:0xFE00
area DATA FSR_1           0xFE00:0xFE0D
area BSS  UNIMPLEMENTED   0xFE0D:0xFE20
area DATA MONITOR_ROM     0xFE20:0xFF47
area BSS  UNIMPLEMENTED   0xFF47:0xFF7E
area DATA FSR_2           0xFF7E:0xFF7F
area BSS  UNIMPLEMENTED   0xFF7F:0xFFDC
area DATA USER_VEC        0xFFDC:0x10000


; Interrupt and reset vector assignments
interrupt __RESET   0xFFFE    Reset vector
interrupt SWI       0xFFFC    SWI vector
interrupt IRQ1      0xFFFA    IRQ1 vector
interrupt CMIREQ    0xFFF8    CMIREQ vector
interrupt TIM_CH0   0xFFF6    TIM channel 0 vector
interrupt TIM_CH1   0xFFF4    TIM channel 1 vector
interrupt TIM       0xFFF2    TIM overflow vector
interrupt SCI_E     0xFFE6    SCI receive error vector
interrupt SCI_R     0xFFE4    SCI receive vector
interrupt SCI_T     0xFFE2    SCI transmit vector
interrupt KBRD      0xFFE0    Keyboard vector
interrupt ADC       0xFFDE    ADC conversion complete vector
interrupt TIME      0xFFDC    Timebase module vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
RESERV0002            0x0002     RESERVED
RESERV0003            0x0003     RESERVED
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
RESERV0006            0x0006     RESERVED
RESERV0007            0x0007     RESERVED
RESERV0008            0x0008     RESERVED
RESERV0009            0x0009     RESERVED
RESERV000A            0x000A     RESERVED
RESERV000B            0x000B     RESERVED
RESERV000C            0x000C     RESERVED
PTAPUE                0x000D     Port A Input Pullup Enable Register
PTAPUE.PTAPUE4         4   Port A Input Pullup Enable Bits 4
PTAPUE.PTAPUE3         3   Port A Input Pullup Enable Bits 3
PTAPUE.PTAPUE2         2   Port A Input Pullup Enable Bits 2
PTAPUE.PTAPUE1         1   Port A Input Pullup Enable Bits 1
PTAPUE.PTAPUE0         0   Port A Input Pullup Enable Bits 0
RESERV000E            0x000E     RESERVED
RESERV000F            0x000F     RESERVED
RESERV0010            0x0010     RESERVED
RESERV0011            0x0011     RESERVED
RESERV0012            0x0012     RESERVED
SCC1                  0x0013     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit
SCC1.ENSCI             6   Enable SCI Bit
SCC1.TXINV             5   Transmit Inversion Bit
SCC1.M                 4   Mode (Character Length) Bit
SCC1.WAKE              3   Wakeup Condition Bit
SCC1.ILTY              2   Idle Line Type Bit
SCC1.PEN               1   Parity Enable Bit
SCC1.PTY               0   Parity Bit
SCC2                  0x0014     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit
SCC2.ILIE              4   Idle Line Interrupt Enable Bit
SCC2.TE                3   Transmitter Enable Bit
SCC2.RE                2   Receiver Enable Bit
SCC2.RWU               1   Receiver Wakeup Bit
SCC2.SBK               0   Send Break Bit
SCC3                  0x0015     SCI Control Register 3
SCC3.R8                7   Received Bit 8
SCC3.T8                6   Transmitted Bit 8
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit
SCS1                  0x0016     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit
SCS1.TC                6   Transmission Complete Bit
SCS1.SCRF              5   SCI Receiver Full Bit
SCS1.IDLE              4   Receiver Idle Bit
SCS1.OR                3   Receiver Overrun Bit
SCS1.NF                2   Receiver Noise Flag Bit
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit
SCS2                  0x0017     SCI Status Register 2
SCS2.BKF               1   Break Flag Bit
SCS2.RPF               0   Reception-in-Progress Flag Bit
SCDR                  0x0018     SCI Data Register
SCDR.R7_T7             7   Receive/Transmit Data Bits 7
SCDR.R6_T6             6   Receive/Transmit Data Bits 6
SCDR.R5_T5             5   Receive/Transmit Data Bits 5
SCDR.R4_T4             4   Receive/Transmit Data Bits 4
SCDR.R3_T3             3   Receive/Transmit Data Bits 3
SCDR.R2_T2             2   Receive/Transmit Data Bits 2
SCDR.R1_T1             1   Receive/Transmit Data Bits 1
SCDR.R0_T0             0   Receive/Transmit Data Bits 0
SCBR                  0x0019     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2
SCBR.SCR1              1   SCI Baud Rate Select Bits 1
SCBR.SCR0              0   SCI Baud Rate Select Bits 0
KBSCR                 0x001A     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
KBIER                 0x001B     Keyboard Interrupt Enable Register
KBIER.KBIE4            4   Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Keyboard Interrupt Enable Bits 0
TBCR                  0x001C     Timebase Control Register
TBCR.TBIF              7   Timebase Interrupt Flag
TBCR.TBR2              6   Timebase Divider Selection Bits 2
TBCR.TBR1              5   Timebase Divider Selection Bits 1
TBCR.TBR0              4   Timebase Divider Selection Bits 0
TBCR.TACK              3   Timebase ACKnowledge Bit
TBCR.TBIE              2   Timebase Interrupt Enabled Bit
TBCR.TBON              1   Timebase Enabled Bit
ISCR                  0x001D     IRQ Status and Control Register
ISCR.IRQF1             3   IRQ1 Flag Bit
ISCR.ACK1              2   IRQ1 Interrupt Request Acknowledge Bit
ISCR.IMASK1            1   IRQ1 Interrupt Mask Bit
ISCR.MODE1             0   IRQ1 Edge/Level Select Bit
CONFIG2               0x001E     Configuration Register 2
CONFIG2.EXTXTALEN      5   External Crystal Enable Bit
CONFIG2.EXTSLOW        4   Slow External Crystal Enable Bit
CONFIG2.EXTCLKEN       3   External Clock Enable Bit
CONFIG2.OSCENINSTOP    1   Oscillator Enable In Stop Mode Bit
CONFIG2.SCIBDSRC       0   SCI Baud Rate Clock Source Bit
CONFIG1               0x001F     Configuration Register 1
CONFIG1.COPRS          7   COP Rate Select Bit
CONFIG1.LVISTOP        6   LVI Enable in Stop Mode Bit
CONFIG1.LVIRSTD        5   LVI Reset Disable Bit
CONFIG1.LVIPWRD        4   LVI Power Disable Bit
CONFIG1.LVI5OR3        3   LVI 5-V or 3-V Operating Mode Bit
CONFIG1.SSREC          2   Short Stop Recovery Bit
CONFIG1.STOP           1   STOP Instruction Enable Bit
CONFIG1.COPD           0   COP Disable Bit
TSC                   0x0020     Timer Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
TCNTH                 0x0021     Timer Counter Register High
TCNTL                 0x0022     Timer Counter Register Low
TMODH                 0x0023     Timer Counter Modulo Register High
TMODL                 0x0024     Timer Counter Modulo Register Low
TSC0                  0x0025     Timer Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit
TSC0.MS0B              5   Mode Select Bit B
TSC0.MS0A              4   Mode Select Bit A
TSC0.ELS0B             3   Edge/Level Select Bits
TSC0.ELS0A             2   Edge/Level Select Bits
TSC0.TOV0              1   Toggle On Overflow Bit
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0026     Timer Channel 0 Register High
TCH0L                 0x0027     Timer Channel 0 Register Low
TSC1                  0x0028     Timer Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 1 Flag Bit            
TSC1.CH1IE             6   Channel 1 Interrupt Enable Bit
TSC1.MS1A              4   Mode Select Bit A               
TSC1.ELS1B             3   Edge/Level Select Bits          
TSC1.ELS1A             2   Edge/Level Select Bits          
TSC1.TOV1              1   Toggle On Overflow Bit          
TSC1.CH1MAX            0   Channel 1 Maximum Duty Cycle Bit
TCH1H                 0x0029     Timer Channel 1 Register High
TCH1L                 0x002A     Timer Channel 1 Register Low
RESERV002B            0x002B     RESERVED
RESERV002C            0x002C     RESERVED
RESERV002D            0x002D     RESERVED
RESERV002E            0x002E     RESERVED
RESERV002F            0x002F     RESERVED
RESERV0030            0x0030     RESERVED
RESERV0031            0x0031     RESERVED
RESERV0032            0x0032     RESERVED
RESERV0033            0x0033     RESERVED
RESERV0034            0x0034     RESERVED
RESERV0035            0x0035     RESERVED
ICGCR                 0x0036     ICG Control Register
ICGCR.CMIE             7   Clock Monitor Interrupt Enable Bit
ICGCR.CMF              6   Clock Monitor Interrupt Flag
ICGCR.CMON             5   Clock Monitor On Bit
ICGCR.CS               4   Clock Select Bit
ICGCR.ICGON            3   Internal Clock Generator On Bit
ICGCR.ICGS             2   Internal Clock Generator Stable Bit
ICGCR.ECGON            1   External Clock Generator On Bit
ICGCR.ECGS             0   External Clock Generator Stable Bit
ICGMR                 0x0037     ICG Multiplier Register
ICGMR.N6               6   ICG Multiplier Factor Bits 6
ICGMR.N5               5   ICG Multiplier Factor Bits 5
ICGMR.N4               4   ICG Multiplier Factor Bits 4
ICGMR.N3               3   ICG Multiplier Factor Bits 3
ICGMR.N2               2   ICG Multiplier Factor Bits 2
ICGMR.N1               1   ICG Multiplier Factor Bits 1
ICGMR.N0               0   ICG Multiplier Factor Bits 0
ICGTR                 0x0038     ICG Trim Register
ICGTR.TRIM7            7   ICG Trim Factor Bits 7
ICGTR.TRIM6            6   ICG Trim Factor Bits 6
ICGTR.TRIM5            5   ICG Trim Factor Bits 5
ICGTR.TRIM4            4   ICG Trim Factor Bits 4
ICGTR.TRIM3            3   ICG Trim Factor Bits 3
ICGTR.TRIM2            2   ICG Trim Factor Bits 2
ICGTR.TRIM1            1   ICG Trim Factor Bits 1
ICGTR.TRIM0            0   ICG Trim Factor Bits 0
ICGDVR                0x0039     ICG Divider Control Register
ICGDVR.DDIV3           3   ICG DCO Divider Control Bits 3
ICGDVR.DDIV2           2   ICG DCO Divider Control Bits 2
ICGDVR.DDIV1           1   ICG DCO Divider Control Bits 1
ICGDVR.DDIV0           0   ICG DCO Divider Control Bits 0
ICGDSR                0x003A     ICG DCO Stage Control Register
ICGDSR.DSTG7           7   ICG DCO Stage Control Bits 7
ICGDSR.DSTG6           6   ICG DCO Stage Control Bits 6
ICGDSR.DSTG5           5   ICG DCO Stage Control Bits 5
ICGDSR.DSTG4           4   ICG DCO Stage Control Bits 4
ICGDSR.DSTG3           3   ICG DCO Stage Control Bits 3
ICGDSR.DSTG2           2   ICG DCO Stage Control Bits 2
ICGDSR.DSTG1           1   ICG DCO Stage Control Bits 1
ICGDSR.DSTG0           0   ICG DCO Stage Control Bits 0
Reserv003B            0x003B     RESERVED
ADSCR                 0x003C     Analog-to-Digital Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADR                   0x003D     Analog-to-Digital Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADCLK                 0x003E     Analog-to-Digital Input Clock Register
ADCLK.ADIV2            7   ADC Clock Prescaler Bits 2
ADCLK.ADIV1            6   ADC Clock Prescaler Bits 1
ADCLK.ADIV0            5   ADC Clock Prescaler Bits 0
ADCLK.ADICLK           4   ADC Input Clock Select Bit
RESERV003F            0x003F     RESERVED
SBSR                  0xFE00     SIM Break Status Register
SBSR.BW_NOTE           1   Break Wait Bit
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Bit
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit (opcode fetches only)
SRSR.MENRST            2   Forced Monitor Mode Entry Reset Bit
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
BRKAR                 0xFE02     Break Auxiliary Register
BRKAR.BDCOP            0   Break Disable COP Bit
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register
INT1.IF6               7   Interrupt Flags 6
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF2               3   Interrupt Flags 2
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flags 14
INT2.IF13              6   Interrupt Flags 13
INT2.IF12              5   Interrupt Flags 12
INT2.IF11              4   Interrupt Flags 11
INT2.IF10              3   Interrupt Flags 10
INT2.IF9               2   Interrupt Flags 9
INT2.IF8               1   Interrupt Flags 8
INT2.IF7               0   Interrupt Flags 7
INT3                  0xFE06     Interrupt Status Register 3
INT3.IF22              7   Interrupt Flags 22
INT3.IF21              6   Interrupt Flags 21
INT3.IF20              5   Interrupt Flags 20
INT3.IF19              4   Interrupt Flags 19
INT3.IF18              3   Interrupt Flags 18
INT3.IF17              2   Interrupt Flags 17
INT3.IF16              1   Interrupt Flags 16
INT3.IF15              0   Interrupt Flags 15
FLTCR                 0xFE07     FLASH Test Control Register
FLCR                  0xFE08     FLASH Control Register
FLCR.HVEN              3   High-Voltage Enable Bit
FLCR.MASS              2   Mass Erase Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
BRKH                  0xFE09     Break Addres Register High
BRKL                  0xFE0A     Break Addres Register Low
BRKSCR                0xFE0B     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
LVISR                 0xFE0C     LVI Status Register
LVISR.LVIOUT           7   LVI Output Bit
FLBPR                 0xFF7E     FLASH Block Protect Register
FLBPR.BPR7             7   FLASH Block Protect Bit 7
FLBPR.BPR6             6   FLASH Block Protect Bit 6
FLBPR.BPR5             5   FLASH Block Protect Bit 5
FLBPR.BPR4             4   FLASH Block Protect Bit 4
FLBPR.BPR3             3   FLASH Block Protect Bit 3
FLBPR.BPR2             2   FLASH Block Protect Bit 2
FLBPR.BPR1             1   FLASH Block Protect Bit 1
FLBPR.BPR0             0   FLASH Block Protect Bit 0
RESERVFFE8            0xFFE8     RESERVED
RESERVFFE9            0xFFE9     RESERVED
RESERVFFEA            0xFFEA     RESERVED
RESERVFFEB            0xFFEB     RESERVED
RESERVFFEC            0xFFEC     RESERVED
RESERVFFED            0xFFED     RESERVED
RESERVFFEE            0xFFEE     RESERVED
RESERVFFEF            0xFFEF     RESERVED
RESERVFFF0            0xFFF0     RESERVED
RESERVFFF1            0xFFF1     RESERVED
COPCTL                0xFFFF     COP Control Register


.68HC908LD64
; MC68HC908LD64/D  http://
; MC68HC908LD64.pdf

; 60,928 bytes of FLASH memory
; 2,048 bytes of random-access memory (RAM)
; 32 bytes of user-defined vectors
; 1,024 + 464 bytes of monitor ROM


; MEMORY MAP
area DATA FSR		  0x0000:0x0080
area DATA RAM		  0x0080:0x0480
area BSS  Unimplemented	  0x0480:0x0800
area DATA OSD_RAM	  0x0800:0x0C00
area DATA FLASH_1	  0x0C00:0x1000
area DATA OSD_FLASH	  0x1000:0x4000
area DATA FLASH_2	  0x4000:0xFA00
area DATA Monitor_ROM_1	  0xFA00:0xFE00
area DATA FSR_1		  0xFE00:0xFE10
area DATA Monitor_ROM_2	  0xFE10:0xFFE0
area DATA USER_VEC	  0xFFE0:0x10000


; Interrupt and reset vector assignments
interrupt __RESET    0xFFFE       Reset Vector
interrupt SWI        0xFFFC       SWI Vector
interrupt IRQ        0xFFFA       IRQ Vector
interrupt USB        0xFFF8       USB Vector
interrupt USB_HUB    0xFFF6       USB HUB Interrupt Vector
interrupt USB_DEV    0xFFF4       USB Device Interrupt Vector
interrupt DDC12AB    0xFFF2       DDC12AB Vector
interrupt TIM_CH0    0xFFF0       TIM Channel 0 Vector
interrupt TIM_CH1    0xFFEE       TIM Channel 1 Vector
interrupt TIM        0xFFEC       TIM Overflow Vector
interrupt SYNC       0xFFEA       Sync Processor Vector
interrupt MMIIC      0xFFE8       MMIIC Vector
interrupt OSD        0xFFE6       OSD Interrupt Vector
interrupt ADC        0xFFE4       ADC Interrupt Vector
interrupt KBRD       0xFFE2       Keyboard Interrupt Vector
interrupt CGM_PLL    0xFFE0       CGM PLL Interrupt Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bits 7
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
PTC                   0x0002     Port C Data Register
PTC.PTC6               6   Port C Data Bits 6
PTC.PTC5               5   Port C Data Bits 5
PTC.PTC4               4   Port C Data Bits 4
PTC.PTC3               3   Port C Data Bits 3
PTC.PTC2               2   Port C Data Bits 2
PTC.PTC1               1   Port C Data Bits 1
PTC.PTC0               0   Port C Data Bits 0
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bits 7
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bits 7
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
DDRC                  0x0006     Data Direction Register C
DDRC.DDRC6             6   Data Direction Register C Bits 6
DDRC.DDRC5             5   Data Direction Register C Bits 5
DDRC.DDRC4             4   Data Direction Register C Bits 4
DDRC.DDRC3             3   Data Direction Register C Bits 3
DDRC.DDRC2             2   Data Direction Register C Bits 2
DDRC.DDRC1             1   Data Direction Register C Bits 1
DDRC.DDRC0             0   Data Direction Register C Bits 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bits 7
DDRD.DDRD6             6   Data Direction Register D Bits 6
DDRD.DDRD5             5   Data Direction Register D Bits 5
DDRD.DDRD4             4   Data Direction Register D Bits 4
DDRD.DDRD3             3   Data Direction Register D Bits 3
DDRD.DDRD2             2   Data Direction Register D Bits 2
DDRD.DDRD1             1   Data Direction Register D Bits 1
DDRD.DDRD0             0   Data Direction Register D Bits 0
PTE                   0x0008     Port E Data Register
PTE.PTE7               7   Port E Data Bits 7
PTE.PTE6               6   Port E Data Bits 6
PTE.PTE5               5   Port E Data Bits 5
PTE.PTE4               4   Port E Data Bits 4
PTE.PTE3               3   Port E Data Bits 3
PTE.PTE2               2   Port E Data Bits 2
PTE.PTE1               1   Port E Data Bits 1
PTE.PTE0               0   Port E Data Bits 0
DDRE                  0x0009     Data Direction Register E
DDRE.DDRE7             7   Data Direction Register E Bits 7
DDRE.DDRE6             6   Data Direction Register E Bits 6
DDRE.DDRE5             5   Data Direction Register E Bits 5
DDRE.DDRE4             4   Data Direction Register E Bits 4
DDRE.DDRE3             3   Data Direction Register E Bits 3
DDRE.DDRE2             2   Data Direction Register E Bits 2
DDRE.DDRE1             1   Data Direction Register E Bits 1
DDRE.DDRE0             0   Data Direction Register E Bits 0
TSC                   0x000A     TIM Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
RESERV000B            0x000B     RESERVED
TCNTH                 0x000C     TIM Counter Register High
TCNTL                 0x000D     TIM Counter Register Low
TMODH                 0x000E     TIM Counter Modulo Register High
TMODL                 0x000F     TIM Counter Modulo Register Low
TSC0                  0x0010     TIM Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit
TSC0.MS0B              5   Mode Select Bit B
TSC0.MS0A              4   Mode Select Bit A
TSC0.ELS0B             3   Edge/Level Select Bits
TSC0.ELS0A             2   Edge/Level Select Bits
TSC0.TOV0              1   Toggle-On-Overflow Bit
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0011     TIM Channel 0 Register High
TCH0L                 0x0012     TIM Channel 0 Register Low
TSC1                  0x0013     TIM Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 1 Flag Bit            
TSC1.CH1IE             6   Channel 1 Interrupt Enable Bit
TSC1.MS1A              4   Mode Select Bit A               
TSC1.ELS1B             3   Edge/Level Select Bits          
TSC1.ELS1A             2   Edge/Level Select Bits          
TSC1.TOV1              1   Toggle-On-Overflow Bit          
TSC1.CH1MAX            0   Channel 1 Maximum Duty Cycle Bit
TCH1H                 0x0014     TIM Channel 1 Register High
TCH1L                 0x0015     TIM Channel 1 Register Low
DMCR                  0x0016     DDC Master Control Register
DMCR.ALIF              7   DDC Arbitration Lost Interrupt Flag
DMCR.NAKIF             6   No Acknowledge Interrupt Flag
DMCR.BB                5   Bus Busy Flag
DMCR.MAST              4   Master Control Bit
DMCR.MRW               3   Master Read/Write
DMCR.BR2               2   Baud Rate Select 2
DMCR.BR1               1   Baud Rate Select 1
DMCR.BR0               0   Baud Rate Select 0
DADR                  0x0017     DDC Address Register
DADR.DAD7              7   DDC Address 7
DADR.DAD6              6   DDC Address 6
DADR.DAD5              5   DDC Address 5
DADR.DAD4              4   DDC Address 4
DADR.DAD3              3   DDC Address 3
DADR.DAD2              2   DDC Address 2
DADR.DAD1              1   DDC Address 1
DADR.EXTAD             0   DDC Expanded Address
DCR                   0x0018     DDC Control Register
DCR.DEN                7   DDC Enable
DCR.DIEN               6   DDC Interrupt Enable
DCR.TXAK               3   Transmit Acknowledge Enable
DCR.SCLIEN             2   SCL Interrupt Enable
DCR.DDC1EN             1   DDC1 Protocol Enable
DSR                   0x0019     DDC Status Register
DSR.RXIF               7   DDC Receive Interrupt Flag
DSR.TXIF               6   DDC Transmit Interrupt Flag
DSR.MATCH              5   DDC Address Match
DSR.SRW                4   DDC Slave Read/Write
DSR.RXAK               3   DDC Receive Acknowledge
DSR.SCLIF              2   DDC Receive Acknowledge
DSR.TXBE               1   DDC Transmit Buffer Empty
DSR.RXBF               0   DDC Receive Buffer Full
DDTR                  0x001A     DDC Data Transmit Register
DDTR.DTD7              7
DDTR.DTD6              6
DDTR.DTD5              5
DDTR.DTD4              4
DDTR.DTD3              3
DDTR.DTD2              2
DDTR.DTD1              1
DDTR.DTD0              0
DDRR                  0x001B     DDC Data Receive Register
DDRR.DRD7              7
DDRR.DRD6              6
DDRR.DRD5              5
DDRR.DRD4              4
DDRR.DRD3              3
DDRR.DRD2              2
DDRR.DRD1              1
DDRR.DRD0              0
D2ADR                 0x001C     DDC2 Address Register
D2ADR.D2AD7            7   DDC2 Address 7
D2ADR.D2AD6            6   DDC2 Address 6
D2ADR.D2AD5            5   DDC2 Address 5
D2ADR.D2AD4            4   DDC2 Address 4
D2ADR.D2AD3            3   DDC2 Address 3
D2ADR.D2AD2            2   DDC2 Address 2
D2ADR.D2AD1            1   DDC2 Address 1
RESERV001D            0x001D     RESERVED
INTSCR                0x001E     IRQ Status and Control Register
INTSCR.IRQF            3   IRQ Flag
INTSCR.ACK             2   IRQ Interrupt Request Acknowledge Bit
INTSCR.IMASK           1   IRQ Interrupt Mask Bit
INTSCR.MODE            0   IRQ Edge/Level Select Bit
CONFIG                0x001F     Configuration Register
CONFIG.SSREC           3   Short Stop Recovery Bit
CONFIG.COPRS           2   COP Rate Select Bit
CONFIG.STOP            1   STOP Instruction Enable Bit
CONFIG.COPD            0   COP Disable Bit
DE0D0                 0x0020     USB Embedded Device Endpoint 0 Data Reg. 0
DE0D0.DE0R07_DE0T07    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D0.DE0R06_DE0T06    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D0.DE0R05_DE0T05    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D0.DE0R04_DE0T04    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D0.DE0R03_DE0T03    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D0.DE0R02_DE0T02    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D0.DE0R01_DE0T01    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D0.DE0R00_DE0T00    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE0D1                 0x0021     USB Embedded Device Endpoint 0 Data Reg. 1
DE0D1.DE0R17_DE0T17    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D1.DE0R16_DE0T16    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D1.DE0R15_DE0T15    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D1.DE0R14_DE0T14    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D1.DE0R13_DE0T13    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D1.DE0R12_DE0T12    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D1.DE0R11_DE0T11    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D1.DE0R10_DE0T10    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE0D2                 0x0022     USB Embedded Device Endpoint 0 Data Reg. 2
DE0D2.DE0R27_DE0T27    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D2.DE0R26_DE0T26    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D2.DE0R25_DE0T25    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D2.DE0R24_DE0T24    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D2.DE0R23_DE0T23    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D2.DE0R22_DE0T22    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D2.DE0R21_DE0T21    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D2.DE0R20_DE0T20    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE0D3                 0x0023     USB Embedded Device Endpoint 0 Data Reg. 3
DE0D3.DE0R37_DE0T37    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D3.DE0R36_DE0T36    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D3.DE0R35_DE0T35    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D3.DE0R34_DE0T34    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D3.DE0R33_DE0T33    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D3.DE0R32_DE0T32    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D3.DE0R31_DE0T31    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D3.DE0R30_DE0T30    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE0D4                 0x0024     USB Embedded Device Endpoint 0 Data Reg. 4
DE0D4.DE0R47_DE0T47    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D4.DE0R46_DE0T46    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D4.DE0R45_DE0T45    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D4.DE0R44_DE0T44    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D4.DE0R43_DE0T43    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D4.DE0R42_DE0T42    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D4.DE0R41_DE0T41    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D4.DE0R40_DE0T40    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE0D5                 0x0025     USB Embedded Device Endpoint 0 Data Reg. 5
DE0D5.DE0R57_DE0T57    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D5.DE0R56_DE0T56    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D5.DE0R55_DE0T55    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D5.DE0R54_DE0T54    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D5.DE0R53_DE0T53    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D5.DE0R52_DE0T52    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D5.DE0R51_DE0T51    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D5.DE0R50_DE0T50    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE0D6                 0x0026     USB Embedded Device Endpoint 0 Data Reg. 6
DE0D6.DE0R67_DE0T67    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D6.DE0R66_DE0T66    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D6.DE0R65_DE0T65    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D6.DE0R64_DE0T64    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D6.DE0R63_DE0T63    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D6.DE0R62_DE0T62    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D6.DE0R61_DE0T61    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D6.DE0R60_DE0T60    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE0D7                 0x0027     USB Embedded Device Endpoint 0 Data Reg. 7
DE0D7.DE0R77_DE0T77    7   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 7
DE0D7.DE0R76_DE0T76    6   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 6
DE0D7.DE0R75_DE0T75    5   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 5
DE0D7.DE0R74_DE0T74    4   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 4
DE0D7.DE0R73_DE0T73    3   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 3
DE0D7.DE0R72_DE0T72    2   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 2
DE0D7.DE0R71_DE0T71    1   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 1
DE0D7.DE0R70_DE0T70    0   Embedded Device Endpoint 0 Receive/Transmit Data Buffer 0
DE1D0                 0x0028     USB Embedded Device Endpoint 1_2 Data Reg. 0
DE1D0.DE1T07           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D0.DE1T06           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D0.DE1T05           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D0.DE1T04           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D0.DE1T03           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D0.DE1T02           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D0.DE1T01           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D0.DE1T00           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
DE1D1                 0x0029     USB Embedded Device Endpoint 1_2 Data Reg. 1
DE1D1.DE1T17           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D1.DE1T16           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D1.DE1T15           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D1.DE1T14           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D1.DE1T13           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D1.DE1T12           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D1.DE1T11           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D1.DE1T10           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
DE1D2                 0x002A     USB Embedded Device Endpoint 1_2 Data Reg. 2
DE1D2.DE1T27           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D2.DE1T26           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D2.DE1T25           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D2.DE1T24           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D2.DE1T23           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D2.DE1T22           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D2.DE1T21           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D2.DE1T20           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
DE1D3                 0x002B     USB Embedded Device Endpoint 1_2 Data Reg. 3
DE1D3.DE1T37           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D3.DE1T36           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D3.DE1T35           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D3.DE1T34           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D3.DE1T33           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D3.DE1T32           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D3.DE1T31           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D3.DE1T30           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
DE1D4                 0x002C     USB Embedded Device Endpoint 1_2 Data Reg. 4
DE1D4.DE1T47           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D4.DE1T46           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D4.DE1T45           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D4.DE1T44           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D4.DE1T43           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D4.DE1T42           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D4.DE1T41           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D4.DE1T40           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
DE1D5                 0x002D     USB Embedded Device Endpoint 1_2 Data Reg. 5
DE1D5.DE1T57           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D5.DE1T56           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D5.DE1T55           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D5.DE1T54           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D5.DE1T53           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D5.DE1T52           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D5.DE1T51           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D5.DE1T50           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
DE1D6                 0x002E     USB Embedded Device Endpoint 1_2 Data Reg. 6
DE1D6.DE1T67           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D6.DE1T66           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D6.DE1T65           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D6.DE1T64           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D6.DE1T63           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D6.DE1T62           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D6.DE1T61           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D6.DE1T60           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
DE1D7                 0x002F     USB Embedded Device Endpoint 1_2 Data Reg. 7
DE1D7.DE1T77           7   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 7
DE1D7.DE1T76           6   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 6
DE1D7.DE1T75           5   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 5
DE1D7.DE1T74           4   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 4
DE1D7.DE1T73           3   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 3
DE1D7.DE1T72           2   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 2
DE1D7.DE1T71           1   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 1
DE1D7.DE1T70           0   Embedded Device Endpoint 1/ Endpoint 2 Transmit Data Buffer 0
HE0D0                 0x0030     USB HUB Endpoint 0 Data Register 0
HE0D0.HE0R07_HE0T07    7   Hub Endpoint 0 Receive/Transmit Data Buffer 7
HE0D0.HE0R06_HE0T06    6   Hub Endpoint 0 Receive/Transmit Data Buffer 6
HE0D0.HE0R05_HE0T05    5   Hub Endpoint 0 Receive/Transmit Data Buffer 5
HE0D0.HE0R04_HE0T04    4   Hub Endpoint 0 Receive/Transmit Data Buffer 4
HE0D0.HE0R03_HE0T03    3   Hub Endpoint 0 Receive/Transmit Data Buffer 3
HE0D0.HE0R02_HE0T02    2   Hub Endpoint 0 Receive/Transmit Data Buffer 2
HE0D0.HE0R01_HE0T01    1   Hub Endpoint 0 Receive/Transmit Data Buffer 1
HE0D0.HE0R00_HE0T00    0   Hub Endpoint 0 Receive/Transmit Data Buffer 0
HE0D1                 0x0031     USB HUB Endpoint 0 Data Register 1
HE0D1.HE0R17_HE0T17    7   Hub Endpoint 0 Receive/Transmit Data Buffer 7
HE0D1.HE0R16_HE0T16    6   Hub Endpoint 0 Receive/Transmit Data Buffer 6
HE0D1.HE0R15_HE0T15    5   Hub Endpoint 0 Receive/Transmit Data Buffer 5
HE0D1.HE0R14_HE0T14    4   Hub Endpoint 0 Receive/Transmit Data Buffer 4
HE0D1.HE0R13_HE0T13    3   Hub Endpoint 0 Receive/Transmit Data Buffer 3
HE0D1.HE0R12_HE0T12    2   Hub Endpoint 0 Receive/Transmit Data Buffer 2
HE0D1.HE0R11_HE0T11    1   Hub Endpoint 0 Receive/Transmit Data Buffer 1
HE0D1.HE0R10_HE0T10    0   Hub Endpoint 0 Receive/Transmit Data Buffer 0
HE0D2                 0x0032     USB HUB Endpoint 0 Data Register 2
HE0D2.HE0R27_HE0T27    7   Hub Endpoint 0 Receive/Transmit Data Buffer 7
HE0D2.HE0R26_HE0T26    6   Hub Endpoint 0 Receive/Transmit Data Buffer 6
HE0D2.HE0R25_HE0T25    5   Hub Endpoint 0 Receive/Transmit Data Buffer 5
HE0D2.HE0R24_HE0T24    4   Hub Endpoint 0 Receive/Transmit Data Buffer 4
HE0D2.HE0R23_HE0T23    3   Hub Endpoint 0 Receive/Transmit Data Buffer 3
HE0D2.HE0R22_HE0T22    2   Hub Endpoint 0 Receive/Transmit Data Buffer 2
HE0D2.HE0R21_HE0T21    1   Hub Endpoint 0 Receive/Transmit Data Buffer 1
HE0D2.HE0R20_HE0T20    0   Hub Endpoint 0 Receive/Transmit Data Buffer 0
HE0D3                 0x0033     USB HUB Endpoint 0 Data Register 3
HE0D3.HE0R37_HE0T37    7   Hub Endpoint 0 Receive/Transmit Data Buffer 7
HE0D3.HE0R36_HE0T36    6   Hub Endpoint 0 Receive/Transmit Data Buffer 6
HE0D3.HE0R35_HE0T35    5   Hub Endpoint 0 Receive/Transmit Data Buffer 5
HE0D3.HE0R34_HE0T34    4   Hub Endpoint 0 Receive/Transmit Data Buffer 4
HE0D3.HE0R33_HE0T33    3   Hub Endpoint 0 Receive/Transmit Data Buffer 3
HE0D3.HE0R32_HE0T32    2   Hub Endpoint 0 Receive/Transmit Data Buffer 2
HE0D3.HE0R31_HE0T31    1   Hub Endpoint 0 Receive/Transmit Data Buffer 1
HE0D3.HE0R30_HE0T30    0   Hub Endpoint 0 Receive/Transmit Data Buffer 0
HE0D4                 0x0034     USB HUB Endpoint 0 Data Register 4
HE0D4.HE0R47_HE0T47    7   Hub Endpoint 0 Receive/Transmit Data Buffer 7
HE0D4.HE0R46_HE0T46    6   Hub Endpoint 0 Receive/Transmit Data Buffer 6
HE0D4.HE0R45_HE0T45    5   Hub Endpoint 0 Receive/Transmit Data Buffer 5
HE0D4.HE0R44_HE0T44    4   Hub Endpoint 0 Receive/Transmit Data Buffer 4
HE0D4.HE0R43_HE0T43    3   Hub Endpoint 0 Receive/Transmit Data Buffer 3
HE0D4.HE0R42_HE0T42    2   Hub Endpoint 0 Receive/Transmit Data Buffer 2
HE0D4.HE0R41_HE0T41    1   Hub Endpoint 0 Receive/Transmit Data Buffer 1
HE0D4.HE0R40_HE0T40    0   Hub Endpoint 0 Receive/Transmit Data Buffer 0
HE0D5                 0x0035     USB HUB Endpoint 0 Data Register 5
HE0D5.HE0R57_HE0T57    7   Hub Endpoint 0 Receive/Transmit Data Buffer 7
HE0D5.HE0R56_HE0T56    6   Hub Endpoint 0 Receive/Transmit Data Buffer 6
HE0D5.HE0R55_HE0T55    5   Hub Endpoint 0 Receive/Transmit Data Buffer 5
HE0D5.HE0R54_HE0T54    4   Hub Endpoint 0 Receive/Transmit Data Buffer 4
HE0D5.HE0R53_HE0T53    3   Hub Endpoint 0 Receive/Transmit Data Buffer 3
HE0D5.HE0R52_HE0T52    2   Hub Endpoint 0 Receive/Transmit Data Buffer 2
HE0D5.HE0R51_HE0T51    1   Hub Endpoint 0 Receive/Transmit Data Buffer 1
HE0D5.HE0R50_HE0T50    0   Hub Endpoint 0 Receive/Transmit Data Buffer 0
HE0D6                 0x0036     USB HUB Endpoint 0 Data Register 6
HE0D6.HE0R67_HE0T67    7   Hub Endpoint 0 Receive/Transmit Data Buffer 7
HE0D6.HE0R66_HE0T66    6   Hub Endpoint 0 Receive/Transmit Data Buffer 6
HE0D6.HE0R65_HE0T65    5   Hub Endpoint 0 Receive/Transmit Data Buffer 5
HE0D6.HE0R64_HE0T64    4   Hub Endpoint 0 Receive/Transmit Data Buffer 4
HE0D6.HE0R63_HE0T63    3   Hub Endpoint 0 Receive/Transmit Data Buffer 3
HE0D6.HE0R62_HE0T62    2   Hub Endpoint 0 Receive/Transmit Data Buffer 2
HE0D6.HE0R61_HE0T61    1   Hub Endpoint 0 Receive/Transmit Data Buffer 1
HE0D6.HE0R60_HE0T60    0   Hub Endpoint 0 Receive/Transmit Data Buffer 0
HE0D7                 0x0037     USB HUB Endpoint 0 Data Register 7
HE0D7.HE0R77_HE0T77    7   Hub Endpoint 0 Receive/Transmit Data Buffer 7
HE0D7.HE0R76_HE0T76    6   Hub Endpoint 0 Receive/Transmit Data Buffer 6
HE0D7.HE0R75_HE0T75    5   Hub Endpoint 0 Receive/Transmit Data Buffer 5
HE0D7.HE0R74_HE0T74    4   Hub Endpoint 0 Receive/Transmit Data Buffer 4
HE0D7.HE0R73_HE0T73    3   Hub Endpoint 0 Receive/Transmit Data Buffer 3
HE0D7.HE0R72_HE0T72    2   Hub Endpoint 0 Receive/Transmit Data Buffer 2
HE0D7.HE0R71_HE0T71    1   Hub Endpoint 0 Receive/Transmit Data Buffer 1
HE0D7.HE0R70_HE0T70    0   Hub Endpoint 0 Receive/Transmit Data Buffer 0
PCTL                  0x0038     PLL Control Register
PCTL.PLLIE             7   PLL Interrupt Enable Bit
PCTL.PLLF              6   PLL Interrupt Flag Bit
PCTL.PLLON             5   PLL On Bit
PCTL.BCS               4   Base Clock Select Bit
PBWC                  0x0039     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               5   Acquisition Mode Bit
PBWC.XLD               4   Crystal Loss Detect Bit
PPG                   0x003A     PLL Programming Register
PPG.MUL7               7   Multiplier Select Bits 7
PPG.MUL6               6   Multiplier Select Bits 6
PPG.MUL5               5   Multiplier Select Bits 5
PPG.MUL4               4   Multiplier Select Bits 4
PPG.VRS7               3   VCO Range Select Bits 7
PPG.VRS6               2   VCO Range Select Bits 6
PPG.VRS5               1   VCO Range Select Bits 5
PPG.VRS4               0   VCO Range Select Bits 4
ADSCR                 0x003B     ADC Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADR                   0x003C     ADC Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADICLK                0x003D     ADC Input Clock Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bits 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bits 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bits 0
RESERV003E            0x003E     RESERVED
HVOCR                 0x003F     H & V Sync Output Control Register
HVOCR.DCLKPH1          4   DCLK Output Phase Adjustment 1
HVOCR.DCLKPH0          3   DCLK Output Phase Adjustment 0
HVOCR.HVOCR1           1   Free Running Video Mode Select Bits 1
HVOCR.HVOCR0           0   Free Running Video Mode Select Bits 0
SPCSR                 0x0040     Sync Processor Control and Status Register
SPCSR.VSIE             7   VSync Interrupt Enable
SPCSR.VEDGE            6   VSync Interrupt Edge Select
SPCSR.VSIF             5   VSync Interrupt Flag
SPCSR.COMP             4   Composite Sync Input Enable
SPCSR.VINVO            3   VOUT Signal Polarity
SPCSR.HINVO            2   HOUT Signal Polarity
SPCSR.VPOL             1   Vsync Input Polarity
SPCSR.HPOL             0   Hsync Input Polarity
VFHR                  0x0041     Vertical Frequency High Register
VFHR.VOF               7   Vertical Frequency Counter Overflow
VFHR.CPW1              6   Clamp Pulse Width 1
VFHR.CPW0              5   Clamp Pulse Width 0
VFHR.VF12              4   Vertical Frame Frequency 12
VFHR.VF11              3   Vertical Frame Frequency 11
VFHR.VF10              2   Vertical Frame Frequency 10
VFHR.VF9               1   Vertical Frame Frequency 9
VFHR.VF8               0   Vertical Frame Frequency 8
VFLR                  0x0042     Vertical Frequency Low Register
VFLR.VF7               7   Vertical Frame Frequency 7
VFLR.VF6               6   Vertical Frame Frequency 6
VFLR.VF5               5   Vertical Frame Frequency 5
VFLR.VF4               4   Vertical Frame Frequency 4
VFLR.VF3               3   Vertical Frame Frequency 3
VFLR.VF2               2   Vertical Frame Frequency 2
VFLR.VF1               1   Vertical Frame Frequency 1
VFLR.VF0               0   Vertical Frame Frequency 0
HFHR                  0x0043     Hsync Frequency High Register
HFHR.HFH7              7   Horizontal Line Frequency 7
HFHR.HFH6              6   Horizontal Line Frequency 6
HFHR.HFH5              5   Horizontal Line Frequency 5
HFHR.HFH4              4   Horizontal Line Frequency 4
HFHR.HFH3              3   Horizontal Line Frequency 3
HFHR.HFH2              2   Horizontal Line Frequency 2
HFHR.HFH1              1   Horizontal Line Frequency 1
HFHR.HFH0              0   Horizontal Line Frequency 0
HFLR                  0x0044     Hsync Frequency Low Register
HFLR.HOVER             7   Hsync Frequency Counter Overflow
HFLR.HFL4              4   Horizontal Line Frequency 4
HFLR.HFL3              3   Horizontal Line Frequency 3
HFLR.HFL2              2   Horizontal Line Frequency 2
HFLR.HFL1              1   Horizontal Line Frequency 1
HFLR.HFL0              0   Horizontal Line Frequency 0
SPIOCR                0x0045     Sync Processor I_O Control Register
SPIOCR.VSYNCS          7   VSYNC Input State
SPIOCR.HSYNCS          6   HSYNC Input State
SPIOCR.COINV           5   Clamp Output Invert
SPIOCR.BPOR            1   Back Porch
SPIOCR.SOUT            0   Sync Output Enable
SPCR1                 0x0046     Sync Processor Control Register 1
SPCR1.LVSIE            7   Low VSync Interrupt Enable
SPCR1.LVSIF            6   Low VSync Interrupt Flag
SPCR1.HPS1             5   HSYNC input Detection Pulse Width 1
SPCR1.HPS0             4   HSYNC input Detection Pulse Width 0
SPCR1.ATPOL            1   Auto Polarity
SPCR1.FSHF             0   Fast Horizontal Frequency Count
DCR2                  0x0047     USB Embedded Device Control Register 2
DCR2.ENABLE2           3   Embedded Device Endpoint 2 Enable
DCR2.ENABLE1           2   Embedded Device Endpoint 1 Enable
DCR2.DSTALL2           1   Embedded Device Endpoint 2 Force Stall Bit
DCR2.DSTALL1           0   Embedded Device Endpoint 1 Force Stall Bit
DADDR                 0x0048     USB Embedded Device Address Register
DADDR.DEVEN            7   Enable USB Embedded Device
DADDR.DADD6            6   USB Embedded Device Function Address 6
DADDR.DADD5            5   USB Embedded Device Function Address 5
DADDR.DADD4            4   USB Embedded Device Function Address 4
DADDR.DADD3            3   USB Embedded Device Function Address 3
DADDR.DADD2            2   USB Embedded Device Function Address 2
DADDR.DADD1            1   USB Embedded Device Function Address 1
DADDR.DADD0            0   USB Embedded Device Function Address 0
DIR0                  0x0049     USB Embedded Device Interrupt Register 0
DIR0.TXD0F             7   Embedded Device Endpoint 0 Data Transmit Flag
DIR0.RXD0F             6   Embedded Device Endpoint 0 Data Receive Flag
DIR0.TXD0IE            3   Embedded Device Endpoint 0 Transmit Interrupt Enable
DIR0.RXD0IE            2   Embedded Device Endpoint 0 Receive Interrupt Enable
DIR0.TXD0FR            1   Embedded Device Endpoint 0 Transmit Flag Reset
DIR0.RXD0FR            0   Embedded Device Endpoint 0 Receive Flag Reset
DIR1                  0x004A     USB Embedded Device Interrupt Register 1
DIR1.TXD1F             7   Embedded Device Endpoint 1/2 Data Transmit Flag
DIR1.TXD1IE            3   Embedded Device Endpoint 1/2 Transmit Interrupt Enable
DIR1.TXD1FR            1   Embedded Device Endpoint 1/2 Transmit Flag Reset
DCR0                  0x004B     USB Embedded Device Control Register 0
DCR0.T0SEQ             7   Embedded Device Endpoint 0 Transmit Sequence Bit
DCR0.DSTALL0           6   Embedded Device Endpoint 0 Force Stall Bit
DCR0.TX0E              5   Embedded Device Endpoint 0 Transmit Enable
DCR0.RX0E              4   Embedded Device Endpoint 0 Receive Enable
DCR0.TP0SIZ3           3   Embedded Device Endpoint 0 Transmit Data Packet Size 3
DCR0.TP0SIZ2           2   Embedded Device Endpoint 0 Transmit Data Packet Size 2
DCR0.TP0SIZ1           1   Embedded Device Endpoint 0 Transmit Data Packet Size 1
DCR0.TP0SIZ0           0   Embedded Device Endpoint 0 Transmit Data Packet Size 0
DCR1                  0x004C     USB Embedded Device Control Register 1
DCR1.T1SEQ             7   Embedded Device Endpoint 1/2 Transmit Sequence Bit
DCR1.ENDADD            6   Endpoint Address Select
DCR1.TX1E              5   Embedded Device Endpoint 1/2 Transmit Enable
DCR1.TP1SIZ3           3   Embedded Device Endpoint 1/2 Transmit Data Packet Size 3
DCR1.TP1SIZ2           2   Embedded Device Endpoint 1/2 Transmit Data Packet Size 2
DCR1.TP1SIZ1           1   Embedded Device Endpoint 1/2 Transmit Data Packet Size 1
DCR1.TP1SIZ0           0   Embedded Device Endpoint 1/2 Transmit Data Packet Size 0
DSR                   0x004D     USB Embedded Device Status Register
DSR.DRSEQ              7   Embedded Device Endpoint 0 Receive Sequence Bit
DSR.DSETUP             6   Embedded Device SETUP Token Detect Bit
DSR.DTX1ST             5   Embedded Device Transmit First Flag
DSR.DTX1STR            4   Clear Transmit First Flag
DSR.RP0SIZ3            3   Embedded Device Endpoint 0 Receive Data Packet Size 3
DSR.RP0SIZ2            2   Embedded Device Endpoint 0 Receive Data Packet Size 2
DSR.RP0SIZ1            1   Embedded Device Endpoint 0 Receive Data Packet Size 1
DSR.RP0SIZ0            0   Embedded Device Endpoint 0 Receive Data Packet Size 0
KBSCR                 0x004E     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
KBIER                 0x004F     Keyboard Interrupt Enable Register
KBIER.KBIE7            7   Keyboard Interrupt Enable Bits 7
KBIER.KBIE6            6   Keyboard Interrupt Enable Bits 6
KBIER.KBIE5            5   Keyboard Interrupt Enable Bits 5
KBIER.KBIE4            4   Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Keyboard Interrupt Enable Bits 0
RESERV0050            0x0050     RESERVED
HDP1CR                0x0051     USB HUB Downstream Port 1 Control Register
HDP1CR.PEN1            7   Downstream Port Enable Control Bit
HDP1CR.LOWSP1          6   Full-Speed / Low-Speed Port Control Bit
HDP1CR.RST1            5   Force Reset to the Downstream Port
HDP1CR.RESUM1          4   Force Resume to the Downstream Port
HDP1CR.SUSP1           3   Downstream Port Selective Suspend Bit
HDP1CR.D1_plus         1   Downstream Port Differential Data PLUS
HDP1CR.D1_minus        0   Downstream Port Differential Data MINUS
HDP2CR                0x0052     USB HUB Downstream Port 2 Control Register
HDP2CR.PEN2            7   Downstream Port Enable Control Bit     
HDP2CR.LOWSP2          6   Full-Speed / Low-Speed Port Control Bit
HDP2CR.RST2            5   Force Reset to the Downstream Port     
HDP2CR.RESUM2          4   Force Resume to the Downstream Port    
HDP2CR.SUSP2           3   Downstream Port Selective Suspend Bit  
HDP2CR.D2_plus         1   Downstream Port Differential Data PLUS 
HDP2CR.D2_minus        0   Downstream Port Differential Data MINUS
HDP3CR                0x0053     USB HUB Downstream Port 3 Control Register
HDP3CR.PEN3            7   Downstream Port Enable Control Bit     
HDP3CR.LOWSP3          6   Full-Speed / Low-Speed Port Control Bit
HDP3CR.RST3            5   Force Reset to the Downstream Port     
HDP3CR.RESUM3          4   Force Resume to the Downstream Port    
HDP3CR.SUSP3           3   Downstream Port Selective Suspend Bit  
HDP3CR.D3_plus         1   Downstream Port Differential Data PLUS 
HDP3CR.D3_minus        0   Downstream Port Differential Data MINUS
HDP4CR                0x0054     USB HUB Downstream Port 4 Control Register
HDP4CR.PEN4            7   Downstream Port Enable Control Bit     
HDP4CR.LOWSP4          6   Full-Speed / Low-Speed Port Control Bit
HDP4CR.RST4            5   Force Reset to the Downstream Port     
HDP4CR.RESUM4          4   Force Resume to the Downstream Port    
HDP4CR.SUSP4           3   Downstream Port Selective Suspend Bit  
HDP4CR.D4_plus         1   Downstream Port Differential Data PLUS 
HDP4CR.D4_minus        0   Downstream Port Differential Data MINUS
RESERV0055            0x0055     RESERVED
SIETIR                0x0056     USB SIE Timing Interrupt Register
SIETIR.SOFF            7   Start Of Frame Detect Flag
SIETIR.EOF2F           6   Second End Of Frame Point Flag
SIETIR.EOPF            5   End of Packet Detect Flag
SIETIR.TRANF           4   Bus Signal Transition Detect Flag
SIETIR.SOFIE           3   Start Of Frame Interrupt Enable
SIETIR.EOF2IE          2   The Second End of Frame Point Interrupt Enable
SIETIR.EOPIE           1   End of Packet Detect Interrupt Enable
SIETIR.TRANIE          0   Bus Signal Transition Detect Interrupt Enable
SIETSR                0x0057     USB SIE Timing Status Register
SIETSR.RSTF            7   USB Reset Flag
SIETSR.RSTFR           6   Clear Reset Flag Bit
SIETSR.LOCKF           5   USB Frame Timer Locked
SIETSR.LOCKFR          4   Clear Frame Timer Locked Flag
SIETSR.SOFFR           3   Start Of Frame Flag Reset
SIETSR.EOF2FR          2   The Second End of Frame Point Flag Reset
SIETSR.EOPFR           1   End of Packet Flag Reset
SIETSR.TRANFR          0   Bus Signal Transition Flag Reset
HADDR                 0x0058     USB HUB Address Register
HADDR.USBEN            7   USB Module Enable
HADDR.ADD6             6   USB Hub Function Address 6
HADDR.ADD5             5   USB Hub Function Address 5
HADDR.ADD4             4   USB Hub Function Address 4
HADDR.ADD3             3   USB Hub Function Address 3
HADDR.ADD2             2   USB Hub Function Address 2
HADDR.ADD1             1   USB Hub Function Address 1
HADDR.ADD0             0   USB Hub Function Address 0
HIR0                  0x0059     USB HUB Interrupt Register 0
HIR0.TXDF              7   Hub Endpoint 0 Data Transmit Flag
HIR0.RXDF              6   Hub Endpoint 0 Data Receive Flag
HIR0.TXDIE             3   Hub Endpoint 0 Transmit Interrupt Enable
HIR0.RXDIE             2   Hub Endpoint 0 Receive Interrupt Enable
HIR0.TXDFR             1   Hub Endpoint 0 Transmit Flag Reset
HIR0.RXDFR             0   Hub Endpoint 0 Receive Flag Reset
RESERV005A            0x005A     RESERVED
HCR0                  0x005B     USB HUB Control Register 0
HCR0.TSEQ              7   Hub Endpoint 0 Transmit Sequence Bit
HCR0.STALL0            6   Hub Endpoint 0 Force Stall Bit
HCR0.TXE               5   Hub Endpoint 0 Transmit Enable
HCR0.RXE               4   Hub Endpoint 0 Receive Enable
HCR0.TPSIZ3            3   Hub Endpoint 0 Transmit Data Packet Size 3
HCR0.TPSIZ2            2   Hub Endpoint 0 Transmit Data Packet Size 2
HCR0.TPSIZ1            1   Hub Endpoint 0 Transmit Data Packet Size 1
HCR0.TPSIZ0            0   Hub Endpoint 0 Transmit Data Packet Size 0
HCDR                  0x005C     USB HUB Endpoint 1 Control and Data Register
HCDR.STALL1            7   Hub Endpoint 1 Force Stall Bit
HCDR.PNEW              6   Port New Status Change
HCDR.PCHG5             5   Hub and Port Status Change Bitmap 5
HCDR.PCHG4             4   Hub and Port Status Change Bitmap 4
HCDR.PCHG3             3   Hub and Port Status Change Bitmap 3
HCDR.PCHG2             2   Hub and Port Status Change Bitmap 2
HCDR.PCHG1             1   Hub and Port Status Change Bitmap 1
HCDR.PCHG0             0   Hub and Port Status Change Bitmap 0
HSR                   0x005D     USB HUB Status Register
HSR.RSEQ               7   Hub Endpoint 0 Receive Sequence Bit
HSR.SETUP              6   Hub SETUP Token Detect Bit
HSR.TX1ST              5   Hub Transmit First Flag
HSR.TX1STR             4   Clear Hub Transmit First Flag
HSR.RPSIZ3             3   Hub Endpoint 0 Receive Data Packet Size 3
HSR.RPSIZ2             2   Hub Endpoint 0 Receive Data Packet Size 2
HSR.RPSIZ1             1   Hub Endpoint 0 Receive Data Packet Size 1
HSR.RPSIZ0             0   Hub Endpoint 0 Receive Data Packet Size 0
HRPCR                 0x005E     USB HUB Root Port Control Register
HRPCR.RESUM0           4   Force Resume to the Root Port
HRPCR.SUSPND           3   USB Suspend Control Bit
HRPCR.D0_plus          1   Root Port Differential Data PLUS
HRPCR.D0_minus         0   Root Port Differential Data MINUS
RESERV005F            0x005F     RESERVED
OSDCR                 0x0060     OSD Control Register
OSDCR.OSDMEN           7   OSD Memory Enable
OSDCR.OSDRST           5   OSD Module Reset
OSDCR.CLKINV           4   Pixel Clock Inversion
OSDCR.CLKPH1           3   Pixel Clock Phase Adjustment 1
OSDCR.CLKPH0           2   Pixel Clock Phase Adjustment 0
OSDCR.HALFCLK          1   Half Frequency of Pixel Clock
OSDCR.OSDIEN           0   OSD Interrupt Enable
OSDSR                 0x0061     OSD Status Register
OSDSR.WRDY             7   OSD Buffer Write Ready
OSDSR.DENDIF           0   OSD Display End Interrupt Flag
OSDDRL                0x0062     OSD Data Register Low
OSDDRL.OSDD7           7   OSD RAM 16-Bit Data Buffer 7
OSDDRL.OSDD6           6   OSD RAM 16-Bit Data Buffer 6
OSDDRL.OSDD5           5   OSD RAM 16-Bit Data Buffer 5
OSDDRL.OSDD4           4   OSD RAM 16-Bit Data Buffer 4
OSDDRL.OSDD3           3   OSD RAM 16-Bit Data Buffer 3
OSDDRL.OSDD2           2   OSD RAM 16-Bit Data Buffer 2
OSDDRL.OSDD1           1   OSD RAM 16-Bit Data Buffer 1
OSDDRL.OSDD0           0   OSD RAM 16-Bit Data Buffer 0
OSDDRH                0x0063     OSD Data Register High
OSDDRH.OSDD15          7   OSD RAM 16-Bit Data Buffer 15
OSDDRH.OSDD14          6   OSD RAM 16-Bit Data Buffer 14
OSDDRH.OSDD13          5   OSD RAM 16-Bit Data Buffer 13
OSDDRH.OSDD12          4   OSD RAM 16-Bit Data Buffer 12
OSDDRH.OSDD11          3   OSD RAM 16-Bit Data Buffer 11
OSDDRH.OSDD10          2   OSD RAM 16-Bit Data Buffer 10
OSDDRH.OSDD9           1   OSD RAM 16-Bit Data Buffer 9
OSDDRH.OSDD8           0   OSD RAM 16-Bit Data Buffer 8
OSDRAR                0x0064     OSD Row Address Register
OSDRAR.ROWA3           3   OSD RAM Row Address 3
OSDRAR.ROWA2           2   OSD RAM Row Address 2
OSDRAR.ROWA1           1   OSD RAM Row Address 1
OSDRAR.ROWA0           0   OSD RAM Row Address 0
OSDCAR                0x0065     OSD Column Address Register
OSDCAR.COLA4           4   OSD RAM Column Address 4
OSDCAR.COLA3           3   OSD RAM Column Address 3
OSDCAR.COLA2           2   OSD RAM Column Address 2
OSDCAR.COLA1           1   OSD RAM Column Address 1
OSDCAR.COLA0           0   OSD RAM Column Address 0
OSDEHBUF              0x0066     OSD FLASH Even High Byte Write Buffer
OSDEHBUF.DOT15         7   OSD FLASH Even High Byte Buffer 15
OSDEHBUF.DOT14         6   OSD FLASH Even High Byte Buffer 14
OSDEHBUF.DOT13         5   OSD FLASH Even High Byte Buffer 13
OSDEHBUF.DOT12         4   OSD FLASH Even High Byte Buffer 12
OSDEHBUF.DOT11         3   OSD FLASH Even High Byte Buffer 11
OSDEHBUF.DOT10         2   OSD FLASH Even High Byte Buffer 10
OSDEHBUF.DOT9          1   OSD FLASH Even High Byte Buffer 9
OSDEHBUF.DOT8          0   OSD FLASH Even High Byte Buffer 8
RESERV0067            0x0067     RESERVED
PECR                  0x0068     Port E Control Register
PECR.USBDS4E           3   USB HUB Data Pins Enable 4
PECR.USBDS3E           2   USB HUB Data Pins Enable 3
PECR.USBDS2E           1   USB HUB Data Pins Enable 2
PECR.USBDS1E           0   USB HUB Data Pins Enable 1
PDCR                  0x0069     Port D Control Register
PDCR.IICDATE           7   MMIIC Data Pin Enable
PDCR.IICSCLE           6   MMIIC Clock Pin Enable
PDCR.DDCDATE           5   DDC Data Pin Enable
PDCR.DDCSCLE           4   DDC Clock Pin Enable
PDCR.HOUTE             3   HOUT Pin Enable
PDCR.VOUTE             2   VOUT Pin Enable
PDCR.DEE               1   DE Pin Enable
PDCR.DCLKE             0   DCLK Pin Enable
MIMCR                 0x006A     Multi-Master IIC Master Control Register
MIMCR.MMALIF           7   Multi-Master Arbitration Lost Interrupt Flag
MIMCR.MMNAKIF          6   No Acknowledge Interrupt Flag
MIMCR.MMBB             5   Bus Busy Flag
MIMCR.MMAST            4   Master Control Bit
MIMCR.MMRW             3   Master Read/Write
MIMCR.MMBR2            2   Baud Rate Select 2
MIMCR.MMBR1            1   Baud Rate Select 1
MIMCR.MMBR0            0   Baud Rate Select 0
MMADR                 0x006B     Multi-Master IIC Address Register
MMADR.MMAD7            7   Multi-Master Address 7
MMADR.MMAD6            6   Multi-Master Address 6
MMADR.MMAD5            5   Multi-Master Address 5
MMADR.MMAD4            4   Multi-Master Address 4
MMADR.MMAD3            3   Multi-Master Address 3
MMADR.MMAD2            2   Multi-Master Address 2
MMADR.MMAD1            1   Multi-Master Address 1
MMADR.MMEXTAD          0   Multi-Master Expanded Address
MMCR                  0x006C     Multi-Master IIC Control Register
MMCR.MMEN              7   Multi-Master IIC Enable
MMCR.MMIEN             6   Multi-Master IIC Interrupt Enable
MMCR.MMTXAK            3   Transmit Acknowledge Enable
MMSR                  0x006D     Multi-Master IIC Status Register
MMSR.MMRXIF            7   Multi-Master IIC Receive Interrupt Flag
MMSR.MMTXIF            6   Multi-Master Transmit Interrupt Flag
MMSR.MMATCH            5   Multi-Master Address Match
MMSR.MMSRW             4   Multi-Master Slave Read/Write
MMSR.MMRXAK            3   Multi-Master Receive Acknowledge
MMSR.MMTXBE            1   Multi-Master Transmit Buffer Empty
MMSR.MMRXBF            0   Multi-Master Receive Buffer Full
MMDTR                 0x006E     Multi-Master IIC Data Transmit Register
MMDTR.MMTD7            7
MMDTR.MMTD6            6
MMDTR.MMTD5            5
MMDTR.MMTD4            4
MMDTR.MMTD3            3
MMDTR.MMTD2            2
MMDTR.MMTD1            1
MMDTR.MMTD0            0
MMDRR                 0x006F     Multi-Master IIC Data Receive Register
MMDRR.MMRD7            7
MMDRR.MMRD6            6
MMDRR.MMRD5            5
MMDRR.MMRD4            4
MMDRR.MMRD3            3
MMDRR.MMRD2            2
MMDRR.MMRD1            1
MMDRR.MMRD0            0
0PWM                  0x0070     PWM0 Data Register
0PWM.0PWM4             7   PWM Bits 4
0PWM.0PWM3             6   PWM Bits 3
0PWM.0PWM2             5   PWM Bits 2
0PWM.0PWM1             4   PWM Bits 1
0PWM.0PWM0             3   PWM Bits 0
0PWM.0BRM2             2   Binary Rate Multiplier Bits 2
0PWM.0BRM1             1   Binary Rate Multiplier Bits 1
0PWM.0BRM0             0   Binary Rate Multiplier Bits 0
1PWM                  0x0071     PWM1 Data Register
1PWM.1PWM4             7   PWM Bits 4                   
1PWM.1PWM3             6   PWM Bits 3                   
1PWM.1PWM2             5   PWM Bits 2                   
1PWM.1PWM1             4   PWM Bits 1                   
1PWM.1PWM0             3   PWM Bits 0                   
1PWM.1BRM2             2   Binary Rate Multiplier Bits 2
1PWM.1BRM1             1   Binary Rate Multiplier Bits 1
1PWM.1BRM0             0   Binary Rate Multiplier Bits 0
2PWM                  0x0072     PWM2 Data Register
2PWM.2PWM4             7   PWM Bits 4                   
2PWM.2PWM3             6   PWM Bits 3                   
2PWM.2PWM2             5   PWM Bits 2                   
2PWM.2PWM1             4   PWM Bits 1                   
2PWM.2PWM0             3   PWM Bits 0                   
2PWM.2BRM2             2   Binary Rate Multiplier Bits 2
2PWM.2BRM1             1   Binary Rate Multiplier Bits 1
2PWM.2BRM0             0   Binary Rate Multiplier Bits 0
3PWM                  0x0073     PWM3 Data Register
3PWM.3PWM4             7   PWM Bits 4                   
3PWM.3PWM3             6   PWM Bits 3                   
3PWM.3PWM2             5   PWM Bits 2                   
3PWM.3PWM1             4   PWM Bits 1                   
3PWM.3PWM0             3   PWM Bits 0                   
3PWM.3BRM2             2   Binary Rate Multiplier Bits 2
3PWM.3BRM1             1   Binary Rate Multiplier Bits 1
3PWM.3BRM0             0   Binary Rate Multiplier Bits 0
4PWM                  0x0074     PWM4 Data Register
4PWM.4PWM4             7   PWM Bits 4                   
4PWM.4PWM3             6   PWM Bits 3                   
4PWM.4PWM2             5   PWM Bits 2                   
4PWM.4PWM1             4   PWM Bits 1                   
4PWM.4PWM0             3   PWM Bits 0                   
4PWM.4BRM2             2   Binary Rate Multiplier Bits 2
4PWM.4BRM1             1   Binary Rate Multiplier Bits 1
4PWM.4BRM0             0   Binary Rate Multiplier Bits 0
5PWM                  0x0075     PWM5 Data Register
5PWM.5PWM4             7   PWM Bits 4                   
5PWM.5PWM3             6   PWM Bits 3                   
5PWM.5PWM2             5   PWM Bits 2                   
5PWM.5PWM1             4   PWM Bits 1                   
5PWM.5PWM0             3   PWM Bits 0                   
5PWM.5BRM2             2   Binary Rate Multiplier Bits 2
5PWM.5BRM1             1   Binary Rate Multiplier Bits 1
5PWM.5BRM0             0   Binary Rate Multiplier Bits 0
6PWM                  0x0076     PWM6 Data Register
6PWM.6PWM4             7   PWM Bits 4                   
6PWM.6PWM3             6   PWM Bits 3                   
6PWM.6PWM2             5   PWM Bits 2                   
6PWM.6PWM1             4   PWM Bits 1                   
6PWM.6PWM0             3   PWM Bits 0                   
6PWM.6BRM2             2   Binary Rate Multiplier Bits 2
6PWM.6BRM1             1   Binary Rate Multiplier Bits 1
6PWM.6BRM0             0   Binary Rate Multiplier Bits 0
7PWM                  0x0077     PWM7 Data Register
7PWM.7PWM4             7   PWM Bits 4                   
7PWM.7PWM3             6   PWM Bits 3                   
7PWM.7PWM2             5   PWM Bits 2                   
7PWM.7PWM1             4   PWM Bits 1                   
7PWM.7PWM0             3   PWM Bits 0                   
7PWM.7BRM2             2   Binary Rate Multiplier Bits 2
7PWM.7BRM1             1   Binary Rate Multiplier Bits 1
7PWM.7BRM0             0   Binary Rate Multiplier Bits 0
PWMCR                 0x0078     PWM Control Register
PWMCR.PWM7E            7   PWM Output Enable 7
PWMCR.PWM6E            6   PWM Output Enable 6
PWMCR.PWM5E            5   PWM Output Enable 5
PWMCR.PWM4E            4   PWM Output Enable 4
PWMCR.PWM3E            3   PWM Output Enable 3
PWMCR.PWM2E            2   PWM Output Enable 2
PWMCR.PWM1E            1   PWM Output Enable 1
PWMCR.PWM0E            0   PWM Output Enable 0
RESERV0079            0x0079     RESERVED
RESERV007A            0x007A     RESERVED
RESERV007B            0x007B     RESERVED
RESERV007C            0x007C     RESERVED
RESERV007D            0x007D     RESERVED
RESERV007E            0x007E     RESERVED
RESERV007F            0x007F     RESERVED
SBSR                  0xFE00     SIM Break Status Register
SBSR.SBSW              1   SIM Break Stop/Wait Bit
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Bit
SRSR.PIN               6   External Reset Bit
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit (opcode fetches only)
SRSR.USB               2   Universal Serial Bus Reset Bit
ReservFE02            0xFE02     Reserved
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF6               7   Interrupt Flags 6
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF2               3   Interrupt Flags 2
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flags 14
INT2.IF13              6   Interrupt Flags 13
INT2.IF12              5   Interrupt Flags 12
INT2.IF11              4   Interrupt Flags 11
INT2.IF10              3   Interrupt Flags 10
INT2.IF9               2   Interrupt Flags 9
INT2.IF8               1   Interrupt Flags 8
INT2.IF7               0   Interrupt Flags 7
ReservFE06            0xFE06     Reserved
FLCR                  0xFE07     47,616 Bytes FLASH Control Register
FLCR.HVEN              3   High-Voltage Enable Bit
FLCR.MASS              2   Mass Erase Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
FLBPR                 0xFE08     47,616 Bytes FLASH Block Protect Register
FLBPR.BPR7             7   FLASH Block Protect Bits 7
FLBPR.BPR6             6   FLASH Block Protect Bits 6
FLBPR.BPR5             5   FLASH Block Protect Bits 5
FLBPR.BPR4             4   FLASH Block Protect Bits 4
FLBPR.BPR3             3   FLASH Block Protect Bits 3
FLBPR.BPR2             2   FLASH Block Protect Bits 2
FLBPR.BPR1             1   FLASH Block Protect Bits 1
ReservFE09            0xFE09     Reserved
FLCR1                 0xFE0A     13k-Bytes FLASH Control Register
FLCR1.HVEN1            3   High-Voltage Enable Bit 1
FLCR1.MASS1            2   Mass Erase Control Bit 1
FLCR1.ERASE1           1   Erase Control Bit 1     
FLCR1.PGM1             0   Program Control Bit 1   
FLBPR1                0xFE0B     13k-Bytes FLASH Block Protect Register
FLBPR1.BPR17           7   FLASH Block Protect Bits 7
FLBPR1.BPR16           6   FLASH Block Protect Bits 6
FLBPR1.BPR15           5   FLASH Block Protect Bits 5
FLBPR1.BPR14           4   FLASH Block Protect Bits 4
FLBPR1.BPR13           3   FLASH Block Protect Bits 3
FLBPR1.BPR12           2   FLASH Block Protect Bits 2
FLBPR1.BPR11           1   FLASH Block Protect Bits 1
BRKH                  0xFE0C     Break Address High Register
BRKL                  0xFE0D     Break Address Low Register
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
COPCTL                0xFFFF     COP Control Register


.68HC908MR16
; MC68HC908MR32/D  http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=68HC908MR16&nodeId=01M98634
; MC68HC908MR32.pdf

; 32 Kbytes of FLASH
; 768 bytes of random-access memory (RAM)
; 46 bytes of user-defined vectors
; 240 bytes of monitor read-only memory (ROM)


; MEMORY MAP
area DATA FSR		   0x0000:0x0060
area DATA RAM		   0x0060:0x0360
area BSS  UNIMPLEMENTED	   0x0360:0x8000
area DATA FLASH		   0x8000:0xBF00
area BSS  UNIMPLEMENTED	   0xBF00:0xFE00
area DATA FSR_1		   0xFE00:0xFE10
area DATA MONITOR_ROM	   0xFE10:0xFF00
area BSS  UNIMPLEMENTED	   0xFF00:0xFF7E
area DATA FSR_2		   0xFF7E:0xFF7F
area BSS  UNIMPLEMENTED	   0xFF7F:0xFFD2
area DATA USER_VEC	   0xFFD2:0x10000


; Interrupt and reset vector assignments
interrupt __RESET      0xFFFE       Reset vector
interrupt SWI          0xFFFC       SWI vector
interrupt IRQ          0xFFFA       IRQ vector
interrupt PLL          0xFFF8       PLL vector
interrupt FAULT_1      0xFFF6       FAULT 1
interrupt FAULT_2      0xFFF4       FAULT 2
interrupt FAULT_3      0xFFF2       FAULT 3
interrupt FAULT_4      0xFFF0       FAULT 4
interrupt PWMMC        0xFFEE       PWMMC vector
interrupt TIM_A_CH0    0xFFEC       TIM A channel 0 vector
interrupt TIM_A_CH1    0xFFEA       TIM A channel 1 vector
interrupt TIM_A_CH2    0xFFE8       TIM A channel 2 vector
interrupt TIM_A_CH3    0xFFE6       TIM A channel 3 vector
interrupt TIM_A        0xFFE4       TIM A overflow vector
interrupt TIM_B_CH0    0xFFE2       TIM B channel 0 vector
interrupt TIM_B_CH1    0xFFE0       TIM B channel 1 vector
interrupt TIM_B        0xFFDE       TIM B overflow vector
interrupt A_D          0xFFDC       A/D vector
interrupt SPI_R        0xFFDA       SPI receive vector
interrupt SPI_T        0xFFD8       SPI transmit vector
interrupt SCI_E        0xFFD6       SCI error vector
interrupt SCI_R        0xFFD4       SCI receive vector
interrupt SCI_T        0xFFD2       SCI transmit vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bits 7
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
PTC                   0x0002     Port C Data Register
PTC.PTC6               6   Port C Data Bits 6
PTC.PTC5               5   Port C Data Bits 5
PTC.PTC4               4   Port C Data Bits 4
PTC.PTC3               3   Port C Data Bits 3
PTC.PTC2               2   Port C Data Bits 2
PTC.PTC1               1   Port C Data Bits 1
PTC.PTC0               0   Port C Data Bits 0
PTD                   0x0003     Port D Data Register
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bits 7
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
DDRC                  0x0006     Data Direction Register C
DDRC.DDRC6             6   Data Direction Register C Bits 6
DDRC.DDRC5             5   Data Direction Register C Bits 5
DDRC.DDRC4             4   Data Direction Register C Bits 4
DDRC.DDRC3             3   Data Direction Register C Bits 3
DDRC.DDRC2             2   Data Direction Register C Bits 2
DDRC.DDRC1             1   Data Direction Register C Bits 1
DDRC.DDRC0             0   Data Direction Register C Bits 0
RESERV0007            0x0007     RESERVED
PTE                   0x0008     Port E Data Register
PTE.PTE7               7   Port E Data Bits 7
PTE.PTE6               6   Port E Data Bits 6
PTE.PTE5               5   Port E Data Bits 5
PTE.PTE4               4   Port E Data Bits 4
PTE.PTE3               3   Port E Data Bits 3
PTE.PTE2               2   Port E Data Bits 2
PTE.PTE1               1   Port E Data Bits 1
PTE.PTE0               0   Port E Data Bits 0
PTF                   0x0009     Port F Data Register
PTF.PTF5               5   Port F Data Bits 5
PTF.PTF4               4   Port F Data Bits 4
PTF.PTF3               3   Port F Data Bits 3
PTF.PTF2               2   Port F Data Bits 2
PTF.PTF1               1   Port F Data Bits 1
PTF.PTF0               0   Port F Data Bits 0
RESERV000A            0x000A     RESERVED
RESERV000B            0x000B     RESERVED
DDRE                  0x000C     Data Direction Register E
DDRE.DDRE7             7   Data Direction Register E Bits 7
DDRE.DDRE6             6   Data Direction Register E Bits 6
DDRE.DDRE5             5   Data Direction Register E Bits 5
DDRE.DDRE4             4   Data Direction Register E Bits 4
DDRE.DDRE3             3   Data Direction Register E Bits 3
DDRE.DDRE2             2   Data Direction Register E Bits 2
DDRE.DDRE1             1   Data Direction Register E Bits 1
DDRE.DDRE0             0   Data Direction Register E Bits 0
DDRF                  0x000D     Data Direction Register F
DDRF.DDRF5             5   Data Direction Register F Bits 5
DDRF.DDRF4             4   Data Direction Register F Bits 4
DDRF.DDRF3             3   Data Direction Register F Bits 3
DDRF.DDRF2             2   Data Direction Register F Bits 2
DDRF.DDRF1             1   Data Direction Register F Bits 1
DDRF.DDRF0             0   Data Direction Register F Bits 0
TASC                  0x000E     TIMA Status_Control Register
TASC.TOF               7   TIMA Overflow Flag
TASC.TOIE              6   TIMA Overflow Interrupt Enable Bit
TASC.TSTOP             5   TIMA Stop Bit
TASC.TRST              4   TIMA Reset Bit
TASC.PS2               2   Prescaler Select Bits 2
TASC.PS1               1   Prescaler Select Bits 1
TASC.PS0               0   Prescaler Select Bits 0
TACNTH                0x000F     TIMA Counter Register High
TACNTL                0x0010     TIMA Counter Register Low
TAMODH                0x0011     TIMA Counter Modulo Register High
TAMODL                0x0012     TIMA Counter Modulo Register Low
TASC0                 0x0013     TIMA Channel 0 Status_Control Register
TASC0.CH0F             7   Channel 0 Flag Bit
TASC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TASC0.MS0B             5   Mode Select Bit B
TASC0.MS0A             4   Mode Select Bit A
TASC0.ELS0B            3   Edge/Level Select Bits
TASC0.ELS0A            2   Edge/Level Select Bits
TASC0.TOV0             1   Toggle-On-Overflow Bit
TASC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TACH0H                0x0014     TIMA Channel 0 Register High
TACH0L                0x0015     TIMA Channel 0 Register Low
TASC1                 0x0016     TIMA Channel 1 Status_Control Register
TASC1.CH1F             7   Channel 1 Flag Bit            
TASC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TASC1.MS1A             4   Mode Select Bit A               
TASC1.ELS1B            3   Edge/Level Select Bits          
TASC1.ELS1A            2   Edge/Level Select Bits          
TASC1.TOV1             1   Toggle-On-Overflow Bit          
TASC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TACH1H                0x0017     TIMA Channel 1 Register High
TACH1L                0x0018     TIMA Channel 1 Register Low
TASC2                 0x0019     TIMA Channel 2 Status_Control Register
TASC2.CH2F             7   Channel 2 Flag Bit              
TASC2.CH2IE            6   Channel 2 Interrupt Enable Bit  
TASC2.MS2B             5   Mode Select Bit B               
TASC2.MS2A             4   Mode Select Bit A               
TASC2.ELS2B            3   Edge/Level Select Bits          
TASC2.ELS2A            2   Edge/Level Select Bits          
TASC2.TOV2             1   Toggle-On-Overflow Bit          
TASC2.CH2MAX           0   Channel 2 Maximum Duty Cycle Bit
TACH2H                0x001A     TIMA Channel 2 Register High
TACH2L                0x001B     TIMA Channel 2 Register Low
TASC3                 0x001C     TIMA Channel 3 Status_Control Register
TASC3.CH3F             7   Channel 3 Flag Bit              
TASC3.CH3IE            6   Channel 3 Interrupt Enable Bit  
TASC3.MS3A             4   Mode Select Bit A               
TASC3.ELS3B            3   Edge/Level Select Bits          
TASC3.ELS3A            2   Edge/Level Select Bits          
TASC3.TOV3             1   Toggle-On-Overflow Bit          
TASC3.CH3MAX           0   Channel 3 Maximum Duty Cycle Bit
TACH3H                0x001D     TIMA Channel 3 Register High
TACH3L                0x001E     TIMA Channel 3 Register Low
CONFIG                0x001F     Configuration Register
CONFIG.EDGE            7   Edge-Align Enable Bit
CONFIG.BOTNEG          6   Bottom-Side PWM Polarity Bit
CONFIG.TOPNEG          5   Top-Side PWM Polarity Bit
CONFIG.INDEP           4   Independent Mode Enable Bit
CONFIG.LVIRST          3   LVI Reset Enable Bit
CONFIG.LVIPWR          2   LVI Power Enable Bit
CONFIG.STOPE           1   Stop Enable Bit
CONFIG.COPD            0   COP Disable Bit
PCTL1                 0x0020     PWM Control Register 1
PCTL1.DISX             7   Software Disable Bit for Bank X Bit
PCTL1.DISY             6   Software Disable Bit for Bank Y Bit
PCTL1.PWMINT           5   PWM Interrupt Enable Bit
PCTL1.PWMF             4   PWM Reload Flag
PCTL1.ISENS1           3   Current Sense Correction Bits 1
PCTL1.ISENS0           2   Current Sense Correction Bits 0
PCTL1.LDOK             1   Load OK Bit
PCTL1.PWMEN            0   PWM Module Enable Bit
PCTL2                 0x0021     PWM Control Register 2
PCTL2.LDFQ1            7   PWM Load Frequency Bits 1
PCTL2.LDFQ0            6   PWM Load Frequency Bits 0
PCTL2.IPOL1            4   Top/Bottom Correction Bit for PWM Pair 1 (PWMs 1 and 2)
PCTL2.IPOL2            3   Top/Bottom Correction Bit for PWM Pair 2 (PWMs 3 and 4)
PCTL2.IPOL3            2   Top/Bottom Correction Bit for PWM Pair 3 (PWMs 5 and 6)
PCTL2.PRSC1            1   PWM Prescaler Bits 1
PCTL2.PRSC0            0   PWM Prescaler Bits 0
FCR                   0x0022     Fault Control Register
FCR.FINT4              7   Fault 4 Interrupt Enable Bit
FCR.FMODE4             6   Fault Mode Selection for Fault Pin 4 Bit
FCR.FINT3              5   Fault 3 Interrupt Enable Bit
FCR.FMODE3             4   Fault Mode Selection for Fault Pin 3 Bit
FCR.FINT2              3   Fault 2 Interrupt Enable Bit
FCR.FMODE2             2   Fault Mode Selection for Fault Pin 2 Bit
FCR.FINT1              1   Fault 1 Interrupt Enable Bit
FCR.FMODE1             0   Fault Mode Selection for Fault Pin 1 Bit
_FSR_                 0x0023     Fault Status Register
_FSR_.FPIN4            7   State of Fault Pin 4 Bit
_FSR_.FFLAG4           6   Fault Event Flag 4
_FSR_.FPIN3            5   State of Fault Pin 3 Bit
_FSR_.FFLAG3           4   Fault Event Flag 3
_FSR_.FPIN2            3   State of Fault Pin 2 Bit
_FSR_.FFLAG2           2   Fault Event Flag 2
_FSR_.FPIN1            1   State of Fault Pin 1 Bit
_FSR_.FFLAG1           0   Fault Event Flag 1
FTACK                 0x0024     Fault Acknowledge Register
FTACK.FTACK4           6   Fault Acknowledge 4 Bit
FTACK.DT6              5   Dead-Time 6 Bit
FTACK.DT5_FTACK3       4   Dead-Time 5 Bit/Fault Acknowledge 3 Bit
FTACK.DT4              3   Dead-Time 4 Bit
FTACK.DT3_FTACK2       2   Dead-Time 3 Bit/Fault Acknowledge 2 Bit
FTACK.DT2              1   Dead-Time 2 Bit
FTACK.DT1_FTACK1       0   Dead-Time 1 Bit/Fault Acknowledge 1 Bit
PWMOUT                0x0025     PWM Output Control Register
PWMOUT.OUTCTL          6   Output Control Enable Bit
PWMOUT.OUT6            5   PWM Pin Output Control Bits 6
PWMOUT.OUT5            4   PWM Pin Output Control Bits 5
PWMOUT.OUT4            3   PWM Pin Output Control Bits 4
PWMOUT.OUT3            2   PWM Pin Output Control Bits 3
PWMOUT.OUT2            1   PWM Pin Output Control Bits 2
PWMOUT.OUT1            0   PWM Pin Output Control Bits 1
PCNTH                 0x0026     PWM Counter Register High
PCNTL                 0x0027     PWM Counter Register Low
PMODH                 0x0028     PWM Counter Modulo Register High
PMODL                 0x0029     PWM Counter Modulo Register Low
PVAL1H                0x002A     PWM 1 Value Register High
PVAL1L                0x002B     PWM 1 Value Register Low
PVAL2H                0x002C     PWM 2 Value Register High
PVAL2L                0x002D     PWM 2 Value Register Low
PVAL3H                0x002E     PWM 3 Value Register High
PVAL3L                0x002F     PWM 3 Value Register Low
PVAL4H                0x0030     PWM 4 Value Register High
PVAL4L                0x0031     PWM 4 Value Register Low
PMVAL5H               0x0032     PWM 5 Value Register High
PVAL5L                0x0033     PWM 5 Value Register Low
PVAL6H                0x0034     PWM 6 Value Register High
PMVAL6L               0x0035     PWM 6 Value Register Low
DEADTM                0x0036     Dead-Time Write-Once Register
DISMAP                0x0037     PWM Disable Mapping Write-Once Register
SCC1                  0x0038     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit
SCC1.ENSCI             6   Enable SCI Bit
SCC1.TXINV             5   Transmit Inversion Bit
SCC1.M                 4   Mode (Character Length) Bit
SCC1.WAKE              3   Wakeup Condition Bit
SCC1.ILTY              2   Idle Line Type Bit
SCC1.PEN               1   Parity Enable Bit
SCC1.PTY               0   Parity Bit
SCC2                  0x0039     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit
SCC2.ILIE              4   Idle Line Interrupt Enable Bit
SCC2.TE                3   Transmitter Enable Bit
SCC2.RE                2   Receiver Enable Bit
SCC2.RWU               1   Receiver Wakeup Bit
SCC2.SBK               0   Send Break Bit
SCC3                  0x003A     SCI Control Register 3
SCC3.R8                7   Received Bit 8
SCC3.T8                6   Transmitted Bit 8
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit
SCS1                  0x003B     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit
SCS1.TC                6   Transmission Complete Bit
SCS1.SCRF              5   SCI Receiver Full Bit
SCS1.IDLE              4   Receiver Idle Bit
SCS1.OR                3   Receiver Overrun Bit
SCS1.NF                2   Receiver Noise Flag Bit
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit
SCS2                  0x003C     SCI Status Register 2
SCS2.BKF               1   Break Flag
SCS2.RPF               0   Reception-in-Progress Flag
SCDR                  0x003D     SCI Data Register
SCDR.R7_T7             7   Receive/Transmit Data Bits 7
SCDR.R6_T6             6   Receive/Transmit Data Bits 6
SCDR.R5_T5             5   Receive/Transmit Data Bits 5
SCDR.R4_T4             4   Receive/Transmit Data Bits 4
SCDR.R3_T3             3   Receive/Transmit Data Bits 3
SCDR.R2_T2             2   Receive/Transmit Data Bits 2
SCDR.R1_T1             1   Receive/Transmit Data Bits 1
SCDR.R0_T0             0   Receive/Transmit Data Bits 0
SCBR                  0x003E     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2
SCBR.SCR1              1   SCI Baud Rate Select Bits 1
SCBR.SCR0              0   SCI Baud Rate Select Bits 0
ISCR                  0x003F     IRQ Status_Control Register
ISCR.IRQF              3   IRQ Flag
ISCR.ACK1              2   IRQ Interrupt Request Acknowledge Bit
ISCR.IMASK1            1   IRQ Interrupt Mask Bit
ISCR.MODE1             0   IRQ Edge/Level Select Bit
ADSCR                 0x0040     ADC Status and Control Register
ADSCR.COCO_IDMAS       7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADRH                  0x0041     ADC Data Register High Right Justified Mode
ADRH.AD9               1
ADRH.AD8               0
ADRL                  0x0042     ADC Data Register Low Right Justified Mode
ADRL.AD7               7
ADRL.AD6               6
ADRL.AD5               5
ADRL.AD4               4
ADRL.AD3               3
ADRL.AD2               2
ADRL.AD1               1
ADRL.AD0               0
ADCLK                 0x0043     ADC Clock Register
ADCLK.ADIV2            7   ADC Clock Prescaler Bits 2
ADCLK.ADIV1            6   ADC Clock Prescaler Bits 1
ADCLK.ADIV0            5   ADC Clock Prescaler Bits 0
ADCLK.ADICLK           4   ADC Input Clock Select Bit
ADCLK.MODE1            3   Modes of Result Justification Bits 1
ADCLK.MODE0            2   Modes of Result Justification Bits 0
SPCR                  0x0044     SPI Control Register
SPCR.SPRIE             7   SPI Receiver Interrupt Enable Bit
SPCR.SPMSTR            5   SPI Master Bit
SPCR.CPOL              4   Clock Polarity Bit
SPCR.CPHA              3   Clock Phase Bit
SPCR.SPWOM             2   SPI Wired-OR Mode Bit
SPCR.SPE               1   SPI Enable Bit
SPCR.SPTIE             0   SPI Transmit Interrupt Enable Bit
SPSCR                 0x0045     SPI Status and Control Register
SPSCR.SPRF             7   SPI Receiver Full Bit
SPSCR.ERRIE            6   Error interrupt Enable Bit
SPSCR.OVRF             5   Overflow Bit
SPSCR.MODF             4   Mode Fault Bit
SPSCR.SPTE             3   SPI Transmitter Empty Bit
SPSCR.MODFEN           2   Mode Fault Enable Bit
SPSCR.SPR1             1   SPI Baud Rate Select Bits 1
SPSCR.SPR0             0   SPI Baud Rate Select Bits 0
SPDR                  0x0046     SPI Data Register
SPDR.R7_T7             7   Receive/Transmit Data Bits 7
SPDR.R6_T6             6   Receive/Transmit Data Bits 6
SPDR.R5_T5             5   Receive/Transmit Data Bits 5
SPDR.R4_T4             4   Receive/Transmit Data Bits 4
SPDR.R3_T3             3   Receive/Transmit Data Bits 3
SPDR.R2_T2             2   Receive/Transmit Data Bits 2
SPDR.R1_T1             1   Receive/Transmit Data Bits 1
SPDR.R0_T0             0   Receive/Transmit Data Bits 0
RESERV0047            0x0047     RESERVED
RESERV0048            0x0048     RESERVED
RESERV0049            0x0049     RESERVED
RESERV004A            0x004A     RESERVED
RESERV004B            0x004B     RESERVED
RESERV004C            0x004C     RESERVED
RESERV004D            0x004D     RESERVED
RESERV004E            0x004E     RESERVED
RESERV004F            0x004F     RESERVED
RESERV0050            0x0050     RESERVED
TBSC                  0x0051     TIMB Status_Control Register
TBSC.TOF               7   TIMB Overflow Flag
TBSC.TOIE              6   TIMB Overflow Interrupt Enable Bit
TBSC.TSTOP             5   TIMB Stop Bit
TBSC.TRST              4   TIMB Reset Bit
TBSC.PS2               2   Prescaler Select Bits 2
TBSC.PS1               1   Prescaler Select Bits 1
TBSC.PS0               0   Prescaler Select Bits 0
TBCNTH                0x0052     TIMB Counter Register High
TBCNTL                0x0053     TIMB Counter Register Low
TBMODH                0x0054     TIMB Counter Modulo Register High
TBMODL                0x0055     TIMB Counter Modulo Register Low
TBSC0                 0x0056     TIMB Channel 0 Status_Control Register
TBSC0.CH0F             7   Channel 0 Flag
TBSC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TBSC0.MS0B             5   Mode Select Bit B
TBSC0.MS0A             4   Mode Select Bit A
TBSC0.ELS0B            3   Edge/Level Select Bits
TBSC0.ELS0A            2   Edge/Level Select Bits
TBSC0.TOV0             1   Toggle-On-Overflow Bit
TBSC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TBCH0H                0x0057     TIMB Channel 0 Register High
TBCH0L                0x0058     TIMB Channel 0 Register Low
TBSC1                 0x0059     TIMB Channel 1 Status_Control Register
TBSC1.CH1F             7   Channel 1 Flag                
TBSC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TBSC1.MS1A             4   Mode Select Bit A               
TBSC1.ELS1B            3   Edge/Level Select Bits          
TBSC1.ELS1A            2   Edge/Level Select Bits          
TBSC1.TOV1             1   Toggle-On-Overflow Bit          
TBSC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TBCH1H                0x005A     TIMB Channel 1 Register High
TBCH1L                0x005B     TIMB Channel 1 Register Low
PCTL                  0x005C     PLL Control Register
PCTL.PLLF              7   PLL Interrupt Flag
PCTL.PLLIE             6   PLL Interrupt Enable Bit
PCTL.PLLON             5   PLL On Bit
PCTL.BCS               4   Base Clock Select Bit
PBWC                  0x005D     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               5   Acquisition Mode Bit
PBWC.XLD               4   Crystal Loss Detect Bit
PPG                   0x005E     PLL Programming Register
PPG.MUL7               7   Multiplier Select Bits 7
PPG.MUL6               6   Multiplier Select Bits 6
PPG.MUL5               5   Multiplier Select Bits 5
PPG.MUL4               4   Multiplier Select Bits 4
PPG.VRS7               3   VCO Range Select Bits 7
PPG.VRS6               2   VCO Range Select Bits 6
PPG.VRS5               1   VCO Range Select Bits 5
PPG.VRS4               0   VCO Range Select Bits 4
RESERV005F            0x005F     RESERVED
SBSR                  0xFE00     SIM Break Status Register
SBSR.SBSW              1   SIM Break Stop/Wait Bit
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Bit
SRSR.PIN               6   External Reset Bit
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit (opcode fetches only)
SRSR.MENRST            2   Forced Monitor Mode Entry Reset Bit
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
FLCR                  0xFE08     FLASH Control Register
FLCR.HVEN              3   High-Voltage Enable Bit
FLCR.MASS              2   Mass Erase Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
BRKH                  0xFE0C     Break Address Register High
BRKL                  0xFE0D     Break Address Register Low
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
LVISCR                0xFE0F     LVI Status and Control Register
LVISCR.LVIOUT          7   LVI Output Bit
LVISCR.TRPSEL          5   LVI Trip Select Bit
FLBPR                 0xFF7E     FLASH Block Protect Register
FLBPR.BPR7             7   FLASH Block Protect Bits 7
FLBPR.BPR6             6   FLASH Block Protect Bits 6
FLBPR.BPR5             5   FLASH Block Protect Bits 5
FLBPR.BPR4             4   FLASH Block Protect Bits 4
FLBPR.BPR3             3   FLASH Block Protect Bits 3
FLBPR.BPR2             2   FLASH Block Protect Bits 2
FLBPR.BPR1             1   FLASH Block Protect Bits 1
FLBPR.BPR0             0   FLASH Block Protect Bits 0
COPCTL                0xFFFF     COP Control Register


.68HC908MR24
; MC68HC908MR24/D  http://e-www.motorola.com/brdata/PDFDB/docs/MC68HC908MR24.pdf
; MC68HC908MR24.pdf

; 24 Kbytes of FLASH
; 768 bytes of random-access memory (RAM)
; 46 bytes of user-defined vectors
; 240 bytes of monitor read-only memory (ROM)


; MEMORY MAP
area DATA FSR		   0x0000:0x0060
area DATA RAM		   0x0060:0x0360
area BSS  UNIMPLEMENTED	   0x0360:0xA000
area DATA FLASH		   0xA000:0xFE00
area DATA FSR_1		   0xFE00:0xFE10
area DATA MONITOR_ROM	   0xFE10:0xFF00
area BSS  UNIMPLEMENTED	   0xFF00:0xFF80
area DATA FSR_2		   0xFF80:0xFF81
area BSS  UNIMPLEMENTED	   0xFF81:0xFFD2
area DATA USER_VEC	   0xFFD2:0x10000


; Interrupt and reset vector assignments
interrupt __RESET       0xFFFE       Reset vector
interrupt SWI           0xFFFC       SWI vector
interrupt IRQ           0xFFFA       IRQ vector
interrupt PLL           0xFFF8       PLL vector
interrupt FAULT_1       0xFFF6       FAULT 1
interrupt FAULT_2       0xFFF4       FAULT 2
interrupt FAULT_3       0xFFF2       FAULT 3
interrupt FAULT_4       0xFFF0       FAULT 4
interrupt PWMMC         0xFFEE       PWMMC vector
interrupt TIM_A_CH0     0xFFEC       TIM A channel 0 vector
interrupt TIM_A_CH1     0xFFEA       TIM A channel 1 vector
interrupt TIM_A_CH2     0xFFE8       TIM A channel 2 vector
interrupt TIM_A_CH3     0xFFE6       TIM A channel 3 vector
interrupt TIM_A         0xFFE4       TIM A overflow vector
interrupt TIM_B_CH0     0xFFE2       TIM B channel 0 vector
interrupt TIM_B_CH1     0xFFE0       TIM B channel 1 vector
interrupt TIM_B         0xFFDE       TIM B overflow vector
interrupt A_D           0xFFDC       A/D vector
interrupt SPI_R         0xFFDA       SPI receive vector
interrupt SPI_T         0xFFD8       SPI transmit vector
interrupt SCI_E         0xFFD6       SCI error vector
interrupt SCI_R         0xFFD4       SCI receive vector
interrupt SCI_T         0xFFD2       SCI transmit vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bits 7
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
PTC                   0x0002     Port C Data Register
PTC.PTC6               6   Port C Data Bits 6
PTC.PTC5               5   Port C Data Bits 5
PTC.PTC4               4   Port C Data Bits 4
PTC.PTC3               3   Port C Data Bits 3
PTC.PTC2               2   Port C Data Bits 2
PTC.PTC1               1   Port C Data Bits 1
PTC.PTC0               0   Port C Data Bits 0
PTD                   0x0003     Port D Data Register
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bits 7
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
DDRC                  0x0006     Data Direction Register C
DDRC.DDRC6             6   Data Direction Register C Bits 6
DDRC.DDRC5             5   Data Direction Register C Bits 5
DDRC.DDRC4             4   Data Direction Register C Bits 4
DDRC.DDRC3             3   Data Direction Register C Bits 3
DDRC.DDRC2             2   Data Direction Register C Bits 2
DDRC.DDRC1             1   Data Direction Register C Bits 1
DDRC.DDRC0             0   Data Direction Register C Bits 0
RESERV0007            0x0007     RESERVED
PTE                   0x0008     Port E Data Register
PTE.PTE7               7   Port E Data Bits 7
PTE.PTE6               6   Port E Data Bits 6
PTE.PTE5               5   Port E Data Bits 5
PTE.PTE4               4   Port E Data Bits 4
PTE.PTE3               3   Port E Data Bits 3
PTE.PTE2               2   Port E Data Bits 2
PTE.PTE1               1   Port E Data Bits 1
PTE.PTE0               0   Port E Data Bits 0
PTF                   0x0009     Port F Data Register
PTF.PTF5               5   Port F Data Bits 5
PTF.PTF4               4   Port F Data Bits 4
PTF.PTF3               3   Port F Data Bits 3
PTF.PTF2               2   Port F Data Bits 2
PTF.PTF1               1   Port F Data Bits 1
PTF.PTF0               0   Port F Data Bits 0
RESERV000A            0x000A     RESERVED
RESERV000B            0x000B     RESERVED
DDRE                  0x000C     Data Direction Register E
DDRE.DDRE7             7   Data Direction Register E Bits 7
DDRE.DDRE6             6   Data Direction Register E Bits 6
DDRE.DDRE5             5   Data Direction Register E Bits 5
DDRE.DDRE4             4   Data Direction Register E Bits 4
DDRE.DDRE3             3   Data Direction Register E Bits 3
DDRE.DDRE2             2   Data Direction Register E Bits 2
DDRE.DDRE1             1   Data Direction Register E Bits 1
DDRE.DDRE0             0   Data Direction Register E Bits 0
DDRF                  0x000D     Data Direction Register F
DDRF.DDRF5             5   Data Direction Register F Bits 5
DDRF.DDRF4             4   Data Direction Register F Bits 4
DDRF.DDRF3             3   Data Direction Register F Bits 3
DDRF.DDRF2             2   Data Direction Register F Bits 2
DDRF.DDRF1             1   Data Direction Register F Bits 1
DDRF.DDRF0             0   Data Direction Register F Bits 0
TASC                  0x000E     TIMA Status_Control Register
TASC.TOF               7   TIMA Overflow Flag
TASC.TOIE              6   TIMA Overflow Interrupt Enable Bit
TASC.TSTOP             5   TIMA Stop Bit
TASC.TRST              4   TIMA Reset Bit
TASC.PS2               2   Prescaler Select Bits 2
TASC.PS1               1   Prescaler Select Bits 1
TASC.PS0               0   Prescaler Select Bits 0
TACNTH                0x000F     TIMA Counter Register High
TACNTL                0x0010     TIMA Counter Register Low
TAMODH                0x0011     TIMA Counter Modulo Register High
TAMODL                0x0012     TIMA Counter Modulo Register Low
TASC0                 0x0013     TIMA Channel 0 Status_Control Register
TASC0.CH0F             7   Channel 0 Flag Bit              
TASC0.CH0IE            6   Channel 0 Interrupt Enable Bit  
TASC0.MS0B             5   Mode Select Bit B               
TASC0.MS0A             4   Mode Select Bit A               
TASC0.ELS0B            3   Edge/Level Select Bits          
TASC0.ELS0A            2   Edge/Level Select Bits          
TASC0.TOV0             1   Toggle-On-Overflow Bit          
TASC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TACH0H                0x0014     TIMA Channel 0 Register High
TACH0L                0x0015     TIMA Channel 0 Register Low
TASC1                 0x0016     TIMA Channel 1 Status_Control Register
TASC1.CH1F             7   Channel 1 Flag Bit              
TASC1.CH1IE            6   Channel 1 Interrupt Enable Bit  
TASC1.MS1A             4   Mode Select Bit A               
TASC1.ELS1B            3   Edge/Level Select Bits          
TASC1.ELS1A            2   Edge/Level Select Bits          
TASC1.TOV1             1   Toggle-On-Overflow Bit          
TASC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TACH1H                0x0017     TIMA Channel 1 Register High
TACH1L                0x0018     TIMA Channel 1 Register Low
TASC2                 0x0019     TIMA Channel 2 Status_Control Register
TASC2.CH2F             7   Channel 2 Flag Bit              
TASC2.CH2IE            6   Channel 2 Interrupt Enable Bit  
TASC2.MS2B             5   Mode Select Bit B               
TASC2.MS2A             4   Mode Select Bit A               
TASC2.ELS2B            3   Edge/Level Select Bits          
TASC2.ELS2A            2   Edge/Level Select Bits          
TASC2.TOV2             1   Toggle-On-Overflow Bit          
TASC2.CH2MAX           0   Channel 2 Maximum Duty Cycle Bit
TACH2H                0x001A     TIMA Channel 2 Register High
TACH2L                0x001B     TIMA Channel 2 Register Low
TASC3                 0x001C     TIMA Channel 3 Status_Control Register
TASC3.CH3F             7   Channel 3 Flag Bit              
TASC3.CH3IE            6   Channel 3 Interrupt Enable Bit  
TASC3.MS3A             4   Mode Select Bit A               
TASC3.ELS3B            3   Edge/Level Select Bits          
TASC3.ELS3A            2   Edge/Level Select Bits          
TASC3.TOV3             1   Toggle-On-Overflow Bit          
TASC3.CH3MAX           0   Channel 3 Maximum Duty Cycle Bit
TACH3H                0x001D     TIMA Channel 3 Register High
TACH3L                0x001E     TIMA Channel 3 Register Low
CONFIG                0x001F     Configuration Register
CONFIG.EDGE            7   Edge-Align Enable Bit       
CONFIG.BOTNEG          6   Bottom-Side PWM Polarity Bit
CONFIG.TOPNEG          5   Top-Side PWM Polarity Bit   
CONFIG.INDEP           4   Independent Mode Enable Bit 
CONFIG.LVIRST          3   LVI Reset Enable Bit        
CONFIG.LVIPWR          2   LVI Power Enable Bit        
CONFIG.BIT1            1   
CONFIG.COPD            0   COP Disable Bit             
PCTL1                 0x0020     PWM Control Register 1
PCTL1.DISX             7   Software Disable Bit for Bank X Bit
PCTL1.DISY             6   Software Disable Bit for Bank Y Bit
PCTL1.PWMINT           5   PWM Interrupt Enable Bit           
PCTL1.PWMF             4   PWM Reload Flag                    
PCTL1.ISENS1           3   Current Sense Correction Bits 1    
PCTL1.ISENS0           2   Current Sense Correction Bits 0    
PCTL1.LDOK             1   Load OK Bit                        
PCTL1.PWMEN            0   PWM Module Enable Bit              
PCTL2                 0x0021     PWM Control Register 2
PCTL2.LDFQ1            7   PWM Load Frequency Bits 1                              
PCTL2.LDFQ0            6   PWM Load Frequency Bits 0                              
PCTL2.IPOL1            4   Top/Bottom Correction Bit for PWM Pair 1 (PWMs 1 and 2)
PCTL2.IPOL2            3   Top/Bottom Correction Bit for PWM Pair 2 (PWMs 3 and 4)
PCTL2.IPOL3            2   Top/Bottom Correction Bit for PWM Pair 3 (PWMs 5 and 6)
PCTL2.PRSC1            1   PWM Prescaler Bits 1                                   
PCTL2.PRSC0            0   PWM Prescaler Bits 0                                   
FCR                   0x0022     Fault Control Register
FCR.FINT4              7   Fault 4 Interrupt Enable Bit            
FCR.FMODE4             6   Fault Mode Selection for Fault Pin 4 Bit
FCR.FINT3              5   Fault 3 Interrupt Enable Bit            
FCR.FMODE3             4   Fault Mode Selection for Fault Pin 3 Bit
FCR.FINT2              3   Fault 2 Interrupt Enable Bit            
FCR.FMODE2             2   Fault Mode Selection for Fault Pin 2 Bit
FCR.FINT1              1   Fault 1 Interrupt Enable Bit            
FCR.FMODE1             0   Fault Mode Selection for Fault Pin 1 Bit
_FSR_                 0x0023     Fault Status Register
_FSR_.FPIN4            7   State of Fault Pin 4 Bit
_FSR_.FFLAG4           6   Fault Event Flag 4      
_FSR_.FPIN3            5   State of Fault Pin 3 Bit
_FSR_.FFLAG3           4   Fault Event Flag 3      
_FSR_.FPIN2            3   State of Fault Pin 2 Bit
_FSR_.FFLAG2           2   Fault Event Flag 2      
_FSR_.FPIN1            1   State of Fault Pin 1 Bit
_FSR_.FFLAG1           0   Fault Event Flag 1      
FTACK                 0x0024     Fault Acknowledge Register
FTACK.FTACK4           6   Fault Acknowledge 4 Bit                
FTACK.DT6              5   Dead-Time 6 Bit                        
FTACK.DT5_FTACK3       4   Dead-Time 5 Bit/Fault Acknowledge 3 Bit
FTACK.DT4              3   Dead-Time 4 Bit                        
FTACK.DT3_FTACK2       2   Dead-Time 3 Bit/Fault Acknowledge 2 Bit
FTACK.DT2              1   Dead-Time 2 Bit                        
FTACK.DT1_FTACK1       0   Dead-Time 1 Bit/Fault Acknowledge 1 Bit
PWMOUT                0x0025     PWM Output Control Register
PWMOUT.OUTCTL          6   Output Control Enable Bit    
PWMOUT.OUT6            5   PWM Pin Output Control Bits 6
PWMOUT.OUT5            4   PWM Pin Output Control Bits 5
PWMOUT.OUT4            3   PWM Pin Output Control Bits 4
PWMOUT.OUT3            2   PWM Pin Output Control Bits 3
PWMOUT.OUT2            1   PWM Pin Output Control Bits 2
PWMOUT.OUT1            0   PWM Pin Output Control Bits 1
PCNTH                 0x0026     PWM Counter Register High
PCNTL                 0x0027     PWM Counter Register Low
PMODH                 0x0028     PWM Counter Modulo Register High
PMODL                 0x0029     PWM Counter Modulo Register Low
PVAL1H                0x002A     PWM 1 Value Register High
PVAL1L                0x002B     PWM 1 Value Register Low
PVAL2H                0x002C     PWM 2 Value Register High
PVAL2L                0x002D     PWM 2 Value Register Low
PVAL3H                0x002E     PWM 3 Value Register High
PVAL3L                0x002F     PWM 3 Value Register Low
PVAL4H                0x0030     PWM 4 Value Register High
PVAL4L                0x0031     PWM 4 Value Register Low
PMVAL5H               0x0032     PWM 5 Value Register High
PVAL5L                0x0033     PWM 5 Value Register Low
PVAL6H                0x0034     PWM 6 Value Register High
PMVAL6L               0x0035     PWM 6 Value Register Low
DEADTM                0x0036     Dead-Time Write-Once Register
DISMAP                0x0037     PWM Disable Mapping Write-Once Register
SCC1                  0x0038     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit       
SCC1.ENSCI             6   Enable SCI Bit             
SCC1.TXINV             5   Transmit Inversion Bit     
SCC1.M                 4   Mode (Character Length) Bit
SCC1.WAKE              3   Wakeup Condition Bit       
SCC1.ILTY              2   Idle Line Type Bit         
SCC1.PEN               1   Parity Enable Bit          
SCC1.PTY               0   Parity Bit                 
SCC2                  0x0039     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit         
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit          
SCC2.ILIE              4   Idle Line Interrupt Enable Bit            
SCC2.TE                3   Transmitter Enable Bit                    
SCC2.RE                2   Receiver Enable Bit                       
SCC2.RWU               1   Receiver Wakeup Bit                       
SCC2.SBK               0   Send Break Bit                            
SCC3                  0x003A     SCI Control Register 3
SCC3.R8                7   Received Bit 8                             
SCC3.T8                6   Transmitted Bit 8                          
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit      
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit  
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit 
SCS1                  0x003B     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit 
SCS1.TC                6   Transmission Complete Bit 
SCS1.SCRF              5   SCI Receiver Full Bit     
SCS1.IDLE              4   Receiver Idle Bit         
SCS1.OR                3   Receiver Overrun Bit      
SCS1.NF                2   Receiver Noise Flag Bit   
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit 
SCS2                  0x003C     SCI Status Register 2
SCS2.BKF               1   Break Flag                
SCS2.RPF               0   Reception-in-Progress Flag
SCDR                  0x003D     SCI Data Register
SCDR.R7_T7             7   Receive/Transmit Data Bits 7
SCDR.R6_T6             6   Receive/Transmit Data Bits 6
SCDR.R5_T5             5   Receive/Transmit Data Bits 5
SCDR.R4_T4             4   Receive/Transmit Data Bits 4
SCDR.R3_T3             3   Receive/Transmit Data Bits 3
SCDR.R2_T2             2   Receive/Transmit Data Bits 2
SCDR.R1_T1             1   Receive/Transmit Data Bits 1
SCDR.R0_T0             0   Receive/Transmit Data Bits 0
SCBR                  0x003E     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2   
SCBR.SCR1              1   SCI Baud Rate Select Bits 1   
SCBR.SCR0              0   SCI Baud Rate Select Bits 0   
ISCR                  0x003F     IRQ Status_Control Register
ISCR.IRQF              3   IRQ Flag                             
ISCR.ACK1              2   IRQ Interrupt Request Acknowledge Bit
ISCR.IMASK1            1   IRQ Interrupt Mask Bit               
ISCR.MODE1             0   IRQ Edge/Level Select Bit            
ADSCR                 0x0040     ADC Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit     
ADSCR.AIEN             6   ADC Interrupt Enable Bit     
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4    
ADSCR.ADCH3            3   ADC Channel Select Bits 3    
ADSCR.ADCH2            2   ADC Channel Select Bits 2    
ADSCR.ADCH1            1   ADC Channel Select Bits 1    
ADSCR.ADCH0            0   ADC Channel Select Bits 0    
ADRH                  0x0041     ADC Data Register High
ADRH.AD9               1
ADRH.AD8               0
ADRL                  0x0042     ADC Data Register Low
ADRL.AD7               7
ADRL.AD6               6
ADRL.AD5               5
ADRL.AD4               4
ADRL.AD3               3
ADRL.AD2               2
ADRL.AD1               1
ADRL.AD0               0
ADCLK                 0x0043     ADC Clock Register
ADCLK.ADIV2            7   ADC Clock Prescaler Bits 2          
ADCLK.ADIV1            6   ADC Clock Prescaler Bits 1          
ADCLK.ADIV0            5   ADC Clock Prescaler Bits 0          
ADCLK.ADICLK           4   ADC Input Clock Select Bit          
ADCLK.MODE1            3   Modes of Result Justification Bits 1
ADCLK.MODE0            2   Modes of Result Justification Bits 0
SPCR                  0x0044     SPI Control Register
SPCR.SPRIE             7   SPI Receiver Interrupt Enable Bit
SPCR.SPMSTR            5   SPI Master Bit                   
SPCR.CPOL              4   Clock Polarity Bit               
SPCR.CPHA              3   Clock Phase Bit                  
SPCR.SPWOM             2   SPI Wired-OR Mode Bit            
SPCR.SPE               1   SPI Enable Bit                   
SPCR.SPTIE             0   SPI Transmit Interrupt Enable Bit
SPSCR                 0x0045     SPI Status and Control Register
SPSCR.SPRF             7   SPI Receiver Full Bit      
SPSCR.ERRIE            6   Error interrupt Enable Bit 
SPSCR.OVRF             5   Overflow Bit               
SPSCR.MODF             4   Mode Fault Bit             
SPSCR.SPTE             3   SPI Transmitter Empty Bit  
SPSCR.MODFEN           2   Mode Fault Enable Bit      
SPSCR.SPR1             1   SPI Baud Rate Select Bits 1
SPSCR.SPR0             0   SPI Baud Rate Select Bits 0
SPDR                  0x0046     SPI Data Register
SPDR.R7_T7             7   Receive/Transmit Data Bits 7
SPDR.R6_T6             6   Receive/Transmit Data Bits 6
SPDR.R5_T5             5   Receive/Transmit Data Bits 5
SPDR.R4_T4             4   Receive/Transmit Data Bits 4
SPDR.R3_T3             3   Receive/Transmit Data Bits 3
SPDR.R2_T2             2   Receive/Transmit Data Bits 2
SPDR.R1_T1             1   Receive/Transmit Data Bits 1
SPDR.R0_T0             0   Receive/Transmit Data Bits 0
RESERV0047            0x0047     RESERVED
RESERV0048            0x0048     RESERVED
RESERV0049            0x0049     RESERVED
RESERV004A            0x004A     RESERVED
RESERV004B            0x004B     RESERVED
RESERV004C            0x004C     RESERVED
RESERV004D            0x004D     RESERVED
RESERV004E            0x004E     RESERVED
RESERV004F            0x004F     RESERVED
RESERV0050            0x0050     RESERVED
TBSC                  0x0051     TIMB Status_Control Register
TBSC.TOF               7   TIMB Overflow Flag                
TBSC.TOIE              6   TIMB Overflow Interrupt Enable Bit
TBSC.TSTOP             5   TIMB Stop Bit                     
TBSC.TRST              4   TIMB Reset Bit                    
TBSC.PS2               2   Prescaler Select Bits 2           
TBSC.PS1               1   Prescaler Select Bits 1           
TBSC.PS0               0   Prescaler Select Bits 0           
TBCNTH                0x0052     TIMB Counter Register High
TBCNTL                0x0053     TIMB Counter Register Low
TBMODH                0x0054     TIMB Counter Modulo Register High
TBMODL                0x0055     TIMB Counter Modulo Register Low
TBSC0                 0x0056     TIMB Channel 0 Status_Control Register
TBSC0.CH0F             7   Channel 0 Flag                  
TBSC0.CH0IE            6   Channel 0 Interrupt Enable Bit  
TBSC0.MS0B             5   Mode Select Bit B               
TBSC0.MS0A             4   Mode Select Bit A               
TBSC0.ELS0B            3   Edge/Level Select Bits          
TBSC0.ELS0A            2   Edge/Level Select Bits          
TBSC0.TOV0             1   Toggle-On-Overflow Bit          
TBSC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TBCH0H                0x0057     TIMB Channel 0 Register High
TBCH0L                0x0058     TIMB Channel 0 Register Low
TBSC1                 0x0059     TIMB Channel 1 Status_Control Register
TBSC1.CH1F             7   Channel 1 Flag                  
TBSC1.CH1IE            6   Channel 1 Interrupt Enable Bit  
TBSC1.MS1A             4   Mode Select Bit A               
TBSC1.ELS1B            3   Edge/Level Select Bits          
TBSC1.ELS1A            2   Edge/Level Select Bits          
TBSC1.TOV1             1   Toggle-On-Overflow Bit          
TBSC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TBCH1H                0x005A     TIMB Channel 1 Register High
TBCH1L                0x005B     TIMB Channel 1 Register Low
PCTL                  0x005C     PLL Control Register
PCTL.PLLF              7   PLL Interrupt Flag      
PCTL.PLLIE             6   PLL Interrupt Enable Bit
PCTL.PLLON             5   PLL On Bit              
PCTL.BCS               4   Base Clock Select Bit   
PBWC                  0x005D     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit             
PBWC.ACQ               5   Acquisition Mode Bit           
PBWC.XLD               4   Crystal Loss Detect Bit        
PPG                   0x005E     PLL Programming Register
PPG.MUL7               7   Multiplier Select Bits 7
PPG.MUL6               6   Multiplier Select Bits 6
PPG.MUL5               5   Multiplier Select Bits 5
PPG.MUL4               4   Multiplier Select Bits 4
PPG.VRS7               3   VCO Range Select Bits 7 
PPG.VRS6               2   VCO Range Select Bits 6 
PPG.VRS5               1   VCO Range Select Bits 5 
PPG.VRS4               0   VCO Range Select Bits 4 
RESERV005F            0x005F     RESERVED
RESERVFE00            0xFE00     RESERVED
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Bit
SRSR.PIN               6   External Reset Bit
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit (opcode fetches only)
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
RESERVFE03            0xFE03     RESERVED
FLCR                  0xFE08     FLASH Control Register
FLCR.FDIV1             7   Frequency Divide Control Bit
FLCR.FDIV0             6   Frequency Divide Control Bit
FLCR.BLK1              5   Block Erase Control Bit 1
FLCR.BLK0              4   Block Erase Control Bit 0
FLCR.HVEN              3   High-Voltage Enable Bit
FLCR.MARGIN            2   Margin Read Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
LVISCR                0xFE0F     LVI Status and Control Register
LVISCR.LVIOUT          7   LVI Output Bit
LVISCR.TRPSEL          5   LVI Trip Select Bit
FLBPR                 0xFF80     FLASH Block Protect Register
FLBPR.BPR3             3   Block Protect Register Bit 3
FLBPR.BPR2             2   Block Protect Register Bit 2
FLBPR.BPR1             1   Block Protect Register Bit 1
FLBPR.BPR0             0   Block Protect Register Bit 0
COPCTL                0xFFFF     COP Control Register


.68HC908MR32
; MC68HC908MR32/D  http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=68HC908MR32&nodeId=01M98634
; MC68HC908MR32.pdf

; 32 Kbytes of FLASH
; 768 bytes of random-access memory (RAM)
; 46 bytes of user-defined vectors
; 240 bytes of monitor read-only memory (ROM)


; MEMORY MAP
area DATA FSR		    0x0000:0x0060
area DATA RAM		    0x0060:0x0360
area BSS  UNIMPLEMENTED	    0x0360:0x8000
area DATA FLASH		    0x8000:0xFE00
area DATA FSR_1		    0xFE00:0xFE10
area DATA MONITOR_ROM	    0xFE10:0xFF00
area BSS  UNIMPLEMENTED	    0xFF00:0xFF7E
area DATA FSR_2		    0xFF7E:0xFF7F
area BSS  UNIMPLEMENTED	    0xFF7F:0xFFD2
area DATA USER_VEC	    0xFFD2:0x10000


; Interrupt and reset vector assignments
interrupt __RESET      0xFFFE       Reset vector
interrupt SWI          0xFFFC       SWI vector
interrupt IRQ          0xFFFA       IRQ vector
interrupt PLL          0xFFF8       PLL vector
interrupt FAULT_1      0xFFF6       FAULT 1
interrupt FAULT_2      0xFFF4       FAULT 2
interrupt FAULT_3      0xFFF2       FAULT 3
interrupt FAULT_4      0xFFF0       FAULT 4
interrupt PWMMC        0xFFEE       PWMMC vector
interrupt TIM_A_CH0    0xFFEC       TIM A channel 0 vector
interrupt TIM_A_CH1    0xFFEA       TIM A channel 1 vector
interrupt TIM_A_CH2    0xFFE8       TIM A channel 2 vector
interrupt TIM_A_CH3    0xFFE6       TIM A channel 3 vector
interrupt TIM_A        0xFFE4       TIM A overflow vector
interrupt TIM_B_CH0    0xFFE2       TIM B channel 0 vector
interrupt TIM_B_CH1    0xFFE0       TIM B channel 1 vector
interrupt TIM_B        0xFFDE       TIM B overflow vector
interrupt A_D          0xFFDC       A/D vector
interrupt SPI_R        0xFFDA       SPI receive vector
interrupt SPI_T        0xFFD8       SPI transmit vector
interrupt SCI_E        0xFFD6       SCI error vector
interrupt SCI_R        0xFFD4       SCI receive vector
interrupt SCI_T        0xFFD2       SCI transmit vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bits 7
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
PTC                   0x0002     Port C Data Register
PTC.PTC6               6   Port C Data Bits 6
PTC.PTC5               5   Port C Data Bits 5
PTC.PTC4               4   Port C Data Bits 4
PTC.PTC3               3   Port C Data Bits 3
PTC.PTC2               2   Port C Data Bits 2
PTC.PTC1               1   Port C Data Bits 1
PTC.PTC0               0   Port C Data Bits 0
PTD                   0x0003     Port D Data Register
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bits 7
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
DDRC                  0x0006     Data Direction Register C
DDRC.DDRC6             6   Data Direction Register C Bits 6
DDRC.DDRC5             5   Data Direction Register C Bits 5
DDRC.DDRC4             4   Data Direction Register C Bits 4
DDRC.DDRC3             3   Data Direction Register C Bits 3
DDRC.DDRC2             2   Data Direction Register C Bits 2
DDRC.DDRC1             1   Data Direction Register C Bits 1
DDRC.DDRC0             0   Data Direction Register C Bits 0
RESERV0007            0x0007     RESERVED
PTE                   0x0008     Port E Data Register
PTE.PTE7               7   Port E Data Bits 7
PTE.PTE6               6   Port E Data Bits 6
PTE.PTE5               5   Port E Data Bits 5
PTE.PTE4               4   Port E Data Bits 4
PTE.PTE3               3   Port E Data Bits 3
PTE.PTE2               2   Port E Data Bits 2
PTE.PTE1               1   Port E Data Bits 1
PTE.PTE0               0   Port E Data Bits 0
PTF                   0x0009     Port F Data Register
PTF.PTF5               5   Port F Data Bits 5
PTF.PTF4               4   Port F Data Bits 4
PTF.PTF3               3   Port F Data Bits 3
PTF.PTF2               2   Port F Data Bits 2
PTF.PTF1               1   Port F Data Bits 1
PTF.PTF0               0   Port F Data Bits 0
RESERV000A            0x000A     RESERVED
RESERV000B            0x000B     RESERVED
DDRE                  0x000C     Data Direction Register E
DDRE.DDRE7             7   Data Direction Register E Bits 7
DDRE.DDRE6             6   Data Direction Register E Bits 6
DDRE.DDRE5             5   Data Direction Register E Bits 5
DDRE.DDRE4             4   Data Direction Register E Bits 4
DDRE.DDRE3             3   Data Direction Register E Bits 3
DDRE.DDRE2             2   Data Direction Register E Bits 2
DDRE.DDRE1             1   Data Direction Register E Bits 1
DDRE.DDRE0             0   Data Direction Register E Bits 0
DDRF                  0x000D     Data Direction Register F
DDRF.DDRF5             5   Data Direction Register F Bits 5
DDRF.DDRF4             4   Data Direction Register F Bits 4
DDRF.DDRF3             3   Data Direction Register F Bits 3
DDRF.DDRF2             2   Data Direction Register F Bits 2
DDRF.DDRF1             1   Data Direction Register F Bits 1
DDRF.DDRF0             0   Data Direction Register F Bits 0
TASC                  0x000E     TIMA Status_Control Register
TASC.TOF               7   TIMA Overflow Flag
TASC.TOIE              6   TIMA Overflow Interrupt Enable Bit
TASC.TSTOP             5   TIMA Stop Bit
TASC.TRST              4   TIMA Reset Bit
TASC.PS2               2   Prescaler Select Bits 2
TASC.PS1               1   Prescaler Select Bits 1
TASC.PS0               0   Prescaler Select Bits 0
TACNTH                0x000F     TIMA Counter Register High
TACNTL                0x0010     TIMA Counter Register Low
TAMODH                0x0011     TIMA Counter Modulo Register High
TAMODL                0x0012     TIMA Counter Modulo Register Low
TASC0                 0x0013     TIMA Channel 0 Status_Control Register
TASC0.CH0F             7   Channel 0 Flag Bit
TASC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TASC0.MS0B             5   Mode Select Bit B
TASC0.MS0A             4   Mode Select Bit A
TASC0.ELS0B            3   Edge/Level Select Bits
TASC0.ELS0A            2   Edge/Level Select Bits
TASC0.TOV0             1   Toggle-On-Overflow Bit
TASC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TACH0H                0x0014     TIMA Channel 0 Register High
TACH0L                0x0015     TIMA Channel 0 Register Low
TASC1                 0x0016     TIMA Channel 1 Status_Control Register
TASC1.CH1F             7   Channel 1 Flag Bit            
TASC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TASC1.MS1A             4   Mode Select Bit A               
TASC1.ELS1B            3   Edge/Level Select Bits          
TASC1.ELS1A            2   Edge/Level Select Bits          
TASC1.TOV1             1   Toggle-On-Overflow Bit          
TASC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TACH1H                0x0017     TIMA Channel 1 Register High
TACH1L                0x0018     TIMA Channel 1 Register Low
TASC2                 0x0019     TIMA Channel 2 Status_Control Register
TASC2.CH2F             7   Channel 2 Flag Bit              
TASC2.CH2IE            6   Channel 2 Interrupt Enable Bit  
TASC2.MS2B             5   Mode Select Bit B               
TASC2.MS2A             4   Mode Select Bit A               
TASC2.ELS2B            3   Edge/Level Select Bits          
TASC2.ELS2A            2   Edge/Level Select Bits          
TASC2.TOV2             1   Toggle-On-Overflow Bit          
TASC2.CH2MAX           0   Channel 2 Maximum Duty Cycle Bit
TACH2H                0x001A     TIMA Channel 2 Register High
TACH2L                0x001B     TIMA Channel 2 Register Low
TASC3                 0x001C     TIMA Channel 3 Status_Control Register
TASC3.CH3F             7   Channel 3 Flag Bit              
TASC3.CH3IE            6   Channel 3 Interrupt Enable Bit  
TASC3.MS3A             4   Mode Select Bit A               
TASC3.ELS3B            3   Edge/Level Select Bits          
TASC3.ELS3A            2   Edge/Level Select Bits          
TASC3.TOV3             1   Toggle-On-Overflow Bit          
TASC3.CH3MAX           0   Channel 3 Maximum Duty Cycle Bit
TACH3H                0x001D     TIMA Channel 3 Register High
TACH3L                0x001E     TIMA Channel 3 Register Low
CONFIG                0x001F     Configuration Register
CONFIG.EDGE            7   Edge-Align Enable Bit
CONFIG.BOTNEG          6   Bottom-Side PWM Polarity Bit
CONFIG.TOPNEG          5   Top-Side PWM Polarity Bit
CONFIG.INDEP           4   Independent Mode Enable Bit
CONFIG.LVIRST          3   LVI Reset Enable Bit
CONFIG.LVIPWR          2   LVI Power Enable Bit
CONFIG.STOPE           1   Stop Enable Bit
CONFIG.COPD            0   COP Disable Bit
PCTL1                 0x0020     PWM Control Register 1
PCTL1.DISX             7   Software Disable Bit for Bank X Bit
PCTL1.DISY             6   Software Disable Bit for Bank Y Bit
PCTL1.PWMINT           5   PWM Interrupt Enable Bit
PCTL1.PWMF             4   PWM Reload Flag
PCTL1.ISENS1           3   Current Sense Correction Bits 1
PCTL1.ISENS0           2   Current Sense Correction Bits 0
PCTL1.LDOK             1   Load OK Bit
PCTL1.PWMEN            0   PWM Module Enable Bit
PCTL2                 0x0021     PWM Control Register 2
PCTL2.LDFQ1            7   PWM Load Frequency Bits 1
PCTL2.LDFQ0            6   PWM Load Frequency Bits 0
PCTL2.IPOL1            4   Top/Bottom Correction Bit for PWM Pair 1 (PWMs 1 and 2)
PCTL2.IPOL2            3   Top/Bottom Correction Bit for PWM Pair 2 (PWMs 3 and 4)
PCTL2.IPOL3            2   Top/Bottom Correction Bit for PWM Pair 3 (PWMs 5 and 6)
PCTL2.PRSC1            1   PWM Prescaler Bits 1
PCTL2.PRSC0            0   PWM Prescaler Bits 0
FCR                   0x0022     Fault Control Register
FCR.FINT4              7   Fault 4 Interrupt Enable Bit
FCR.FMODE4             6   Fault Mode Selection for Fault Pin 4 Bit
FCR.FINT3              5   Fault 3 Interrupt Enable Bit
FCR.FMODE3             4   Fault Mode Selection for Fault Pin 3 Bit
FCR.FINT2              3   Fault 2 Interrupt Enable Bit
FCR.FMODE2             2   Fault Mode Selection for Fault Pin 2 Bit
FCR.FINT1              1   Fault 1 Interrupt Enable Bit
FCR.FMODE1             0   Fault Mode Selection for Fault Pin 1 Bit
_FSR_                 0x0023     Fault Status Register
_FSR_.FPIN4            7   State of Fault Pin 4 Bit
_FSR_.FFLAG4           6   Fault Event Flag 4
_FSR_.FPIN3            5   State of Fault Pin 3 Bit
_FSR_.FFLAG3           4   Fault Event Flag 3
_FSR_.FPIN2            3   State of Fault Pin 2 Bit
_FSR_.FFLAG2           2   Fault Event Flag 2
_FSR_.FPIN1            1   State of Fault Pin 1 Bit
_FSR_.FFLAG1           0   Fault Event Flag 1
FTACK                 0x0024     Fault Acknowledge Register
FTACK.FTACK4           6   Fault Acknowledge 4 Bit
FTACK.DT6              5   Dead-Time 6 Bit
FTACK.DT5_FTACK3       4   Dead-Time 5 Bit/Fault Acknowledge 3 Bit
FTACK.DT4              3   Dead-Time 4 Bit
FTACK.DT3_FTACK2       2   Dead-Time 3 Bit/Fault Acknowledge 2 Bit
FTACK.DT2              1   Dead-Time 2 Bit
FTACK.DT1_FTACK1       0   Dead-Time 1 Bit/Fault Acknowledge 1 Bit
PWMOUT                0x0025     PWM Output Control Register
PWMOUT.OUTCTL          6   Output Control Enable Bit
PWMOUT.OUT6            5   PWM Pin Output Control Bits 6
PWMOUT.OUT5            4   PWM Pin Output Control Bits 5
PWMOUT.OUT4            3   PWM Pin Output Control Bits 4
PWMOUT.OUT3            2   PWM Pin Output Control Bits 3
PWMOUT.OUT2            1   PWM Pin Output Control Bits 2
PWMOUT.OUT1            0   PWM Pin Output Control Bits 1
PCNTH                 0x0026     PWM Counter Register High
PCNTL                 0x0027     PWM Counter Register Low
PMODH                 0x0028     PWM Counter Modulo Register High
PMODL                 0x0029     PWM Counter Modulo Register Low
PVAL1H                0x002A     PWM 1 Value Register High
PVAL1L                0x002B     PWM 1 Value Register Low
PVAL2H                0x002C     PWM 2 Value Register High
PVAL2L                0x002D     PWM 2 Value Register Low
PVAL3H                0x002E     PWM 3 Value Register High
PVAL3L                0x002F     PWM 3 Value Register Low
PVAL4H                0x0030     PWM 4 Value Register High
PVAL4L                0x0031     PWM 4 Value Register Low
PMVAL5H               0x0032     PWM 5 Value Register High
PVAL5L                0x0033     PWM 5 Value Register Low
PVAL6H                0x0034     PWM 6 Value Register High
PMVAL6L               0x0035     PWM 6 Value Register Low
DEADTM                0x0036     Dead-Time Write-Once Register
DISMAP                0x0037     PWM Disable Mapping Write-Once Register
SCC1                  0x0038     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit
SCC1.ENSCI             6   Enable SCI Bit
SCC1.TXINV             5   Transmit Inversion Bit
SCC1.M                 4   Mode (Character Length) Bit
SCC1.WAKE              3   Wakeup Condition Bit
SCC1.ILTY              2   Idle Line Type Bit
SCC1.PEN               1   Parity Enable Bit
SCC1.PTY               0   Parity Bit
SCC2                  0x0039     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit
SCC2.ILIE              4   Idle Line Interrupt Enable Bit
SCC2.TE                3   Transmitter Enable Bit
SCC2.RE                2   Receiver Enable Bit
SCC2.RWU               1   Receiver Wakeup Bit
SCC2.SBK               0   Send Break Bit
SCC3                  0x003A     SCI Control Register 3
SCC3.R8                7   Received Bit 8
SCC3.T8                6   Transmitted Bit 8
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit
SCS1                  0x003B     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit
SCS1.TC                6   Transmission Complete Bit
SCS1.SCRF              5   SCI Receiver Full Bit
SCS1.IDLE              4   Receiver Idle Bit
SCS1.OR                3   Receiver Overrun Bit
SCS1.NF                2   Receiver Noise Flag Bit
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit
SCS2                  0x003C     SCI Status Register 2
SCS2.BKF               1   Break Flag
SCS2.RPF               0   Reception-in-Progress Flag
SCDR                  0x003D     SCI Data Register
SCDR.R7_T7             7   Receive/Transmit Data Bits 7
SCDR.R6_T6             6   Receive/Transmit Data Bits 6
SCDR.R5_T5             5   Receive/Transmit Data Bits 5
SCDR.R4_T4             4   Receive/Transmit Data Bits 4
SCDR.R3_T3             3   Receive/Transmit Data Bits 3
SCDR.R2_T2             2   Receive/Transmit Data Bits 2
SCDR.R1_T1             1   Receive/Transmit Data Bits 1
SCDR.R0_T0             0   Receive/Transmit Data Bits 0
SCBR                  0x003E     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2
SCBR.SCR1              1   SCI Baud Rate Select Bits 1
SCBR.SCR0              0   SCI Baud Rate Select Bits 0
ISCR                  0x003F     IRQ Status_Control Register
ISCR.IRQF              3   IRQ Flag
ISCR.ACK1              2   IRQ Interrupt Request Acknowledge Bit
ISCR.IMASK1            1   IRQ Interrupt Mask Bit
ISCR.MODE1             0   IRQ Edge/Level Select Bit
ADSCR                 0x0040     ADC Status and Control Register
ADSCR.COCO_IDMAS       7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADRH                  0x0041     ADC Data Register High Right Justified Mode
ADRH.AD9               1
ADRH.AD8               0
ADRL                  0x0042     ADC Data Register Low Right Justified Mode
ADRL.AD7               7
ADRL.AD6               6
ADRL.AD5               5
ADRL.AD4               4
ADRL.AD3               3
ADRL.AD2               2
ADRL.AD1               1
ADRL.AD0               0
ADCLK                 0x0043     ADC Clock Register
ADCLK.ADIV2            7   ADC Clock Prescaler Bits 2
ADCLK.ADIV1            6   ADC Clock Prescaler Bits 1
ADCLK.ADIV0            5   ADC Clock Prescaler Bits 0
ADCLK.ADICLK           4   ADC Input Clock Select Bit
ADCLK.MODE1            3   Modes of Result Justification Bits 1
ADCLK.MODE0            2   Modes of Result Justification Bits 0
SPCR                  0x0044     SPI Control Register
SPCR.SPRIE             7   SPI Receiver Interrupt Enable Bit
SPCR.SPMSTR            5   SPI Master Bit
SPCR.CPOL              4   Clock Polarity Bit
SPCR.CPHA              3   Clock Phase Bit
SPCR.SPWOM             2   SPI Wired-OR Mode Bit
SPCR.SPE               1   SPI Enable Bit
SPCR.SPTIE             0   SPI Transmit Interrupt Enable Bit
SPSCR                 0x0045     SPI Status and Control Register
SPSCR.SPRF             7   SPI Receiver Full Bit
SPSCR.ERRIE            6   Error interrupt Enable Bit
SPSCR.OVRF             5   Overflow Bit
SPSCR.MODF             4   Mode Fault Bit
SPSCR.SPTE             3   SPI Transmitter Empty Bit
SPSCR.MODFEN           2   Mode Fault Enable Bit
SPSCR.SPR1             1   SPI Baud Rate Select Bits 1
SPSCR.SPR0             0   SPI Baud Rate Select Bits 0
SPDR                  0x0046     SPI Data Register
SPDR.R7_T7             7   Receive/Transmit Data Bits 7
SPDR.R6_T6             6   Receive/Transmit Data Bits 6
SPDR.R5_T5             5   Receive/Transmit Data Bits 5
SPDR.R4_T4             4   Receive/Transmit Data Bits 4
SPDR.R3_T3             3   Receive/Transmit Data Bits 3
SPDR.R2_T2             2   Receive/Transmit Data Bits 2
SPDR.R1_T1             1   Receive/Transmit Data Bits 1
SPDR.R0_T0             0   Receive/Transmit Data Bits 0
RESERV0047            0x0047     RESERVED
RESERV0048            0x0048     RESERVED
RESERV0049            0x0049     RESERVED
RESERV004A            0x004A     RESERVED
RESERV004B            0x004B     RESERVED
RESERV004C            0x004C     RESERVED
RESERV004D            0x004D     RESERVED
RESERV004E            0x004E     RESERVED
RESERV004F            0x004F     RESERVED
RESERV0050            0x0050     RESERVED
TBSC                  0x0051     TIMB Status_Control Register
TBSC.TOF               7   TIMB Overflow Flag
TBSC.TOIE              6   TIMB Overflow Interrupt Enable Bit
TBSC.TSTOP             5   TIMB Stop Bit
TBSC.TRST              4   TIMB Reset Bit
TBSC.PS2               2   Prescaler Select Bits 2
TBSC.PS1               1   Prescaler Select Bits 1
TBSC.PS0               0   Prescaler Select Bits 0
TBCNTH                0x0052     TIMB Counter Register High
TBCNTL                0x0053     TIMB Counter Register Low
TBMODH                0x0054     TIMB Counter Modulo Register High
TBMODL                0x0055     TIMB Counter Modulo Register Low
TBSC0                 0x0056     TIMB Channel 0 Status_Control Register
TBSC0.CH0F             7   Channel 0 Flag
TBSC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TBSC0.MS0B             5   Mode Select Bit B
TBSC0.MS0A             4   Mode Select Bit A
TBSC0.ELS0B            3   Edge/Level Select Bits
TBSC0.ELS0A            2   Edge/Level Select Bits
TBSC0.TOV0             1   Toggle-On-Overflow Bit
TBSC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TBCH0H                0x0057     TIMB Channel 0 Register High
TBCH0L                0x0058     TIMB Channel 0 Register Low
TBSC1                 0x0059     TIMB Channel 1 Status_Control Register
TBSC1.CH1F             7   Channel 1 Flag                
TBSC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TBSC1.MS1A             4   Mode Select Bit A               
TBSC1.ELS1B            3   Edge/Level Select Bits          
TBSC1.ELS1A            2   Edge/Level Select Bits          
TBSC1.TOV1             1   Toggle-On-Overflow Bit          
TBSC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TBCH1H                0x005A     TIMB Channel 1 Register High
TBCH1L                0x005B     TIMB Channel 1 Register Low
PCTL                  0x005C     PLL Control Register
PCTL.PLLF              7   PLL Interrupt Flag
PCTL.PLLIE             6   PLL Interrupt Enable Bit
PCTL.PLLON             5   PLL On Bit
PCTL.BCS               4   Base Clock Select Bit
PBWC                  0x005D     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               5   Acquisition Mode Bit
PBWC.XLD               4   Crystal Loss Detect Bit
PPG                   0x005E     PLL Programming Register
PPG.MUL7               7   Multiplier Select Bits 7
PPG.MUL6               6   Multiplier Select Bits 6
PPG.MUL5               5   Multiplier Select Bits 5
PPG.MUL4               4   Multiplier Select Bits 4
PPG.VRS7               3   VCO Range Select Bits 7
PPG.VRS6               2   VCO Range Select Bits 6
PPG.VRS5               1   VCO Range Select Bits 5
PPG.VRS4               0   VCO Range Select Bits 4
RESERV005F            0x005F     RESERVED
SBSR                  0xFE00     SIM Break Status Register
SBSR.SBSW              1   SIM Break Stop/Wait Bit
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Bit
SRSR.PIN               6   External Reset Bit
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit (opcode fetches only)
SRSR.MENRST            2   Forced Monitor Mode Entry Reset Bit
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
FLCR                  0xFE08     FLASH Control Register
FLCR.HVEN              3   High-Voltage Enable Bit
FLCR.MASS              2   Mass Erase Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
BRKH                  0xFE0C     Break Address Register High
BRKL                  0xFE0D     Break Address Register Low
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
LVISCR                0xFE0F     LVI Status and Control Register
LVISCR.LVIOUT          7   LVI Output Bit
LVISCR.TRPSEL          5   LVI Trip Select Bit
FLBPR                 0xFF7E     FLASH Block Protect Register
FLBPR.BPR7             7   FLASH Block Protect Bits 7
FLBPR.BPR6             6   FLASH Block Protect Bits 6
FLBPR.BPR5             5   FLASH Block Protect Bits 5
FLBPR.BPR4             4   FLASH Block Protect Bits 4
FLBPR.BPR3             3   FLASH Block Protect Bits 3
FLBPR.BPR2             2   FLASH Block Protect Bits 2
FLBPR.BPR1             1   FLASH Block Protect Bits 1
FLBPR.BPR0             0   FLASH Block Protect Bits 0
COPCTL                0xFFFF     COP Control Register


.68HC908MR8
; MC68HC908MR8/D  http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=68HC908MR8&nodeId=01M98634
; MC68HC908MR8.pdf


; MEMORY MAP
area DATA FSR		  0x0000:0x0060
area DATA RAM		  0x0060:0x0160
area BSS  UNIMPLEMENTED	  0x0160:0xE000
area DATA FLASH_MEMORY	  0xEE00:0xFE00
area DATA FSR_1		  0xFE00:0xFE10
area DATA MONITOR_ROM	  0xFE10:0xFF49
area BSS  UNIMPLEMENTED	  0xFF49:0xFFD2
area DATA USER_VEC	  0xFFD2:0x10000


; Interrupt and reset vector assignments
interrupt __RESET     0xFFFE       Reset vector
interrupt SWI         0xFFFC       SWI vector
interrupt IRQ         0xFFFA       IRQ vector
interrupt PLL         0xFFF8       PLL vector
interrupt FAULT_1     0xFFF6       FAULT 1
interrupt FAULT_4     0xFFF0       FAULT 4
interrupt PWMMC       0xFFEE       PWMMC vector
interrupt TIMA_CH0    0xFFEC       TIMA channel 0 vector
interrupt TIMA_CH1    0xFFEA       TIMA channel 1 vector
interrupt TIMA        0xFFE4       TIMA overflow vector
interrupt TIMB_CH0    0xFFE2       TIMB channel 0 vector
interrupt TIMB_CH1    0xFFE0       TIMB channel 1 vector
interrupt TIMB        0xFFDE       TIMB overflow vector
interrupt A_D         0xFFDC       A/D vector
interrupt SCI_E       0xFFD6       SCI error vector
interrupt SCI_R       0xFFD4       SCI receive vector
interrupt SCI_T       0xFFD2       SCI transmit vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register Read
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
PTC                   0x0002     Port C Data Register
PTC.PTC1               1   Port C Data Bits 1
PTC.PTC0               0   Port C Data Bits 0
UNUSED0003            0x0003     UNUSED
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
DDRC                  0x0006     Data Direction Register C
DDRC.DDRC1             1   Data Direction Register C Bits 1
DDRC.DDRC0             0   Data Direction Register C Bits 0
UNUSED0007            0x0007     UNUSED
UNUSED0008            0x0008     UNUSED
UNUSED0009            0x0009     UNUSED
UNUSED000A            0x000A     UNUSED
UNUSED000B            0x000B     UNUSED
UNUSED000C            0x000C     UNUSED
UNUSED000D            0x000D     UNUSED
TASC                  0x000E     TIMA Status_Control Register
TASC.TOF               7   TIMA Overflow Flag Bit
TASC.TOIE              6   TIMA Overflow Interrupt Enable Bit
TASC.TSTOP             5   TIMA Stop Bit
TASC.TRST              4   TIMA Reset Bit
TASC.PS2               2   Prescaler Select Bits 2
TASC.PS1               1   Prescaler Select Bits 1
TASC.PS0               0   Prescaler Select Bits 0
TACNTH                0x000F     TIMA Counter Register High
TACNTL                0x0010     TIMA Counter Register Low
TAMODH                0x0011     TIMA Counter Modulo Register High
TAMODL                0x0012     TIMA Counter Modulo Register Low
TASC0                 0x0013     TIMA Channel 0 Status_Control Register
TASC0.CH0F             7   Channel 0 Flag Bit
TASC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TASC0.MS0B             5   Mode Select Bit B
TASC0.MS0A             4   Mode Select Bit A
TASC0.ELS0B            3   Edge/Level Select Bits
TASC0.ELS0A            2   Edge/Level Select Bits
TASC0.TOV0             1   Toggle-On-Overflow Bit
TASC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TACH0H                0x0014     TIMA Channel 0 Register High
TACH0L                0x0015     TIMA Channel 0 Register Low
TASC1                 0x0016     TIMA Channel 1 Status_Control Register
TASC1.CH1F             7   Channel 1 Flag Bit            
TASC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TASC1.MS1A             4   Mode Select Bit A               
TASC1.ELS1B            3   Edge/Level Select Bits          
TASC1.ELS1A            2   Edge/Level Select Bits          
TASC1.TOV1             1   Toggle-On-Overflow Bit          
TASC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TACH1H                0x0017     TIMA Channel 1 Register High
TACH1L                0x0018     TIMA Channel 1 Register Low
UNUSED0019            0x0019     UNUSED
UNUSED001A            0x001A     UNUSED
RESERV001B            0x001B     RESERVED
CONFIG                0x001F     MC68HC908MR8 Configuration Register
CONFIG.EDGE            7   Edge-Align Enable Bit
CONFIG.BOTNEG          6   Bottom-Side PWM Polarity Bit
CONFIG.TOPNEG          5   Top-Side PWM Polarity Bit
CONFIG.INDEP           4   Independent Mode Enable Bit
CONFIG.LVIRST          3   LVI Power Enable Bit
CONFIG.LVIPWR          2   LVI Reset Enable Bit
CONFIG.STOPE           1   STOP Enable Bit
CONFIG.COPD            0   COP Disable Bit
PCTL1                 0x0020     PWM Control Register 1
PCTL1.DISX             7   Software Disable for Bank X Bit
PCTL1.DISY             6   Software Disable for Bank Y Bit
PCTL1.PWMINT           5   PWM Interrupt Enable Bit
PCTL1.PWMF             4   PWM Reload Flag
PCTL1.LDOK             1   Load OK Bit
PCTL1.PWMEN            0   PWM Module Enable Bit
PCTL2                 0x0021     PWM Control Register 2
PCTL2.LDFQ1            7   PWM Load Frequency Bits
PCTL2.LDFQ0            6   PWM Load Frequency Bits
PCTL2.SEL12            4   Top/Bottom Correction Bit for PWM Pair 1 (PWMs 1 and 2)
PCTL2.SEL34            3   Top/Bottom Correction Bit for PWM Pair 2 (PWMs 3 and 4)
PCTL2.SEL56            2   Top/Bottom Correction Bit for PWM Pair 3 (PWMs 5 and 6)
PCTL2.PRSC1            1   PWM Prescaler Bits 1
PCTL2.PRSC0            0   PWM Prescaler Bits 0
FCR                   0x0022     Fault Control Register
FCR.FINT4              7   Fault 4 Interrupt Enable Bit
FCR.FMODE4             6   Fault Mode Selection for Fault Pin 4 Bit
FCR.FINT1              1   Fault 1 Interrupt Enable Bit
FCR.FMODE1             0   Fault Mode Selection for Fault Pin 1 Bit
_FSR_                 0x0023     Fault Status Register
_FSR_.FPIN4            7   State of Fault Pin 4 Bit
_FSR_.FFLAG4           6   Fault Event Flag 4
_FSR_.FPIN1            1   State of Fault Pin 1
_FSR_.FFLAG1           0   Fault Event Flag 1
FTACK                 0x0024     Fault Acknowledge Register
FTACK.FTACK4           6   Fault Acknowledge 4 Bit
FTACK.FTACK1           0   Fault Acknowledge 1 Bit
PWMOUT                0x0025     PWM Output Control
PWMOUT.OUTCTL          6   Output Control Enable Bit    
PWMOUT.OUT6            5   PWM Pin Output Control Bits 6
PWMOUT.OUT5            4   PWM Pin Output Control Bits 5
PWMOUT.OUT4            3   PWM Pin Output Control Bits 4
PWMOUT.OUT3            2   PWM Pin Output Control Bits 3
PWMOUT.OUT2            1   PWM Pin Output Control Bits 2
PWMOUT.OUT1            0   PWM Pin Output Control Bits 1
PCNTH                 0x0026     PWM Counter Register High
PCNTL                 0x0027     PWM Counter Register Low
PMODH                 0x0028     PWM Counter Modulo Register High
PMODL                 0x0029     PWM Counter Modulo Register Low
PVAL1H                0x002A     PWM 1 Value Register High
PVAL1L                0x002B     PWM 1 Value Register Low
PVAL2H                0x002C     PWM 2 Value Register High
PVAL2L                0x002D     PWM 2 Value Register Low
PVAL3H                0x002E     PWM 3 Value Register High
PVAL3L                0x002F     PWM 3 Value Register Low
PVAL4H                0x0030     PWM 4 Value Register High
PVAL4L                0x0031     PWM 4 Value Register Low
PMVAL5H               0x0032     PWM 5 Value Register High
PVAL5L                0x0033     PWM 5 Value Register Low
PVAL6H                0x0034     PWM 6 Value Register High
PMVAL6L               0x0035     PWM 6 Value Register Low
DEADTM                0x0036     Dead-Time Write-Once Register
DISMAP                0x0037     PWM Disable Mapping Write-Once Register
SCC1                  0x0038     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit
SCC1.ENSCI             6   Enable SCI Bit
SCC1.TXINV             5   Transmit Inversion Bit
SCC1.M                 4   Mode (Character Length) Bit
SCC1.WAKE              3   Wakeup Condition Bit
SCC1.ILTY              2   Idle Line Type Bit
SCC1.PEN               1   Parity Enable Bit
SCC1.PTY               0   Parity Bit
SCC2                  0x0039     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit
SCC2.ILIE              4   Idle Line Interrupt Enable Bit
SCC2.TE                3   Transmitter Enable Bit
SCC2.RE                2   Receiver Enable Bit
SCC2.RWU               1   Receiver Wakeup Bit
SCC2.SBK               0   Send Break Bit
SCC3                  0x003A     SCI Control Register 3
SCC3.R8                7   Received Bit 8
SCC3.T8                6   Transmitted Bit 8
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit
SCS1                  0x003B     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit
SCS1.TC                6   Transmission Complete Bit
SCS1.SCRF              5   SCI Receiver Full Bit
SCS1.IDLE              4   Receiver Idle Bit
SCS1.OR                3   Receiver Overrun Bit
SCS1.NF                2   Receiver Noise Flag Bit
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit
SCS2                  0x003C     SCI Status Register 2
SCS2.BKF               1   Break Flag Bit
SCS2.RPF               0   Reception-in-Progress Flag Bit
SCDR                  0x003D     SCI Data Register
SCDR.R7_T7             7   Receive/Transmit Data Bits 7
SCDR.R6_T6             6   Receive/Transmit Data Bits 6
SCDR.R5_T5             5   Receive/Transmit Data Bits 5
SCDR.R4_T4             4   Receive/Transmit Data Bits 4
SCDR.R3_T3             3   Receive/Transmit Data Bits 3
SCDR.R2_T2             2   Receive/Transmit Data Bits 2
SCDR.R1_T1             1   Receive/Transmit Data Bits 1
SCDR.R0_T0             0   Receive/Transmit Data Bits 0
SCBR                  0x003E     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2
SCBR.SCR1              1   SCI Baud Rate Select Bits 1
SCBR.SCR0              0   SCI Baud Rate Select Bits 0
ISCR                  0x003F     IRQ Status_Control Register
ISCR.IRQF              3   IRQ Flag
ISCR.ACK1              2   IRQ Interrupt Request Acknowledge Bit
ISCR.IMASK1            1   IRQ Interrupt Mask Bit
ISCR.MODE1             0   IRQ Edge/Level Select Bit
ADSCR                 0x0040     ADC Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.ADCH4            4   ADC Channel Select Bits 4
ADSCR.ADCH3            3   ADC Channel Select Bits 3
ADSCR.ADCH2            2   ADC Channel Select Bits 2
ADSCR.ADCH1            1   ADC Channel Select Bits 1
ADSCR.ADCH0            0   ADC Channel Select Bits 0
ADRH                  0x0041     ADC Data Register High
ADRH.AD9               1
ADRH.AD8               0
ADRL                  0x0042     ADC Data Register Low
ADRL.AD7               7
ADRL.AD6               6
ADRL.AD5               5
ADRL.AD4               4
ADRL.AD3               3
ADRL.AD2               2
ADRL.AD1               1
ADRL.AD0               0
ADCLK                 0x0043     ADC Clock Register
ADCLK.ADIV2            7   ADC Clock Prescaler Bits 2
ADCLK.ADIV1            6   ADC Clock Prescaler Bits 1
ADCLK.ADIV0            5   ADC Clock Prescaler Bits 0
ADCLK.ADICLK           4   ADC Input Clock Select Bit
ADCLK.MODE1            3   Modes of Result Justification Bits 1
ADCLK.MODE0            2   Modes of Result Justification Bits 0
UNUSED0044            0x0044     UNUSED
UNUSED0045            0x0045     UNUSED
UNUSED0046            0x0046     UNUSED
UNUSED0047            0x0047     UNUSED
UNUSED0048            0x0048     UNUSED
UNUSED0049            0x0049     UNUSED
UNUSED004A            0x004A     UNUSED
UNUSED004B            0x004B     UNUSED
UNUSED004C            0x004C     UNUSED
UNUSED004D            0x004D     UNUSED
UNUSED004E            0x004E     UNUSED
UNUSED004F            0x004F     UNUSED
UNUSED0050            0x0050     UNUSED
TBSC                  0x0051     TIMB Status_Control Register
TBSC.TOF               7   TIMB Overflow Flag Bit
TBSC.TOIE              6   TIMB Overflow Interrupt Enable Bit
TBSC.TSTOP             5   TIMB Stop Bit
TBSC.TRST              4   TIMB Reset Bit
TBSC.PS2               2   Prescaler Select Bits 2
TBSC.PS1               1   Prescaler Select Bits 1
TBSC.PS0               0   Prescaler Select Bits 0
TBCNTH                0x0052     TIMB Counter Register High
TBCNTL                0x0053     TIMB Counter Register Low
TBMODH                0x0054     TIMB Counter Modulo Register High
TBMODL                0x0055     TIMB Counter Modulo Register Low
TBSC0                 0x0056     TIMB Channel 0 Status_Control Register
TBSC0.CH0F             7   Channel 0 Flag Bit
TBSC0.CH0IE            6   Channel 0 Interrupt Enable Bit
TBSC0.MS0B             5   Mode Select Bit B             	
TBSC0.MS0A             4   Mode Select Bit A
TBSC0.ELS0B            3   Edge/Level Select Bits
TBSC0.ELS0A            2   Edge/Level Select Bits
TBSC0.TOV0             1   Toggle-On-Overflow Bit
TBSC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
TBCH0H                0x0057     TIMB Channel 0 Register High
TBCH0L                0x0058     TIMB Channel 0 Register Low
TBSC1                 0x0059     TIMB Channel 1 Status_Control Register
TBSC1.CH1F             7   Channel 1 Flag Bit            
TBSC1.CH1IE            6   Channel 1 Interrupt Enable Bit
TBSC1.MS1A             4   Mode Select Bit A               
TBSC1.ELS1B            3   Edge/Level Select Bits          
TBSC1.ELS1A            2   Edge/Level Select Bits          
TBSC1.TOV1             1   Toggle-On-Overflow Bit          
TBSC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
TBCH1H                0x005A     TIMB Channel 1 Register High
TBCH1L                0x005B     TIMB Channel 1 Register Low
PCTL                  0x005C     PLL Control Register
PCTL.PLLIE             7   PLL Interrupt Enable Bit
PCTL.PLLF              6   PLL Interrupt Flag Bit
PCTL.PLLON             5   PLL On Bit
PCTL.BCS               4   Base Clock Select Bit
PBWC                  0x005D     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               5   Acquisition Mode Bit
PBWC.XLD               4   Crystal Loss Detect Bit
PPG                   0x005E     PLL Programming Register
PPG.MUL7               7   Multiplier Select Bits 7
PPG.MUL6               6   Multiplier Select Bits 6
PPG.MUL5               5   Multiplier Select Bits 5
PPG.MUL4               4   Multiplier Select Bits 4
PPG.VRS7               3   VCO Range Select Bits 7
PPG.VRS6               2   VCO Range Select Bits 6
PPG.VRS5               1   VCO Range Select Bits 5
PPG.VRS4               0   VCO Range Select Bits 4
Reserv005F            0x005F     RESERVED
SBSR                  0xFE00     SIM Break Status Register
SBSR.SBSW              1   Break Wait Bit
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Bit
SRSR.PIN               6   External Reset Bit
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit (opcode fetches only)
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
FLCR                  0xFE08     MC68HC908MR8 FLASH Control Register
FLCR.HVEN              3   High-Voltage Enable Bit
FLCR.MASS              2   Mass Erase Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
FTLCR                 0xFE0A     MC68HC908MR8 FLASH Test Control Register
FTLCR.PMRG             2
FTLCR.EMRG             1
FTLCR.BPGM             0
BRKH                  0xFE0C     Break Address Register High
BRKL                  0xFE0D     Break Address Register Low
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
LVISCR                0xFE0F     LVI Status and Control Register
LVISCR.LVIOUT          7   LVI Output Bit
LVISCR.TRPSEL          5   LVI Trip Select Bit
FLBPR                 0xFF7E     FLASH Block Protect Register (MC68HC908MR8)
FLBPR.BPR7             7   Block Protect Register Bits 7
FLBPR.BPR6             6   Block Protect Register Bits 6
FLBPR.BPR5             5   Block Protect Register Bits 5
FLBPR.BPR4             4   Block Protect Register Bits 4
FLBPR.BPR3             3   Block Protect Register Bits 3
FLBPR.BPR2             2   Block Protect Register Bits 2
FLBPR.BPR1             1   Block Protect Register Bits 1
FLBPR.BPR0             0   Block Protect Register Bits 0
ReservFFD8            0xFFD8     Reserved
ReservFFD9            0xFFD9     Reserved
ReservFFDA            0xFFDA     Reserved
ReservFFDB            0xFFDB     Reserved
ReservFFE6            0xFFE6     Reserved
ReservFFE7            0xFFE7     Reserved
ReservFFE8            0xFFE8     Reserved
ReservFFE9            0xFFE9     Reserved
ReservFFF2            0xFFF2     Reserved
ReservFFF3            0xFFF3     Reserved
ReservFFF4            0xFFF4     Reserved
ReservFFF5            0xFFF5     Reserved
COPCTL                0xFFFF     COP Control Register


.68HC908RC24
; MC68HC908RC24/D  http://e-www.motorola.com/brdata/PDFDB/docs/MC68HC908RC24.pdf
; MC68HC908RC24.pdf

; 24,064 bytes of FLASH memory
; 352 bytes of random-access memory (RAM)
; 12 bytes of user-defined vectors
; 240 bytes of monitor ROM (MON)


; MEMORY MAP
area DATA FSR		   0x0000:0x0020
area DATA RAM		   0x0020:0x0180
area BSS  UNIMPLEMENTED	   0x0180:0xA000
area DATA FLASH		   0xA000:0xFE00
area DATA FSR_1		   0xFE00:0xFE10
area DATA MONITOR_ROM	   0xFE10:0xFF00
area BSS  UNIMPLEMENTED	   0xFF00:0xFF80
area DATA FSR_2		   0xFF80:0xFF81
area BSS  UNIMPLEMENTED	   0xFF81:0xFFF4
area DATA USER_VEC	   0xFFF4:0x10000


; Interrupt and reset vector assignments
interrupt __RESET   0xFFFE       Reset vector
interrupt SWI       0xFFFC       SWI vector
interrupt IRQ1      0xFFFA       IRQ1 vector
interrupt CMT       0xFFF8       CMT vector
interrupt TIM       0xFFF6       TIM overflow vector
interrupt KBRD      0xFFF4       Keyboard vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bits 7
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
PTC                   0x0002     Port C Data Register
PTC.PTC3               3   Port C Data Bits 3
PTC.PTC2               2   Port C Data Bits 2
PTC.PTC1               1   Port C Data Bits 1
PTC.PTC0               0   Port C Data Bits 0
RESERV0003            0x0003     RESERVED
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bits 7
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
DDRC                  0x0006     Data Direction Register C
DDRC.DDRC3             3   Data Direction Register C Bits 3
DDRC.DDRC2             2   Data Direction Register C Bits 2
DDRC.DDRC1             1   Data Direction Register C Bits 1
DDRC.DDRC0             0   Data Direction Register C Bits 0
RESERV0007            0x0007     RESERVED
RESERV0008            0x0008     RESERVED
RESERV0009            0x0009     RESERVED
RESERV000A            0x000A     RESERVED
RESERV000B            0x000B     RESERVED
RESERV000C            0x000C     RESERVED
KBSCR                 0x000D     Register Keyboard Status and Control
KBSCR.KEYF             3   Keyboard Flag
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
KBIER                 0x000E     Keyboard Interrupt Enable Register
KBIER.KBIE7            7   Keyboard Interrupt Enable Bits 7
KBIER.KBIE6            6   Keyboard Interrupt Enable Bits 6
KBIER.KBIE5            5   Keyboard Interrupt Enable Bits 5
KBIER.KBIE4            4   Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Keyboard Interrupt Enable Bits 0
ISCR                  0x000F     IRQ Status and Control Register
ISCR.IRQF1             3   IRQ1 Flag
ISCR.ACK1              2   IRQ1 Interrupt Request Acknowledge Bit
ISCR.IMASK1            1   IRQ1 Interrupt Mask Bit
ISCR.MODE1             0   IRQ1 Edge/Level Select Bit
CCH1                  0x0010     CMT Carrier Generator High Data Register 1
CCH1.IROLN             7   IRO Latch Control Bit
CCH1.CMTPOL            6   CMT Output Polarity Bit
CCH1.PH5               5   Primary Carrier High Time Data Values 5
CCH1.PH4               4   Primary Carrier High Time Data Values 4
CCH1.PH3               3   Primary Carrier High Time Data Values 3
CCH1.PH2               2   Primary Carrier High Time Data Values 2
CCH1.PH1               1   Primary Carrier High Time Data Values 1
CCH1.PH0               0   Primary Carrier High Time Data Values 0
CCL1                  0x0011     CMT Carrier Generator Low Data Register 1
CCL1.IROLP             7   IRO Latch Control Bit
CCL1.PL5               5   Primary Carrier Low Time Data Values 5
CCL1.PL4               4   Primary Carrier Low Time Data Values 4
CCL1.PL3               3   Primary Carrier Low Time Data Values 3
CCL1.PL2               2   Primary Carrier Low Time Data Values 2
CCL1.PL1               1   Primary Carrier Low Time Data Values 1
CCL1.PL0               0   Primary Carrier Low Time Data Values 0
CCH2                  0x0012     CMT Carrier Generator High Data Register 2
CCH2.SH5               5   Secondary Carrier High Time Data Values 5
CCH2.SH4               4   Secondary Carrier High Time Data Values 4
CCH2.SH3               3   Secondary Carrier High Time Data Values 3
CCH2.SH2               2   Secondary Carrier High Time Data Values 2
CCH2.SH1               1   Secondary Carrier High Time Data Values 1
CCH2.SH0               0   Secondary Carrier High Time Data Values
CCL2                  0x0013     CMT Carrier Generator Low Data Register 2
CCL2.SL5               5   Secondary Carrier Low Time Data Values 5
CCL2.SL4               4   Secondary Carrier Low Time Data Values 4
CCL2.SL3               3   Secondary Carrier Low Time Data Values 3
CCL2.SL2               2   Secondary Carrier Low Time Data Values 2
CCL2.SL1               1   Secondary Carrier Low Time Data Values 1
CCL2.SL0               0   Secondary Carrier Low Time Data Values 0
CMCS                  0x0014     CMT Modulator Control and Status Register
CMCS.EOCF              7   End-of-Cycle Status Flag
CMCS.DIV2              6   Divide-by-Two Prescaler Bit
CMCS.EXSPC             4   Extended Space Enable Bit
CMCS.BASE              3   Baseband Enable Bit
CMCS.MODE              2   Mode Select Bit
CMCS.EOCIE             1   End-of-Cycle Interrupt Enable Bit
CMCS.MCGEN             0   Modulator and Carrier Generator Enable Bit
CMD1                  0x0015     CMT Modulator Data Register 1
CMD1.MB11              7
CMD1.MB10              6
CMD1.MB9               5
CMD1.MB8               4
CMD1.SB11              3
CMD1.SB10              2
CMD1.SB9               1
CMD1.SB8               0
CMD2                  0x0016     CMT Modulator Data Register 2
CMD2.MB7               7
CMD2.MB6               6
CMD2.MB5               5
CMD2.MB4               4
CMD2.MB3               3
CMD2.MB2               2
CMD2.MB1               1
CMD2.MB0               0
CMD3                  0x0017     CMT Modulator Data Register 3
CMD3.SB7               7
CMD3.SB6               6
CMD3.SB5               5
CMD3.SB4               4
CMD3.SB3               3
CMD3.SB2               2
CMD3.SB1               1
CMD3.SB0               0
TSC                   0x0018     TIM0I Status and Control Register
TSC.TOF                7   TIM0I Overflow Flag Bit
TSC.TOIE               6   TIM0I Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM0I Stop Bit
TSC.TRST               4   TIM0I Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
TCNTH                 0x0019     TIM0I Counter Register High
TCNTL                 0x001A     TIM0I Counter Register Low
TMODH                 0x001B     TIM0I Counter Modulo Register High
TMODL                 0x001C     TIM0I Counter Modulo Register Low
LVISR                 0x001D     LVI Status Register
LVISR.LOWV             5   LVI Low Indicator Bit
RESERV001E            0x001E     RESERVED
CONFIG                0x001F     Configuration Register
CONFIG.SSREC           3   Short Stop Recovery Bit
CONFIG.COPRS           2   COP Rate Select Bit
CONFIG.STOP            1   STOP Instruction Enable Bit
CONFIG.COPD            0   COP Disable Bit
BSR                   0xFE00     Break Status Register
BSR.BW                 1   Break Wait Bit
RSR                   0xFE01     Reset Status Register
RSR.POR                7   Power-On Reset Flag
RSR.PIN                6   External Reset Flag
RSR.COP                5   Computer Operating Properly Reset Bit
RSR.ILOP               4   Illegal Opcode Reset Bit
RSR.ILAD               3   Illegal Address Reset Bit
RSR.LPRST              1   Low-Power Mode Reset Bit
BFCR                  0xFE03     Break Flag Control Register
BFCR.BCFE              7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF6               7   Interrupt Flags 6
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF2               3   Interrupt Flags 2
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flags 14
INT2.IF13              6   Interrupt Flags 13
INT2.IF12              5   Interrupt Flags 12
INT2.IF11              4   Interrupt Flags 11
INT2.IF10              3   Interrupt Flags 10
INT2.IF9               2   Interrupt Flags 9
INT2.IF8               1   Interrupt Flags 8
INT2.IF7               0   Interrupt Flags 7
ReservFE06            0xFE06     RESERVED
RESERVFE07            0xFE07     RESERVED
ReservFE08            0xFE08     RESERVED
FLCR                  0xFE09     FLASH Control Register
FLCR.FDIV1             7   Frequency Divide Control Bit 1
FLCR.FDIV0             6   Frequency Divide Control Bit 0
FLCR.BLK1              5   Block Erase Control Bit 1
FLCR.BLK0              4   Block Erase Control Bit 0
FLCR.HVEN              3   High-Voltage Enable Bit
FLCR.VERF              2   Verify Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
BRKH                  0xFE0C     Break Address Register High
BRKL                  0xFE0D     Break Address Register Low
BSCR                  0xFE0E     Break Status and Control Register
BSCR.BRKE              7   Break Enable Bit
BSCR.BRKA              6   Break Active Bit
FLBPR                 0xFF80     FLASH Block Protect Register
FLBPR.BPR3             3   Block Protect Register Bit 3
FLBPR.BPR2             2   Block Protect Register Bit 2
FLBPR.BPR1             1   Block Protect Register Bit 1
FLBPR.BPR0             0   Block Protect Register Bit 0
COPCTL                0xFFFF     COP Control Register


.68HC908RF2
; MC68HC908RF2/D  http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=68HC908RF2&nodeId=01M98634
; MC68HC908RF2.pdf

; 2031 bytes of user FLASH memory
; 128 bytes of random-access memory (RAM)
; 14 bytes of user-defined vectors in FLASH memory
; 768 bytes of monitor read-only memory (ROM)


; MEMORY MAP
area DATA FSR		    0x0000:0x0040
area BSS  UNIMPLEMENTED	    0x0040:0x0080
area DATA RAM		    0x0080:0x0100
area BSS  UNIMPLEMENTED	    0x0100:0x7800
area DATA FLASH		    0x7800:0x7FEF
area DATA FSR_1		    0x7FEF:0x7FF0
area BSS  UNIMPLEMENTED	    0x7FF0:0xF000
area DATA MONITOR_ROM1	    0xF000:0xF2F0
area BSS  UNIMPLEMENTED	    0xF2F0:0xFE00
area DATA FSR_2		    0xFE00:0xFE10
area BSS  UNIMPLEMENTED	    0xFE10:0xFEF0
area DATA MONITOR_ROM2	    0xFEF0:0xFF00
area BSS  UNIMPLEMENTED	    0xFF00:0xFFF0
area DATA FSR_3		    0xFFF0:0xFFF2
area DATA USER_VEC	    0xFFF2:0x10000


; Interrupt and reset vector assignments
interrupt __RESET     0xFFFE       Reset vector
interrupt SWI         0xFFFC       SWI vector
interrupt IRQ1_KBRD   0xFFFA       IRQ1/keyboard vector
interrupt TIM_CH0     0xFFF8       TIM channel 0 vector
interrupt TIM_CH1     0xFFF6       TIM channel 1 vector
interrupt TIM         0xFFF4       TIM overflow vector
interrupt ICG         0xFFF2       ICG vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bits 7
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
RESERV0002            0x0002     RESERVED
RESERV0003            0x0003     RESERVED
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bits 7
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.MCLKEN            7   MCLK Enable Bit
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
RESERV0006            0x0006     RESERVED
RESERV0007            0x0007     RESERVED
RESERV0008            0x0008     RESERVED
RESERV0009            0x0009     RESERVED
RESERV000A            0x000A     RESERVED
RESERV000B            0x000B     RESERVED
RESERV000C            0x000C     RESERVED
RESERV000D            0x000D     RESERVED
RESERV000E            0x000E     RESERVED
RESERV000F            0x000F     RESERVED
RESERV0010            0x0010     RESERVED
RESERV0011            0x0011     RESERVED
RESERV0012            0x0012     RESERVED
RESERV0013            0x0013     RESERVED
RESERV0014            0x0014     RESERVED
RESERV0015            0x0015     RESERVED
RESERV0016            0x0016     RESERVED
RESERV0017            0x0017     RESERVED
RESERV0018            0x0018     RESERVED
RESERV0019            0x0019     RESERVED
INTKBSCR              0x001A     IRQ and Keyboard Status and Control Register
INTKBSCR.IRQ1F         7   IRQ1 Flag Bit
INTKBSCR.ACKI          6   IRQ1 Interrupt Request Acknowledge Bit
INTKBSCR.IMASKI        5   IRQ1 Interrupt Mask Bit
INTKBSCR.MODEI         4   IRQ1 Triggering Sensitivity Bit
INTKBSCR.KEYF          3   Keyboard Flag Bit
INTKBSCR.ACKK          2   Keyboard Acknowledge Bit
INTKBSCR.IMASKK        1   Keyboard Interrupt Mask Bit
INTKBSCR.MODEK         0   Keyboard Triggering Sensitivity Bit
INTKBIER              0x001B     Keyboard Interrupt Enable Register
INTKBIER.KBIE6         6   Keyboard Interrupt Enable Bits 6
INTKBIER.KBIE5         5   Keyboard Interrupt Enable Bits 5
INTKBIER.KBIE4         4   Keyboard Interrupt Enable Bits 4
INTKBIER.KBIE3         3   Keyboard Interrupt Enable Bits 3
INTKBIER.KBIE2         2   Keyboard Interrupt Enable Bits 2
INTKBIER.KBIE1         1   Keyboard Interrupt Enable Bits 1
RESERV001C            0x001C     RESERVED
RESERV001D            0x001D     RESERVED
RESERV001E            0x001E     RESERVED
CONFIG                0x001F     Configuration Register
CONFIG.EXTSLOW         7   Slow External Crystal Enable Bit
CONFIG.LVISTOP         6   LVI Enable in Stop Mode Bit
CONFIG.LVIRST          5   LVI Reset Enable Bit
CONFIG.LVIPWR          4   LVI Power Enable Bit
CONFIG.COPRS           3   COP Rate Select Bit
CONFIG.SSREC           2   Short Stop Recovery Bit
CONFIG.STOP            1   STOP Instruction Enable Bit
CONFIG.COPD            0   COP Disable Bit
TSC                   0x0020     Timer Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
TCNTH                 0x0021     Timer Counter RegisterHigh
TCNTL                 0x0022     Timer Counter Register Low
TMODH                 0x0023     Timer Counter Modulo Register High
TMODL                 0x0024     Timer Counter Modulo Register Low
TSC0                  0x0025     Timer Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit
TSC0.MS0B              5   Mode Select Bit B
TSC0.MS0A              4   Mode Select Bit A
TSC0.ELS0B             3   Edge/Level Select Bits
TSC0.ELS0A             2   Edge/Level Select Bits
TSC0.TOV0              1   Toggle On Overflow Bit
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0026     Timer Channel 0 Register High
TCH0L                 0x0027     Timer Channel 0 Register Low
TSC1                  0x0028     Timer Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 1 Flag Bit            
TSC1.CH1IE             6   Channel 1 Interrupt Enable Bit
TSC1.MS1A              4   Mode Select Bit A               
TSC1.ELS1B             3   Edge/Level Select Bits          
TSC1.ELS1A             2   Edge/Level Select Bits          
TSC1.TOV1              1   Toggle On Overflow Bit          
TSC1.CH1MAX            0   Channel 1 Maximum Duty Cycle Bit
TCH1H                 0x0029     Timer Channel 1 Register High
TCH1L                 0x002A     Timer Channel 1 Register Low
RESERV002C            0x002C     RESERVED
RESERV002E            0x002E     RESERVED
RESERV002F            0x002F     RESERVED
RESERV0030            0x0030     RESERVED
RESERV0031            0x0031     RESERVED
RESERV0032            0x0032     RESERVED
RESERV0033            0x0033     RESERVED
RESERV0034            0x0034     RESERVED
RESERV0035            0x0035     RESERVED
ICGCR                 0x0036     Internal Clock Generator Control Register
ICGCR.CMIE             7   Clock Monitor Interrupt Enable Bit
ICGCR.CMF              6   Clock Monitor Interrupt Flag
ICGCR.CMON             5   Clock Monitor On Bit
ICGCR.CS               4   Clock Select Bit
ICGCR.ICGS             3   Internal Clock Generator Stable Bit
ICGCR.ICGON            2   Internal Clock Generator On Bit
ICGCR.ECGON            1   External Clock Generator On Bit
ICGCR.ECGS             0   External Clock Generator Stable Bit
ICGMR                 0x0037     Internal Clock Generator Multiplier Register
ICGMR.N6               6   ICG Multiplier Factor Bits 6
ICGMR.N5               5   ICG Multiplier Factor Bits 5
ICGMR.N4               4   ICG Multiplier Factor Bits 4
ICGMR.N3               3   ICG Multiplier Factor Bits 3
ICGMR.N2               2   ICG Multiplier Factor Bits 2
ICGMR.N1               1   ICG Multiplier Factor Bits 1
ICGMR.N0               0   ICG Multiplier Factor Bits 0
ICGTR                 0x0038     Internal Clock Generator Trim Register
ICGTR.TRIM7            7   ICG Trim Factor Bits 7
ICGTR.TRIM6            6   ICG Trim Factor Bits 6
ICGTR.TRIM5            5   ICG Trim Factor Bits 5
ICGTR.TRIM4            4   ICG Trim Factor Bits 4
ICGTR.TRIM3            3   ICG Trim Factor Bits 3
ICGTR.TRIM2            2   ICG Trim Factor Bits 2
ICGTR.TRIM1            1   ICG Trim Factor Bits 1
ICGTR.TRIM0            0   ICG Trim Factor Bits 0
ICGDVR                0x0039     ICG DCO Divider Control Register
ICGDVR.DDIV3           3   ICG DCO Divider Control Bits 3
ICGDVR.DDIV2           2   ICG DCO Divider Control Bits 2
ICGDVR.DDIV1           1   ICG DCO Divider Control Bits 1
ICGDVR.DDIV0           0   ICG DCO Divider Control Bits 0
ICGDSR                0x003A     ICG DCO Stage Register
ICGDSR.DSTG7           7   ICG DCO Stage Control Bits 7
ICGDSR.DSTG6           6   ICG DCO Stage Control Bits 6
ICGDSR.DSTG5           5   ICG DCO Stage Control Bits 5
ICGDSR.DSTG4           4   ICG DCO Stage Control Bits 4
ICGDSR.DSTG3           3   ICG DCO Stage Control Bits 3
ICGDSR.DSTG2           2   ICG DCO Stage Control Bits 2
ICGDSR.DSTG1           1   ICG DCO Stage Control Bits 1
ICGDSR.DSTG0           0   ICG DCO Stage Control Bits 0
Reserv003B            0x003B     RESERVED
RESERV003C            0x003C     RESERVED
RESERV003D            0x003D     RESERVED
RESERV003E            0x003E     RESERVED
RESERV003F            0x003F     RESERVED
SBSR                  0xFE00     SIM Break Status Register
SBSR.SBSW              1   SIM Break Stop/Wait Bit
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Bit
SRSR.PIN               6   External Reset Bit
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit (opcode fetches only)
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
SBFCR                 0xFE02     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
ReservFE03            0xFE03     RESERVED
ReservFE04            0xFE04     RESERVED
RESERVFE05            0xFE05     RESERVED
RESERVFE06            0xFE06     RESERVED
RESERVFE07            0xFE07     RESERVED
FLCR                  0xFE08     FLASH 2TS Control Register
FLCR.FDIV0             6   Frequency Divide Control Bit
FLCR.BLK1              5   Block Erase Control Bit 1
FLCR.BLK0              4   Block Erase Control Bit 0
FLCR.HVEN              3   High-Voltage Enable Bit
FLCR.MARGIN            2   Margin Read Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
ReservFE09            0xFE09     RESERVED
RESERVFE0A            0xFE0A     RESERVED
RESERVFE0B            0xFE0B     RESERVED
BRKH                  0xFE0C     Break Address Register High
BRKL                  0xFE0D     Break Address Register Low
BSCR                  0xFE0E     Break Status and Control Register
BSCR.BRKE              7   Break Enable Bit
BSCR.BRKA              6   Break Active Bit
LVISR                 0xFE0F     LVI Status Register
LVISR.LVIOUT           7   LVI Output Bit
LVISR.LOWV             5   LVI Low Indicator Bit
FLBPR                 0xFFF0     FLASH 2TS Block Protect Register
FLBPR.BPR3             3   Block Protect Register Bit 3
FLBPR.BPR2             2   Block Protect Register Bit 2
FLBPR.BPR1             1   Block Protect Register Bit 1
FLBPR.BPR0             0   Block Protect Register Bit 0
COPCTL                0xFFFF     COP Control Register


.68HC908RK2
; MC68HC908RK2/  http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=68HC908RK2&nodeId=01M98634
; MC68HC908RK2.pdf

; 2031 bytes of user FLASH memory
; 128 bytes of random-access memory (RAM)
; 14 bytes of user-defined vectors in FLASH memory
; 768 bytes of monitor read-only memory (ROM)


; MEMORY MAP
area DATA FSR		   0x0000:0x0040
area BSS  UNIMPLEMENTED	   0x0040:0x0080
area DATA RAM		   0x0080:0x0100
area BSS  UNIMPLEMENTED	   0x0100:0x7800
area DATA FLASH		   0x7800:0x7FEF
area DATA FSR_1		   0x7FEF:0x7FF0
area BSS  UNIMPLEMENTED	   0x7FF0:0xF000
area DATA MONITOR_ROM1	   0xF000:0xF2F0
area BSS  UNIMPLEMENTED	   0xF2F0:0xFE00
area DATA FSR_2		   0xFE00:0xFE10
area BSS  UNIMPLEMENTED	   0xFE10:0xFEF0
area DATA MONITOR_ROM2	   0xFEF0:0xFF00
area BSS  UNIMPLEMENTED	   0xFF00:0xFFF0
area DATA FSR_3		   0xFFF0:0xFFF2
area DATA USER_VEC	   0xFFF2:0x10000


; Interrupt and reset vector assignments
interrupt __RESET     0xFFFE       Reset vector
interrupt SWI         0xFFFC       SWI vector
interrupt IRQ1_KBRD   0xFFFA       IRQ1/keyboard vector
interrupt TIM_CH0     0xFFF8       TIM channel 0 vector
interrupt TIM_CH1     0xFFF6       TIM channel 1 vector
interrupt TIM         0xFFF4       TIM overflow vector
interrupt ICG         0xFFF2       ICG vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bits 7
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
RESERV0002            0x0002     RESERVED
RESERV0003            0x0003     RESERVED
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bits 7
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.MCLKEN            7   MCLK Enable Bit                 
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
RESERV0006            0x0006     RESERVED
RESERV0007            0x0007     RESERVED
RESERV0008            0x0008     RESERVED
RESERV0009            0x0009     RESERVED
RESERV000A            0x000A     RESERVED
RESERV000B            0x000B     RESERVED
RESERV000C            0x000C     RESERVED
RESERV000D            0x000D     RESERVED
RESERV000E            0x000E     RESERVED
RESERV000F            0x000F     RESERVED
RESERV0010            0x0010     RESERVED
RESERV0011            0x0011     RESERVED
RESERV0012            0x0012     RESERVED
RESERV0013            0x0013     RESERVED
RESERV0014            0x0014     RESERVED
RESERV0015            0x0015     RESERVED
RESERV0016            0x0016     RESERVED
RESERV0017            0x0017     RESERVED
RESERV0018            0x0018     RESERVED
RESERV0019            0x0019     RESERVED
INTKBSCR              0x001A     IRQ and Keyboard Status and Control Register
INTKBSCR.IRQ1F         7   IRQ1 Flag Bit                         
INTKBSCR.ACKI          6   IRQ1 Interrupt Request Acknowledge Bit
INTKBSCR.IMASKI        5   IRQ1 Interrupt Mask Bit               
INTKBSCR.MODEI         4   IRQ1 Triggering Sensitivity Bit       
INTKBSCR.KEYF          3   Keyboard Flag Bit                     
INTKBSCR.ACKK          2   Keyboard Acknowledge Bit              
INTKBSCR.IMASKK        1   Keyboard Interrupt Mask Bit           
INTKBSCR.MODEK         0   Keyboard Triggering Sensitivity Bit   
INTKBIER              0x001B     Keyboard Interrupt Enable Register
INTKBIER.KBIE6         6   Keyboard Interrupt Enable Bits 6
INTKBIER.KBIE5         5   Keyboard Interrupt Enable Bits 5
INTKBIER.KBIE4         4   Keyboard Interrupt Enable Bits 4
INTKBIER.KBIE3         3   Keyboard Interrupt Enable Bits 3
INTKBIER.KBIE2         2   Keyboard Interrupt Enable Bits 2
INTKBIER.KBIE1         1   Keyboard Interrupt Enable Bits 1
RESERV001C            0x001C     RESERVED
RESERV001D            0x001D     RESERVED
RESERV001E            0x001E     RESERVED
CONFIG                0x001F     Configuration Register
CONFIG.EXTSLOW         7   Slow External Crystal Enable Bit
CONFIG.LVISTOP         6   LVI Enable in Stop Mode Bit     
CONFIG.LVIRST          5   LVI Reset Enable Bit            
CONFIG.LVIPWR          4   LVI Power Enable Bit            
CONFIG.COPRS           3   COP Rate Select Bit             
CONFIG.SSREC           2   Short Stop Recovery Bit         
CONFIG.STOP            1   STOP Instruction Enable Bit     
CONFIG.COPD            0   COP Disable Bit                 
TSC                   0x0020     Timer Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit            
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit                     
TSC.TRST               4   TIM Reset Bit                    
TSC.PS2                2   Prescaler Select Bits 2          
TSC.PS1                1   Prescaler Select Bits 1          
TSC.PS0                0   Prescaler Select Bits 0          
TCNTH                 0x0021     Timer Counter Register High
TCNTL                 0x0022     Timer Counter Register Low
TMODH                 0x0023     Timer Counter Modulo Register High
TMODL                 0x0024     Timer Counter Modulo Register Low
TSC0                  0x0025     Timer Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit              
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit  
TSC0.MS0B              5   Mode Select Bit B               
TSC0.MS0A              4   Mode Select Bit A               
TSC0.ELS0B             3   Edge/Level Select Bits          
TSC0.ELS0A             2   Edge/Level Select Bits          
TSC0.TOV0              1   Toggle On Overflow Bit          
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0026     Timer Channel 0 Register High
TCH0L                 0x0027     Timer Channel 0 Register Low
TSC1                  0x0028     Timer Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 1 Flag Bit              
TSC1.CH1IE             6   Channel 1 Interrupt Enable Bit  
TSC1.MS1A              4   Mode Select Bit A               
TSC1.ELS1B             3   Edge/Level Select Bits          
TSC1.ELS1A             2   Edge/Level Select Bits          
TSC1.TOV1              1   Toggle On Overflow Bit          
TSC1.CH1MAX            0   Channel 1 Maximum Duty Cycle Bit
TCH1H                 0x0029     Timer Channel 1 Register High
TCH1L                 0x002A     Timer Channel 1 Register Low
RESERV002B            0x002B     RESERVED
RESERV002C            0x002C     RESERVED
RESERV002E            0x002E     RESERVED
RESERV002F            0x002F     RESERVED
RESERV0030            0x0030     RESERVED
RESERV0031            0x0031     RESERVED
RESERV0032            0x0032     RESERVED
RESERV0033            0x0033     RESERVED
RESERV0034            0x0034     RESERVED
RESERV0035            0x0035     RESERVED
ICGCR                 0x0036     Internal Clock Generator Control Register
ICGCR.CMIE             7   Clock Monitor Interrupt Enable Bit 
ICGCR.CMF              6   Clock Monitor Interrupt Flag       
ICGCR.CMON             5   Clock Monitor On Bit               
ICGCR.CS               4   Clock Select Bit                   
ICGCR.ICGON            3   Internal Clock Generator Stable Bit
ICGCR.ICGS             2   Internal Clock Generator On Bit    
ICGCR.ECGON            1   External Clock Generator On Bit    
ICGCR.ECGS             0   External Clock Generator Stable Bit
ICGMR                 0x0037     Internal Clock Generator Multiplier Register
ICGMR.N6               6   ICG Multiplier Factor Bits 6
ICGMR.N5               5   ICG Multiplier Factor Bits 5
ICGMR.N4               4   ICG Multiplier Factor Bits 4
ICGMR.N3               3   ICG Multiplier Factor Bits 3
ICGMR.N2               2   ICG Multiplier Factor Bits 2
ICGMR.N1               1   ICG Multiplier Factor Bits 1
ICGMR.N0               0   ICG Multiplier Factor Bits 0
ICGTR                 0x0038     Internal Clock Generator Trim Register
ICGTR.TRIM7            7   ICG Trim Factor Bits 7
ICGTR.TRIM6            6   ICG Trim Factor Bits 6
ICGTR.TRIM5            5   ICG Trim Factor Bits 5
ICGTR.TRIM4            4   ICG Trim Factor Bits 4
ICGTR.TRIM3            3   ICG Trim Factor Bits 3
ICGTR.TRIM2            2   ICG Trim Factor Bits 2
ICGTR.TRIM1            1   ICG Trim Factor Bits 1
ICGTR.TRIM0            0   ICG Trim Factor Bits 0
ICGDVR                0x0039     ICG DCO Divider Control Register
ICGDVR.DDIV3           3   ICG DCO Divider Control Bits 3
ICGDVR.DDIV2           2   ICG DCO Divider Control Bits 2
ICGDVR.DDIV1           1   ICG DCO Divider Control Bits 1
ICGDVR.DDIV0           0   ICG DCO Divider Control Bits 0
ICGDSR                0x003A     ICG DCO Stage Register
ICGDSR.DSTG7           7   ICG DCO Stage Control Bits 7
ICGDSR.DSTG6           6   ICG DCO Stage Control Bits 6
ICGDSR.DSTG5           5   ICG DCO Stage Control Bits 5
ICGDSR.DSTG4           4   ICG DCO Stage Control Bits 4
ICGDSR.DSTG3           3   ICG DCO Stage Control Bits 3
ICGDSR.DSTG2           2   ICG DCO Stage Control Bits 2
ICGDSR.DSTG1           1   ICG DCO Stage Control Bits 1
ICGDSR.DSTG0           0   ICG DCO Stage Control Bits 0
Reserv003B            0x003B     RESERVED
RESERV003C            0x003C     RESERVED
RESERV003D            0x003D     RESERVED
RESERV003E            0x003E     RESERVED
RESERV003F            0x003F     RESERVED
SBSR                  0xFE00     SIM Break Status Register
SBSR.SBSW              1   SIM Break Stop/Wait Bit
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Bit                             
SRSR.PIN               6   External Reset Bit                             
SRSR.COP               5   Computer Operating Properly Reset Bit          
SRSR.ILOP              4   Illegal Opcode Reset Bit                       
SRSR.ILAD              3   Illegal Address Reset Bit (opcode fetches only)
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit                  
SBFCR                 0xFE02     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
ReservFE03            0xFE03     RESERVED
ReservFE04            0xFE04     RESERVED
RESERVFE05            0xFE05     RESERVED
RESERVFE06            0xFE06     RESERVED
RESERVFE07            0xFE07     RESERVED
FLCR                  0xFE08     FLASH 2TS Control Register
FLCR.FDIV0             7   Frequency Divide Control Bit
FLCR.BLK1              6   Block Erase Control Bit 1   
FLCR.BLK0              5   Block Erase Control Bit 0   
FLCR.HVEN              4   High-Voltage Enable Bit     
FLCR.MARGIN            3   Margin Read Control Bit     
FLCR.ERASE             2   Erase Control Bit           
FLCR.PGM               1   Program Control Bit         
ReservFE09            0xFE09     RESERVED
RESERVFE0A            0xFE0A     RESERVED
RESERVFE0B            0xFE0B     RESERVED
BRKH                  0xFE0C     Break Address Register High
BRKL                  0xFE0D     Break Address Register Low
BSCR                  0xFE0E     Break Status and Control Register
BSCR.BRKE              7   Break Enable Bit
BSCR.BRKA              6   Break Active Bit
LVISR                 0xFE0F     LVI Status Register
LVISR.LVIOUT           7   LVI Output Bit       
LVISR.LOWV             5   LVI Low Indicator Bit
FLBPR                 0xFFF0     FLASH Block Protect Register
FLBPR.BPR3             3   Block Protect Register Bit 3
FLBPR.BPR2             2   Block Protect Register Bit 2
FLBPR.BPR1             1   Block Protect Register Bit 1
FLBPR.BPR0             0   Block Protect Register Bit 0
COPCTL                0xFFFF     COP Control Register


.68HC908SR12
; MC68HC908SR12/D  http://
; MC68HC908SR12.pdf

; 12,228 bytes of user FLASH memory
; 512 bytes of random-access memory (RAM)
; 48 bytes of user-defined vectors
; 368 bytes of monitor ROM


; MEMORY MAP
area DATA FSR		   0x0000:0x0060
area DATA RAM		   0x0060:0x0260
area BSS  Unimplemented	   0x0260:0xC000
area DATA FLASH		   0xC000:0xF000
area BSS  Unimplemented	   0xF000:0xFE00
area DATA FSR_1		   0xFE00:0xFE10
area DATA Monitor_ROM	   0xFE10:0xFF80
area DATA FSR_2		   0xFF80:0xFF81
area BSS  Reserved	   0xFF81:0xFFD0
area DATA USER_VEC	   0xFFD0:0x10000


; Interrupt and reset vector assignments
interrupt __RESET        0xFFFE       Reset Vector
interrupt SWI            0xFFFC       SWI Vector
interrupt IRQ1           0xFFFA       IRQ1 Vector
interrupt IRQ2           0xFFF8       IRQ2 Vector
interrupt PLL            0xFFF6       PLL Vector
interrupt TIM1_CH0       0xFFF4       TIM1 Channel 0 Vector
interrupt TIM1_CH1       0xFFF2       TIM1 Channel 1 Vector
interrupt TIM1           0xFFF0       TIM1 Overflow Vector
interrupt TIM2_CH0       0xFFEE       TIM2 Channel 0 Vector
interrupt TIM2_CH1       0xFFEC       TIM2 Channel 1 Vector
interrupt TIM2           0xFFEA       TIM2 Overflow Vector
interrupt MMIIC          0xFFE8       MMIIC Interrupt Vector
interrupt SCI_E          0xFFE6       SCI Error Vector
interrupt SCI_R          0xFFE4       SCI Receive Vector
interrupt SCI_T          0xFFE2       SCI Transmit Vector
interrupt KBDR           0xFFE0       Keyboard Vector
interrupt ADC            0xFFDE       ADC Conversion Complete Vector
interrupt AMIV           0xFFDC       Analog Module Interrupt Vector
interrupt TIME           0xFFDA       Timebase Module Interrupt Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA7               7   Port A Data Bits 7
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
PTC                   0x0002     Port C Data Register
PTC.PTC7               7   Port C Data Bits 7
PTC.PTC6               6   Port C Data Bits 6
PTC.PTC5               5   Port C Data Bits 5
PTC.PTC4               4   Port C Data Bits 4
PTC.PTC3               3   Port C Data Bits 3
PTC.PTC2               2   Port C Data Bits 2
PTC.PTC1               1   Port C Data Bits 1
PTC.PTC0               0   Port C Data Bits 0
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bits 7
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA7             7   Data Direction Register A Bits 7
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
DDRC                  0x0006     Data Direction Register C
DDRC.DDRC7             7   Data Direction Register C Bits 7
DDRC.DDRC6             6   Data Direction Register C Bits 6
DDRC.DDRC5             5   Data Direction Register C Bits 5
DDRC.DDRC4             4   Data Direction Register C Bits 4
DDRC.DDRC3             3   Data Direction Register C Bits 3
DDRC.DDRC2             2   Data Direction Register C Bits 2
DDRC.DDRC1             1   Data Direction Register C Bits 1
DDRC.DDRC0             0   Data Direction Register C Bits 0
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bits 7
DDRD.DDRD6             6   Data Direction Register D Bits 6
DDRD.DDRD5             5   Data Direction Register D Bits 5
DDRD.DDRD4             4   Data Direction Register D Bits 4
DDRD.DDRD3             3   Data Direction Register D Bits 3
DDRD.DDRD2             2   Data Direction Register D Bits 2
DDRD.DDRD1             1   Data Direction Register D Bits 1
DDRD.DDRD0             0   Data Direction Register D Bits 0
RESERV0008            0x0008     RESERVED
RESERV0009            0x0009     RESERVED
RESERV000A            0x000A     RESERVED
RESERV000B            0x000B     RESERVED
LEDA                  0x000C     Port-A LED Control Register
LEDA.LEDA5             5   Port A LED Drive Enable Bits 5
LEDA.LEDA4             4   Port A LED Drive Enable Bits 4
LEDA.LEDA3             3   Port A LED Drive Enable Bits 3
LEDA.LEDA2             2   Port A LED Drive Enable Bits 2
LEDA.LEDA1             1   Port A LED Drive Enable Bits 1
LEDA.LEDA0             0   Port A LED Drive Enable Bits 0
LEDC                  0x000D     Port-C LED Control Register
LEDC.LEDC7             7   Port C LED Drive Enable Bits 7
LEDC.LEDC6             6   Port C LED Drive Enable Bits 6
LEDC.LEDC5             5   Port C LED Drive Enable Bits 5
LEDC.LEDC4             4   Port C LED Drive Enable Bits 4
LEDC.LEDC3             3   Port C LED Drive Enable Bits 3
AMCR                  0x000E     Analog Module Control Register
AMCR.PWR1              7   Analog Module Power Control Bits 1
AMCR.PWR0              6   Analog Module Power Control Bits 0
AMCR.OPCH1             5   Amplifier Channel Select Control Bits 1
AMCR.OPCH0             4   Amplifier Channel Select Control Bits 0
AMCR.AMIEN             3   Analog Module Interrupt Enable
AMCR.DO2               2   DC Offset Control Bits 2
AMCR.DO1               1   DC Offset Control Bits 1
AMCR.DO0               0   DC Offset Control Bits 0
AMGCR                 0x000F     Analog Module Gain Control Register
AMGCR.GAINB3           7   Analog Module 2nd-stage Gain Control Bits 3
AMGCR.GAINB2           6   Analog Module 2nd-stage Gain Control Bits 2
AMGCR.GAINB1           5   Analog Module 2nd-stage Gain Control Bits 1
AMGCR.GAINB0           4   Analog Module 2nd-stage Gain Control Bits 0
AMGCR.GAINA3           3   Analog Module 1st-stage Gain Control Bits 3
AMGCR.GAINA2           2   Analog Module 1st-stage Gain Control Bits 2
AMGCR.GAINA1           1   Analog Module 1st-stage Gain Control Bits 1
AMGCR.GAINA0           0   Analog Module 1st-stage Gain Control Bits 0
AMSCR                 0x0010     Analog Module Status and Control Register
AMSCR.AMCDIV1          7   Analog Module Clock Divider Control Bits 1
AMSCR.AMCDIV0          6   Analog Module Clock Divider Control Bits 0
AMSCR.OPIFR            5   Amplifier Ready Interrupt Flag Reset
AMSCR.OPIF             4   Amplifier Ready Interrupt Flag
AMSCR.DOF              2   DC Offset Flag
AMSCR.CDIFR            1   Current Detect Interrupt Flag Reset
AMSCR.CDIF             0   Current Detect Interrupt Flag
RESERV0011            0x0011     RESERVED
RESERV0012            0x0012     RESERVED
SCC1                  0x0013     SCI Control Register 1
SCC1.LOOPS             7   Loop Mode Select Bit
SCC1.ENSCI             6   Enable SCI Bit
SCC1.TXINV             5   Transmit Inversion Bit
SCC1.M                 4   Mode (Character Length) Bit
SCC1.WAKE              3   Wakeup Condition Bit
SCC1.ILTY              2   Idle Line Type Bit
SCC1.PEN               1   Parity Enable Bit
SCC1.PTY               0   Parity Bit
SCC2                  0x0014     SCI Control Register 2
SCC2.SCTIE             7   SCI Transmit Interrupt Enable Bit
SCC2.TCIE              6   Transmission Complete Interrupt Enable Bit
SCC2.SCRIE             5   SCI Receive Interrupt Enable Bit
SCC2.ILIE              4   Idle Line Interrupt Enable Bit
SCC2.TE                3   Transmitter Enable Bit
SCC2.RE                2   Receiver Enable Bit
SCC2.RWU               1   Receiver Wakeup Bit
SCC2.SBK               0   Send Break Bit
SCC3                  0x0015     SCI Control Register 3
SCC3.R8                7   Received Bit 8
SCC3.T8                6   Transmitted Bit 8
SCC3.DMARE             5   DMA Receive Enable Bit
SCC3.DMATE             4   DMA Transfer Enable Bit
SCC3.ORIE              3   Receiver Overrun Interrupt Enable Bit
SCC3.NEIE              2   Receiver Noise Error Interrupt Enable Bit
SCC3.FEIE              1   Receiver Framing Error Interrupt Enable Bit
SCC3.PEIE              0   Receiver Parity Error Interrupt Enable Bit
SCS1                  0x0016     SCI Status Register 1
SCS1.SCTE              7   SCI Transmitter Empty Bit
SCS1.TC                6   Transmission Complete Bit
SCS1.SCRF              5   SCI Receiver Full Bit
SCS1.IDLE              4   Receiver Idle Bit
SCS1.OR                3   Receiver Overrun Bit
SCS1.NF                2   Receiver Noise Flag Bit
SCS1.FE                1   Receiver Framing Error Bit
SCS1.PE                0   Receiver Parity Error Bit
SCS2                  0x0017     SCI Status Register 2
SCS2.BKF               1   Break Flag Bit
SCS2.RPF               0   Reception in Progress Flag Bit
SCDR                  0x0018     SCI Data Register
SCDR.R7_T7             7   Receive/Transmit Data Bits 7
SCDR.R6_T6             6   Receive/Transmit Data Bits 6
SCDR.R5_T5             5   Receive/Transmit Data Bits 5
SCDR.R4_T4             4   Receive/Transmit Data Bits 4
SCDR.R3_T3             3   Receive/Transmit Data Bits 3
SCDR.R2_T2             2   Receive/Transmit Data Bits 2
SCDR.R1_T1             1   Receive/Transmit Data Bits 1
SCDR.R0_T0             0   Receive/Transmit Data Bits 0
SCBR                  0x0019     SCI Baud Rate Register
SCBR.SCP1              5   SCI Baud Rate Prescaler Bits 1
SCBR.SCP0              4   SCI Baud Rate Prescaler Bits 0
SCBR.SCR2              2   SCI Baud Rate Select Bits 2
SCBR.SCR1              1   SCI Baud Rate Select Bits 1
SCBR.SCR0              0   SCI Baud Rate Select Bits 0
KBSCR                 0x001A     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
KBIER                 0x001B     Keyboard Interrupt Enable Register
KBIER.KBIE7            7   Keyboard Interrupt Enable Bits 7
KBIER.KBIE6            6   Keyboard Interrupt Enable Bits 6
KBIER.KBIE5            5   Keyboard Interrupt Enable Bits 5
KBIER.KBIE4            4   Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Keyboard Interrupt Enable Bits 0
INTSCR2               0x001C     IRQ2 Status and Control Register
INTSCR2.PTBPUE6        6   IRQ2 Pin Pullup Enable Bit
INTSCR2.IRQ2F          3   IRQ2 Flag Bit
INTSCR2.ACK2           2   IRQ2 Interrupt Request Acknowledge Bit
INTSCR2.IMASK2         1   IRQ2 Interrupt Mask Bit
INTSCR2.MODE2          0   IRQ2 Edge/Level Select Bit
CONFIG2               0x001D     Configuration Register 2
CONFIG2.STOPICLKEN     7   Internal Oscillator Stop Mode Enable
CONFIG2.STOPRCLKEN     6   RC Oscillator Stop Mode Enable
CONFIG2.STOPXCLKEN     5   Crystal Oscillator Stop Mode Enable
CONFIG2.OSCCLK1        4   Oscillator Output Control Bits 1
CONFIG2.OSCCLK0        3   Oscillator Output Control Bits 0
CONFIG2.CDOEN          1   Current-Flow Detect Output Enable
CONFIG2.SCIBDSRC       0   SCI Baud Rate Clock Source
INTSCR1               0x001E     IRQ1 Status and Control Register
INTSCR1.IRQ1F          3   IRQ1 Flag Bit
INTSCR1.ACK1           2   IRQ1 Interrupt Request Acknowledge Bit
INTSCR1.IMASK1         1   IRQ1 Interrupt Mask Bit
INTSCR1.MODE1          0   IRQ1 Edge/Level Select Bit
CONFIG1               0x001F     Configuration Register 1
CONFIG1.COPRS          7   COP Rate Select
CONFIG1.LVISTOP        6   LVI Enable in Stop Mode
CONFIG1.LVIRSTD        5   LVI Reset Disable
CONFIG1.LVIPWRD        4   LVI Power Disable Bit
CONFIG1.LVI5OR3        3   LVI 5V or 3V Operating Mode
CONFIG1.SSREC          2   Short Stop Recovery
CONFIG1.STOP           1   STOP Instruction Enable
CONFIG1.COPD           0   COP Disable Bit
T1SC                  0x0020     Timer 1 Status and Control Register
T1SC.TOF               7   TIM Overflow Flag Bit
T1SC.TOIE              6   TIM Overflow Interrupt Enable Bit
T1SC.TSTOP             5   TIM Stop Bit
T1SC.TRST              4   TIM Reset Bit
T1SC.PS2               2   Prescaler Select Bits 2
T1SC.PS1               1   Prescaler Select Bits 1
T1SC.PS0               0   Prescaler Select Bits 0
T1CNTH                0x0021     Timer 1 Counter Register High
T1CNTL                0x0022     Timer 1 Counter Register Low
T1MODH                0x0023     Timer 1 Counter Modulo Register High
T1MODL                0x0024     Timer 1 Counter Modulo Register Low
T1SC0                 0x0025     Timer 1 Channel 0 Status and Control Register
T1SC0.CH0F             7   Channel 0 Flag Bit
T1SC0.CH0IE            6   Channel 0 Interrupt Enable Bit
T1SC0.MS0B             5   Mode Select Bit B
T1SC0.MS0A             4   Mode Select Bit A
T1SC0.ELS0B            3   Edge/Level Select Bits
T1SC0.ELS0A            2   Edge/Level Select Bits
T1SC0.TOV0             1   Toggle On Overflow Bit
T1SC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
T1CH0H                0x0026     Timer 1 Channel 0 Register High
T1CH0L                0x0027     Timer 1 Channel 0 Register Low
T1SC1                 0x0028     Timer 1 Channel 1 Status and Control Register
T1SC1.CH1F             7   Channel 1 Flag Bit            
T1SC1.CH1IE            6   Channel 1 Interrupt Enable Bit
T1SC1.MS1A             4   Mode Select Bit A               
T1SC1.ELS1B            3   Edge/Level Select Bits          
T1SC1.ELS1A            2   Edge/Level Select Bits          
T1SC1.TOV1             1   Toggle On Overflow Bit          
T1SC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
T1CH1H                0x0029     Timer 1 Channel 1 Register High
T1CH1L                0x002A     Timer 1 Channel 1 Register Low
T2SC                  0x002B     Timer 2 Status and Control Register
T2SC.TOF               7   TIM Overflow Flag Bit            
T2SC.TOIE              6   TIM Overflow Interrupt Enable Bit
T2SC.TSTOP             5   TIM Stop Bit                     
T2SC.TRST              4   TIM Reset Bit                    
T2SC.PS2               2   Prescaler Select Bits 2          
T2SC.PS1               1   Prescaler Select Bits 1          
T2SC.PS0               0   Prescaler Select Bits 0          
T2CNTH                0x002C     Timer 2 Counter Register High
T2CNTL                0x002D     Timer 2 Counter Register Low
T2MODH                0x002E     Timer 2 Counter Modulo Register High
T2MODL                0x002F     Timer 2 Counter Modulo Register Low
T2SC0                 0x0030     Timer 2 Channel 0 Status and Control Register
T2SC0.CH0F             7   Channel 0 Flag Bit              
T2SC0.CH0IE            6   Channel 0 Interrupt Enable Bit  
T2SC0.MS0B             5   Mode Select Bit B               
T2SC0.MS0A             4   Mode Select Bit A               
T2SC0.ELS0B            3   Edge/Level Select Bits          
T2SC0.ELS0A            2   Edge/Level Select Bits          
T2SC0.TOV0             1   Toggle On Overflow Bit          
T2SC0.CH0MAX           0   Channel 0 Maximum Duty Cycle Bit
T2CH0H                0x0031     Timer 2 Channel 0 Register High
T2CH0L                0x0032     Timer 2 Channel 0 Register Low
T2SC1                 0x0033     Timer 2 Channel 1 Status and Control Register
T2SC1.CH1F             7   Channel 1 Flag Bit              
T2SC1.CH1IE            6   Channel 1 Interrupt Enable Bit  
T2SC1.MS1A             4   Mode Select Bit A               
T2SC1.ELS1B            3   Edge/Level Select Bits          
T2SC1.ELS1A            2   Edge/Level Select Bits          
T2SC1.TOV1             1   Toggle On Overflow Bit          
T2SC1.CH1MAX           0   Channel 1 Maximum Duty Cycle Bit
T2CH1H                0x0034     Timer 2 Channel 1 Register High
T2CH1L                0x0035     Timer 2 Channel 1 Register Low
PTCL                  0x0036     PLL Control Register
PTCL.PLLIE             7   PLL Interrupt Enable Bit
PTCL.PLLF              6   PLL Interrupt Flag Bit
PTCL.PLLON             5   PLL On Bit
PTCL.BCS               4   Base Clock Select Bit
PTCL.PRE1              3   Prescaler Program Bits 1
PTCL.PRE0              2   Prescaler Program Bits 0
PTCL.VPR1              1   VCO Power-of-Two Range Select Bits 1
PTCL.VPR0              0   VCO Power-of-Two Range Select Bits 0
PBWC                  0x0037     PLL Bandwidth Control Register
PBWC.AUTO              7   Automatic Bandwidth Control Bit
PBWC.LOCK              6   Lock Indicator Bit
PBWC.ACQ               5   Acquisition Mode Bit
PMSH                  0x0038     PLL Multiplier Select Register High
PMSH.MUL11             3   Multiplier Select Bits 11
PMSH.MUL10             2   Multiplier Select Bits 10
PMSH.MUL9              1   Multiplier Select Bits 9
PMSH.MUL8              0   Multiplier Select Bits 8
PMSL                  0x0039     PLL Multiplier Select Register Low
PMSL.MUL7              7   Multiplier Select Bits 7
PMSL.MUL6              6   Multiplier Select Bits 6
PMSL.MUL5              5   Multiplier Select Bits 5
PMSL.MUL4              4   Multiplier Select Bits 4
PMSL.MUL3              3   Multiplier Select Bits 3
PMSL.MUL2              2   Multiplier Select Bits 2
PMSL.MUL1              1   Multiplier Select Bits 1
PMSL.MUL0              0   Multiplier Select Bits 0
PMRS                  0x003A     PLL VCO Range Select Register
PMRS.VRS7              7   VCO Range Select Bits 7
PMRS.VRS6              6   VCO Range Select Bits 6
PMRS.VRS5              5   VCO Range Select Bits 5
PMRS.VRS4              4   VCO Range Select Bits 4
PMRS.VRS3              3   VCO Range Select Bits 3
PMRS.VRS2              2   VCO Range Select Bits 2
PMRS.VRS1              1   VCO Range Select Bits 1
PMRS.VRS0              0   VCO Range Select Bits 0
PMDS                  0x003B     PLL Reference Divider Select Register
PMDS.RDS3              3   Reference Divider Select Bits 3
PMDS.RDS2              2   Reference Divider Select Bits 2
PMDS.RDS1              1   Reference Divider Select Bits 1
PMDS.RDS0              0   Reference Divider Select Bits 0
RESERV003C            0x003C     RESERVED
RESERV003D            0x003D     RESERVED
RESERV003E            0x003E     RESERVED
RESERV003F            0x003F     RESERVED
RESERV0040            0x0040     RESERVED
RESERV0041            0x0041     RESERVED
RESERV0042            0x0042     RESERVED
RESERV0043            0x0043     RESERVED
RESERV0044            0x0044     RESERVED
RESERV0045            0x0045     RESERVED
TBCR                  0x0046     Timebase Control Register
TBCR.TBIF              7   Timebase Interrupt Flag
TBCR.TBR2              6   Timebase Rate Selection 2
TBCR.TBR1              5   Timebase Rate Selection 1
TBCR.TBR0              4   Timebase Rate Selection 0
TBCR.TACK              3   Timebase ACKnowledge
TBCR.TBIE              2   Timebase Interrupt Enabled
TBCR.TBON              1   Timebase Enabled
RESERV0047            0x0047     RESERVED
MMADR                 0x0048     MMIIC Address Register
MMADR.MMAD7            7   Multi-Master Address 7
MMADR.MMAD6            6   Multi-Master Address 6
MMADR.MMAD5            5   Multi-Master Address 5
MMADR.MMAD4            4   Multi-Master Address 4
MMADR.MMAD3            3   Multi-Master Address 3
MMADR.MMAD2            2   Multi-Master Address 2
MMADR.MMAD1            1   Multi-Master Address 1
MMADR.MMEXTAD          0   Multi-Master Expanded Address
MMCR1                 0x0049     MMIIC Control Register 1
MMCR1.MMEN             7   MMIIC Enable
MMCR1.MMIEN            6   MMIIC Interrupt Enable
MMCR1.MMCLRBB          5   MMIIC Clear Busy Flag
MMCR1.MMTXAK           3   MMIIC Transmit Acknowledge Enable
MMCR1.REPSEN           2   Repeated Start Enable
MMCR1.MMCRCBYTE        1   MMIIC CRC Byte
MMCR1.SDASCL1          0   SDA and SCL I/O Pin Select
MMCR2                 0x004A     MMIIC Control Register 2
MMCR2.MMALIF           7   Arbitration Loss Interrupt Flag
MMCR2.MMNAKIF          6   No AcKnowledge Interrupt Flag (Master Mode)
MMCR2.MMBB             5   MMIIC Bus Busy Flag
MMCR2.MMAST            4   MMIIC Master Control
MMCR2.MMRW             3   MMIIC Master Read/Write
MMCR2.MMCRCEF          0   MMIIC CRC Error Flag
MMSR                  0x004B     MMIIC Status Register
MMSR.MMRXIF            7   MMIIC Receive Interrupt Flag
MMSR.MMTXIF            6   MMIIC Transmit Interrupt Flag
MMSR.MMATCH            5   MMIIC Address Match Flag
MMSR.MMSRW             4   MMIIC Slave Read/Write Select
MMSR.MMRXAK            3   MMIIC Receive Acknowledge
MMSR.MMCRCBF           2   CRC Data Buffer Full Flag
MMSR.MMTXBE            1   MMIIC Transmit Buffer Empty
MMSR.MMRXBF            0   MMIIC Receive Buffer Full
MMDTR                 0x004C     MMIIC Data Transmit Register
MMDTR.MMTD7            7
MMDTR.MMTD6            6
MMDTR.MMTD5            5
MMDTR.MMTD4            4
MMDTR.MMTD3            3
MMDTR.MMTD2            2
MMDTR.MMTD1            1
MMDTR.MMTD0            0
MDDRR                 0x004D     MMIIC Data Receive Register
MDDRR.MMRD7            7
MDDRR.MMRD6            6
MDDRR.MMRD5            5
MDDRR.MMRD4            4
MDDRR.MMRD3            3
MDDRR.MMRD2            2
MDDRR.MMRD1            1
MDDRR.MMRD0            0
MMCRDR                0x004E     MMIIC CRC Data Register
MMCRDR.MMCRCD7         7
MMCRDR.MMCRCD6         6
MMCRDR.MMCRCD5         5
MMCRDR.MMCRCD4         4
MMCRDR.MMCRCD3         3
MMCRDR.MMCRCD2         2
MMCRDR.MMCRCD1         1
MMCRDR.MMCRCD0         0
MMFDR                 0x004F     MMIIC Frequency Divider Register
MMFDR.MMBR2            2
MMFDR.MMBR1            1
MMFDR.MMBR0            0
Reserv0050            0x0050     Reserved
PWMCR                 0x0051     PWM Control Register
PWMCR.PWMEN2           7   PWM Enable Bits 2
PWMCR.PWMEN1           6   PWM Enable Bits 1
PWMCR.PWMEN0           5   PWM Enable Bits 0
PWMCR.PCH2             2   PWM Channel Enable Bits 2
PWMCR.PCH1             1   PWM Channel Enable Bits 1
PWMCR.PCH0             0   PWM Channel Enable Bits 0
PWMCCR                0x0052     PWM Clock Control Register
PWMCCR.PCLKSEL         7   PWM Input Clock Select Bit
PWMCCR.PCLK1           1   PWM Clock Prescaler Bits 1
PWMCCR.PCLK0           0   PWM Clock Prescaler Bits 0
PWMDR0                0x0053     PWM Data Register 0
PWMDR0.0PWMD7          7
PWMDR0.0PWMD6          6
PWMDR0.0PWMD5          5
PWMDR0.0PWMD4          4
PWMDR0.0PWMD3          3
PWMDR0.0PWMD2          2
PWMDR0.0PWMD1          1
PWMDR0.0PWMD0          0
PWMDR1                0x0054     PWM Data Register 1
PWMDR1.1PWMD7          7
PWMDR1.1PWMD6          6
PWMDR1.1PWMD5          5
PWMDR1.1PWMD4          4
PWMDR1.1PWMD3          3
PWMDR1.1PWMD2          2
PWMDR1.1PWMD1          1
PWMDR1.1PWMD0          0
PWMDR2                0x0055     PWM Data Register 2
PWMDR2.2PWMD7          7
PWMDR2.2PWMD6          6
PWMDR2.2PWMD5          5
PWMDR2.2PWMD4          4
PWMDR2.2PWMD3          3
PWMDR2.2PWMD2          2
PWMDR2.2PWMD1          1
PWMDR2.2PWMD0          0
PWMPCR                0x0056     PWM Phase Control Register
PWMPCR.PHEN            7   PWM Automatic Phase Control Enable Bit
PWMPCR.PHD6            6   PWM Phase Value Bits 6
PWMPCR.PHD5            5   PWM Phase Value Bits 5
PWMPCR.PHD4            4   PWM Phase Value Bits 4
PWMPCR.PHD3            3   PWM Phase Value Bits 3
PWMPCR.PHD2            2   PWM Phase Value Bits 2
PWMPCR.PHD1            1   PWM Phase Value Bits 1
PWMPCR.PHD0            0   PWM Phase Value Bits 0
ADCSR                 0x0057     ADC Status and Control Register
ADCSR.COCO             7   Conversions Complete Bit
ADCSR.AIEN             6   ADC Interrupt Enable Bit
ADCSR.ADCO             5   ADC Continuous Conversion Bit
ADCSR.ADCH4            4   ADC Channel Select Bits 4
ADCSR.ADCH3            3   ADC Channel Select Bits 3
ADCSR.ADCH2            2   ADC Channel Select Bits 2
ADCSR.ADCH1            1   ADC Channel Select Bits 1
ADCSR.ADCH0            0   ADC Channel Select Bits 0
ADICLK                0x0058     ADC Clock Control Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bits 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bits 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bits 0
ADICLK.ADICLK          4   ADC Input Clock Select Bit
ADICLK.MODE1           3   Modes of Result Justification 1
ADICLK.MODE0           2   Modes of Result Justification 0
ADRH0                 0x0059     ADC Data Register High 0
ADRH0.AD9              1
ADRH0.AD8              0
ADRL0                 0x005A     ADC Data Register Low 0
ADRL0.AD7              7
ADRL0.AD6              6
ADRL0.AD5              5
ADRL0.AD4              4
ADRL0.AD3              3
ADRL0.AD2              2
ADRL0.AD1              1
ADRL0.AD0              0
ADRL1                 0x005B     ADC Data Register Low 1
ADRL1.AD7              7
ADRL1.AD6              6
ADRL1.AD5              5
ADRL1.AD4              4
ADRL1.AD3              3
ADRL1.AD2              2
ADRL1.AD1              1
ADRL1.AD0              0
ADRL2                 0x005C     ADC Data Register Low 2
ADRL2.AD7              7
ADRL2.AD6              6
ADRL2.AD5              5
ADRL2.AD4              4
ADRL2.AD3              3
ADRL2.AD2              2
ADRL2.AD1              1
ADRL2.AD0              0
ADRL3                 0x005D     ADC Data Register Low 3
ADRL3.AD7              7
ADRL3.AD6              6
ADRL3.AD5              5
ADRL3.AD4              4
ADRL3.AD3              3
ADRL3.AD2              2
ADRL3.AD1              1
ADRL3.AD0              0
ADASCR                0x005E     ADC Auto-scan Control Register
ADASCR.AUTO1           2   Auto-scan Mode Channel Select Bits 1
ADASCR.AUTO0           1   Auto-scan Mode Channel Select Bits 0
ADASCR.ASCAN           0   Auto-scan Mode Enable Bit
RESERV005F            0x005F     RESERVED
SBSR                  0xFE00     SIM Break Status Register
SBSR.SBSW              1   Break Wait Bit
SRSR                  0xFE01     SIM Reset Status Register
SRSR.POR               7   Power-On Reset Bit
SRSR.PIN               6   External Reset Bit
SRSR.COP               5   Computer Operating Properly Reset Bit
SRSR.ILOP              4   Illegal Opcode Reset Bit
SRSR.ILAD              3   Illegal Address Reset Bit (opcode fetches only)
SRSR.LVI               1   Low-Voltage Inhibit Reset Bit
ReservFE02            0xFE02     Reserved
SBFCR                 0xFE03     SIM Break Flag Control Register
SBFCR.BCFE             7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF6               7   Interrupt Flags 6
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF2               3   Interrupt Flags 2
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flags 14
INT2.IF13              6   Interrupt Flags 13
INT2.IF12              5   Interrupt Flags 12
INT2.IF11              4   Interrupt Flags 11
INT2.IF10              3   Interrupt Flags 10
INT2.IF9               2   Interrupt Flags 9
INT2.IF8               1   Interrupt Flags 8
INT2.IF7               0   Interrupt Flags 7
INT3                  0xFE06     Interrupt Status Register 3
INT3.IF17              2   Interrupt Flags 17
INT3.IF16              1   Interrupt Flags 16
INT3.IF15              0   Interrupt Flags 15
ReservFE07            0xFE07     Reserved
FLCR                  0xFE08     FLASH Control Register
FLCR.HVEN              3   High Voltage Enable Bit
FLCR.MASS              2   Mass Erase Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
FLBPR                 0xFE09     FLASH Block Protect Register
FLBPR.BPR7             7   FLASH Block Protect Register Bit 7
FLBPR.BPR6             6   FLASH Block Protect Register Bit 6
FLBPR.BPR5             5   FLASH Block Protect Register Bit 5
FLBPR.BPR4             4   FLASH Block Protect Register Bit 4
FLBPR.BPR3             3   FLASH Block Protect Register Bit 3
FLBPR.BPR2             2   FLASH Block Protect Register Bit 2
FLBPR.BPR1             1   FLASH Block Protect Register Bit 1
FLBPR.BPR0             0   FLASH Block Protect Register Bit 0
ReservFE0A            0xFE0A     Reserved
ReservFE0B            0xFE0B     Reserved
BRKH                  0xFE0C     Break Address Register High
BRKL                  0xFE0D     Break Address Register Low
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
LVISR                 0xFE0F     Low-Voltage Inhibit Status Register
LVISR.LVIOUT           7   LVI Output Bit
MOR                   0xFF80     Mask Option Register
MOR.OSCSEL1            7   Oscillator Selection Bits 1
MOR.OSCSEL0            6   Oscillator Selection Bits 0
COPCTL                0xFFFF     COP Control Register


.68HRC908JK1
; MC68HC908JL3/H  http://
; MC68HC908JL3.pdf

; 4096 bytes of user FLASH for MC68H(R)C908JL3/JK3
; 1536 bytes of user FLASH for MC68H(R)C908JK1
; 128 bytes of RAM
; 48 bytes of user-defined vectors
; 960 bytes of Monitor ROM


; MEMORY MAP
area DATA FSR		  0x0000:0x0040
area BSS  RESERVED	  0x0040:0x0080
area DATA RAM		  0x0080:0x0100
area BSS  UNIMPLEMENTED	  0x0100:0xF600
area DATA FLASH_MEMORY	  0xF600:0xFC00
area DATA MONITOR_ROM1	  0xFC00:0xFE00
area DATA FSR_1		  0xFE00:0xFE10
area DATA MONITOR_ROM2	  0xFE10:0xFFD0
area DATA USER_VEC	  0xFFD0:0x10000


; Interrupt and reset vector assignments
interrupt __RESET   0xFFFE       Reset Vector
interrupt SWI       0xFFFC       SWI Vector
interrupt IRQ       0xFFFA       IRQ Vector
interrupt TIM_CH0   0xFFF6       TIM Channel 0 Vector
interrupt TIM_CH1   0xFFF4       TIM Channel 1 Vector
interrupt TIM       0xFFF2       TIM Overflow Vector
interrupt KBRD      0xFFE0       Keyboard Vector
interrupt ADC       0xFFDE       ADC Conversion Complete Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
UNUSED0002            0x0002     UNUSED
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bits 7
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
UNUSED0006            0x0006     UNUSED
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bits 7
DDRD.DDRD6             6   Data Direction Register D Bits 6
DDRD.DDRD5             5   Data Direction Register D Bits 5
DDRD.DDRD4             4   Data Direction Register D Bits 4
DDRD.DDRD3             3   Data Direction Register D Bits 3
DDRD.DDRD2             2   Data Direction Register D Bits 2
DDRD.DDRD1             1   Data Direction Register D Bits 1
DDRD.DDRD0             0   Data Direction Register D Bits 0
UNUSED0008            0x0008     UNUSED
UNUSED0009            0x0009     UNUSED
PDCR                  0x000A     Port D Control Register
PDCR.SLOWD7            3   Slow Edge Enable 7
PDCR.SLOWD6            2   Slow Edge Enable 6
PDCR.PTDPU7            1   Pull-up Enable 7
PDCR.PTDPU6            0   Pull-up Enable 6
UNUSED000B            0x000B     UNUSED
UNUSED000C            0x000C     UNUSED
PTAPUE                0x000D     Port A Input Pull-up Enable Register
PTAPUE.PTA6EN          7   Enable PTA6 on OSC2
PTAPUE.PTAPUE6         6   Port A Input Pull-up Enable bits 6
PTAPUE.PTAPUE5         5   Port A Input Pull-up Enable bits 5
PTAPUE.PTAPUE4         4   Port A Input Pull-up Enable bits 4
PTAPUE.PTAPUE3         3   Port A Input Pull-up Enable bits 3
PTAPUE.PTAPUE2         2   Port A Input Pull-up Enable bits 2
PTAPUE.PTAPUE1         1   Port A Input Pull-up Enable bits 1
PTAPUE.PTAPUE0         0   Port A Input Pull-up Enable bits 0
UNUSED000E            0x000E     UNUSED
UNUSED000F            0x000F     UNUSED
UNUSED0010            0x0010     UNUSED
UNUSED0011            0x0011     UNUSED
UNUSED0012            0x0012     UNUSED
UNUSED0013            0x0013     UNUSED
UNUSED0014            0x0014     UNUSED
UNUSED0015            0x0015     UNUSED
UNUSED0016            0x0016     UNUSED
UNUSED0017            0x0017     UNUSED
UNUSED0018            0x0018     UNUSED
UNUSED0019            0x0019     UNUSED
KBSCR                 0x001A     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
KBIER                 0x001B     Keyboard Interrupt Enable Register
KBIER.KBIE6            6   Port-A Keyboard Interrupt Enable Bits 6
KBIER.KBIE5            5   Port-A Keyboard Interrupt Enable Bits 5
KBIER.KBIE4            4   Port-A Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Port-A Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Port-A Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Port-A Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Port-A Keyboard Interrupt Enable Bits 0
UNUSED001C            0x001C     UNUSED
INTSCR                0x001D     IRQ Status and Control Register
INTSCR.IRQF1           3   IRQ1 Flag
INTSCR.ACK1            2   IRQ1 Interrupt Request Acknowledge Bit
INTSCR.IMASK1          1   IRQ1 Interrupt Mask Bit
INTSCR.MODE1           0   IRQ1 Edge/Level Select Bit
CONFIG2               0x001E     Configuration Register 2
CONFIG2.IRQPUD         7   IRQ1 Pin Pull-up control bit
CONFIG2.LVIT1          4   Low Voltage Inhibit trip voltage selection bits 1
CONFIG2.LVIT0          3   Low Voltage Inhibit trip voltage selection bits 0
CONFIG1               0x001F     Configuration Register 1
CONFIG1.COPRS          7   COP reset period selection bit
CONFIG1.LVID           4   Low Voltage Inhibit Disable Bit
CONFIG1.SSREC          2   Short Stop Recovery Bit
CONFIG1.STOP           1   enables the STOP instruction
CONFIG1.COPD           0   COP Disable Bit
TSC                   0x0020     TIM Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
TCNTH                 0x0021     TIM Counter Register High
TCNTL                 0x0022     TIM Counter Register Low
TMODH                 0x0023     TIM Counter Modulo Register High
TMODL                 0x0024     TIM Counter Modulo Register Low
TSC0                  0x0025     TIM Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit
TSC0.MS0B              5   Mode Select Bit B
TSC0.MS0A              4   Mode Select Bit A
TSC0.ELS0B             3   Edge/Level Select Bits
TSC0.ELS0A             2   Edge/Level Select Bits
TSC0.TOV0              1   Toggle-On-Overflow Bit
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0026     TIM Channel 0 Register High
TCH0L                 0x0027     TIM Channel 0 Register Low
TSC1                  0x0028     TIM Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 1 Flag Bit            
TSC1.CH1IE             6   Channel 1 Interrupt Enable Bit
TSC1.MS1A              4   Mode Select Bit A               
TSC1.ELS1B             3   Edge/Level Select Bits          
TSC1.ELS1A             2   Edge/Level Select Bits          
TSC1.TOV1              1   Toggle-On-Overflow Bit          
TSC1.CH1MAX            0   Channel 1 Maximum Duty Cycle Bit
TCH1H                 0x0029     TIM Channel 1 Register High
TCH1L                 0x002A     TIM Channel 1 Register Low
UNUSED002B            0x002B     UNUSED
UNUSED002C            0x002C     UNUSED
UNUSED002D            0x002D     UNUSED
UNUSED002E            0x002E     UNUSED
UNUSED002F            0x002F     UNUSED
UNUSED0030            0x0030     UNUSED
UNUSED0031            0x0031     UNUSED
UNUSED0032            0x0032     UNUSED
UNUSED0033            0x0033     UNUSED
UNUSED0034            0x0034     UNUSED
UNUSED0035            0x0035     UNUSED
UNUSED0036            0x0036     UNUSED
UNUSED0037            0x0037     UNUSED
UNUSED0038            0x0038     UNUSED
UNUSED0039            0x0039     UNUSED
UNUSED003A            0x003A     UNUSED
UNUSED003B            0x003B     UNUSED
ADSCR                 0x003C     ADC Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.CH4              4   ADC Channel Select Bits 4
ADSCR.CH3              3   ADC Channel Select Bits 3
ADSCR.CH2              2   ADC Channel Select Bits 2
ADSCR.CH1              1   ADC Channel Select Bits 1
ADSCR.CH0              0   ADC Channel Select Bits 0
ADR                   0x003D     ADC Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADICLK                0x003E     ADC Input Clock Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bits 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bits 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bits 0
UNUSED003F            0x003F     UNUSED
BSR                   0xFE00     Break Status Register
BSR.SBSW               1   SIM Break Stop/Wait
RSR                   0xFE01     Reset Status Register
RSR.POR                7   Power-On Reset Bit
RSR.PIN                6   External Reset Bit
RSR.COP                5   Computer Operating Properly Reset Bit
RSR.ILOP               4   Illegal Opcode Reset Bit
RSR.ILAD               3   Illegal Address Reset Bit (opcode fetches only)
RSR.MODRST             2   Monitor Mode Entry Module Reset bit
RSR.LVI                1   Low Voltage Inhibit Reset bit
ReservFE02            0xFE02     Reserved
BFCR                  0xFE03     Break Flag Control Register
BFCR.BCFE              7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flags 14
INT3                  0xFE06     Interrupt Status Register 3
INT3.IF15              0   Interrupt Flags 15
ReservFE07            0xFE07     Reserved
FLCR                  0xFE08     FLASH Control Register
FLCR.HVEN              3   High Voltage Enable Bit
FLCR.MASS              2   Mass Erase Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
FLBPR                 0xFE09     FLASH Block Protect Register
FLBPR.BPR7             7   FLASH Protection Register Bits 7
FLBPR.BPR6             6   FLASH Protection Register Bits 6
FLBPR.BPR5             5   FLASH Protection Register Bits 5
FLBPR.BPR4             4   FLASH Protection Register Bits 4
FLBPR.BPR3             3   FLASH Protection Register Bits 3
FLBPR.BPR2             2   FLASH Protection Register Bits 2
FLBPR.BPR1             1   FLASH Protection Register Bits 1
ReservFE0A            0xFE0A     Reserved
ReservFE0B            0xFE0B     Reserved
BRKH                  0xFE0C     Break Address High Register
BRKL                  0xFE0D     Break Address low Register
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
UNUSEDFFE2            0xFFE2     UNUSED
UNUSEDFFE3            0xFFE3     UNUSED
UNUSEDFFE4            0xFFE4     UNUSED
UNUSEDFFE5            0xFFE5     UNUSED
UNUSEDFFE6            0xFFE6     UNUSED
UNUSEDFFE7            0xFFE7     UNUSED
UNUSEDFFE8            0xFFE8     UNUSED
UNUSEDFFE9            0xFFE9     UNUSED
UNUSEDFFEA            0xFFEA     UNUSED
UNUSEDFFEB            0xFFEB     UNUSED
UNUSEDFFEC            0xFFEC     UNUSED
UNUSEDFFED            0xFFED     UNUSED
UNUSEDFFEE            0xFFEE     UNUSED
UNUSEDFFEF            0xFFEF     UNUSED
UNUSEDFFF0            0xFFF0     UNUSED
UNUSEDFFF1            0xFFF1     UNUSED
UNUSEDFFF8            0xFFF8     UNUSED
UNUSEDFFF9            0xFFF9     UNUSED
COPCTL                0xFFFF     COP Control Register


.68HRC908JK3
; MC68HC908JL3/H  http://
; MC68HC908JL3.pdf

; 4096 bytes of user FLASH for MC68H(R)C908JL3/JK3
; 128 bytes of RAM
; 48 bytes of user-defined vectors
; 960 bytes of Monitor ROM


; MEMORY MAP
area DATA FSR		   0x0000:0x0040
area BSS  RESERVED	   0x0040:0x0080
area DATA RAM		   0x0080:0x0100
area BSS  UNIMPLEMENTED	   0x0100:0xEC00
area DATA FLASH_MEMORY	   0xEC00:0xFC00
area DATA MONITOR_ROM1	   0xFC00:0xFE00
area DATA FSR_1		   0xFE00:0xFE10
area DATA MONITOR_ROM2	   0xFE10:0xFFD0
area DATA USER_VEC	   0xFFD0:0x10000


; Interrupt and reset vector assignments
interrupt __RESET   0xFFFE       Reset Vector
interrupt SWI       0xFFFC       SWI Vector
interrupt IRQ       0xFFFA       IRQ Vector
interrupt TIM_CH0   0xFFF6       TIM Channel 0 Vector
interrupt TIM_CH1   0xFFF4       TIM Channel 1 Vector
interrupt TIM       0xFFF2       TIM Overflow Vector
interrupt KBRD      0xFFE0       Keyboard Vector
interrupt ADC       0xFFDE       ADC Conversion Complete Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
UNUSED0002            0x0002     UNUSED
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bits 7
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
UNUSED0006            0x0006     UNUSED
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bits 7
DDRD.DDRD6             6   Data Direction Register D Bits 6
DDRD.DDRD5             5   Data Direction Register D Bits 5
DDRD.DDRD4             4   Data Direction Register D Bits 4
DDRD.DDRD3             3   Data Direction Register D Bits 3
DDRD.DDRD2             2   Data Direction Register D Bits 2
DDRD.DDRD1             1   Data Direction Register D Bits 1
DDRD.DDRD0             0   Data Direction Register D Bits 0
UNUSED0008            0x0008     UNUSED
UNUSED0009            0x0009     UNUSED
PDCR                  0x000A     Port D Control Register
PDCR.SLOWD7            3   Slow Edge Enable 7
PDCR.SLOWD6            2   Slow Edge Enable 6
PDCR.PTDPU7            1   Pull-up Enable 7
PDCR.PTDPU6            0   Pull-up Enable 6
UNUSED000B            0x000B     UNUSED
UNUSED000C            0x000C     UNUSED
PTAPUE                0x000D     Port A Input Pull-up Enable Register
PTAPUE.PTA6EN          7   Enable PTA6 on OSC2
PTAPUE.PTAPUE6         6   Port A Input Pull-up Enable bits 6
PTAPUE.PTAPUE5         5   Port A Input Pull-up Enable bits 5
PTAPUE.PTAPUE4         4   Port A Input Pull-up Enable bits 4
PTAPUE.PTAPUE3         3   Port A Input Pull-up Enable bits 3
PTAPUE.PTAPUE2         2   Port A Input Pull-up Enable bits 2
PTAPUE.PTAPUE1         1   Port A Input Pull-up Enable bits 1
PTAPUE.PTAPUE0         0   Port A Input Pull-up Enable bits 0
UNUSED000E            0x000E     UNUSED
UNUSED000F            0x000F     UNUSED
UNUSED0010            0x0010     UNUSED
UNUSED0011            0x0011     UNUSED
UNUSED0012            0x0012     UNUSED
UNUSED0013            0x0013     UNUSED
UNUSED0014            0x0014     UNUSED
UNUSED0015            0x0015     UNUSED
UNUSED0016            0x0016     UNUSED
UNUSED0017            0x0017     UNUSED
UNUSED0018            0x0018     UNUSED
UNUSED0019            0x0019     UNUSED
KBSCR                 0x001A     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
KBIER                 0x001B     Keyboard Interrupt Enable Register
KBIER.KBIE6            6   Port-A Keyboard Interrupt Enable Bits 6
KBIER.KBIE5            5   Port-A Keyboard Interrupt Enable Bits 5
KBIER.KBIE4            4   Port-A Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Port-A Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Port-A Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Port-A Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Port-A Keyboard Interrupt Enable Bits 0
UNUSED001C            0x001C     UNUSED
INTSCR                0x001D     IRQ Status and Control Register
INTSCR.IRQF1           3   IRQ1 Flag
INTSCR.ACK1            2   IRQ1 Interrupt Request Acknowledge Bit
INTSCR.IMASK1          1   IRQ1 Interrupt Mask Bit
INTSCR.MODE1           0   IRQ1 Edge/Level Select Bit
CONFIG2               0x001E     Configuration Register 2
CONFIG2.IRQPUD         7   IRQ1 Pin Pull-up control bit
CONFIG2.LVIT1          4   Low Voltage Inhibit trip voltage selection bits 1
CONFIG2.LVIT0          3   Low Voltage Inhibit trip voltage selection bits 0
CONFIG1               0x001F     Configuration Register 1
CONFIG1.COPRS          7   COP reset period selection bit
CONFIG1.LVID           4   Low Voltage Inhibit Disable Bit
CONFIG1.SSREC          2   Short Stop Recovery Bit
CONFIG1.STOP           1   enables the STOP instruction
CONFIG1.COPD           0   COP Disable Bit
TSC                   0x0020     TIM Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
TCNTH                 0x0021     TIM Counter Register High
TCNTL                 0x0022     TIM Counter Register Low
TMODH                 0x0023     TIM Counter Modulo Register High
TMODL                 0x0024     TIM Counter Modulo Register Low
TSC0                  0x0025     TIM Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit
TSC0.MS0B              5   Mode Select Bit B
TSC0.MS0A              4   Mode Select Bit A
TSC0.ELS0B             3   Edge/Level Select Bits
TSC0.ELS0A             2   Edge/Level Select Bits
TSC0.TOV0              1   Toggle-On-Overflow Bit
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0026     TIM Channel 0 Register High
TCH0L                 0x0027     TIM Channel 0 Register Low
TSC1                  0x0028     TIM Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 1 Flag Bit            
TSC1.CH1IE             6   Channel 1 Interrupt Enable Bit
TSC1.MS1A              4   Mode Select Bit A               
TSC1.ELS1B             3   Edge/Level Select Bits          
TSC1.ELS1A             2   Edge/Level Select Bits          
TSC1.TOV1              1   Toggle-On-Overflow Bit          
TSC1.CH1MAX            0   Channel 1 Maximum Duty Cycle Bit
TCH1H                 0x0029     TIM Channel 1 Register High
TCH1L                 0x002A     TIM Channel 1 Register Low
UNUSED002B            0x002B     UNUSED
UNUSED002C            0x002C     UNUSED
UNUSED002D            0x002D     UNUSED
UNUSED002E            0x002E     UNUSED
UNUSED002F            0x002F     UNUSED
UNUSED0030            0x0030     UNUSED
UNUSED0031            0x0031     UNUSED
UNUSED0032            0x0032     UNUSED
UNUSED0033            0x0033     UNUSED
UNUSED0034            0x0034     UNUSED
UNUSED0035            0x0035     UNUSED
UNUSED0036            0x0036     UNUSED
UNUSED0037            0x0037     UNUSED
UNUSED0038            0x0038     UNUSED
UNUSED0039            0x0039     UNUSED
UNUSED003A            0x003A     UNUSED
UNUSED003B            0x003B     UNUSED
ADSCR                 0x003C     ADC Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.CH4              4   ADC Channel Select Bits 4
ADSCR.CH3              3   ADC Channel Select Bits 3
ADSCR.CH2              2   ADC Channel Select Bits 2
ADSCR.CH1              1   ADC Channel Select Bits 1
ADSCR.CH0              0   ADC Channel Select Bits 0
ADR                   0x003D     ADC Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADICLK                0x003E     ADC Input Clock Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bits 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bits 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bits 0
UNUSED003F            0x003F     UNUSED
BSR                   0xFE00     Break Status Register
BSR.SBSW               1   SIM Break Stop/Wait
RSR                   0xFE01     Reset Status Register
RSR.POR                7   Power-On Reset Bit
RSR.PIN                6   External Reset Bit
RSR.COP                5   Computer Operating Properly Reset Bit
RSR.ILOP               4   Illegal Opcode Reset Bit
RSR.ILAD               3   Illegal Address Reset Bit (opcode fetches only)
RSR.MODRST             2   Monitor Mode Entry Module Reset bit
RSR.LVI                1   Low Voltage Inhibit Reset bit
ReservFE02            0xFE02     Reserved
BFCR                  0xFE03     Break Flag Control Register
BFCR.BCFE              7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flags 14
INT3                  0xFE06     Interrupt Status Register 3
INT3.IF15              0   Interrupt Flags 15
ReservFE07            0xFE07     Reserved
FLCR                  0xFE08     FLASH Control Register
FLCR.HVEN              3   High Voltage Enable Bit
FLCR.MASS              2   Mass Erase Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
FLBPR                 0xFE09     FLASH Block Protect Register
FLBPR.BPR7             7   FLASH Protection Register Bits 7
FLBPR.BPR6             6   FLASH Protection Register Bits 6
FLBPR.BPR5             5   FLASH Protection Register Bits 5
FLBPR.BPR4             4   FLASH Protection Register Bits 4
FLBPR.BPR3             3   FLASH Protection Register Bits 3
FLBPR.BPR2             2   FLASH Protection Register Bits 2
FLBPR.BPR1             1   FLASH Protection Register Bits 1
ReservFE0A            0xFE0A     Reserved
ReservFE0B            0xFE0B     Reserved
BRKH                  0xFE0C     Break Address High Register
BRKL                  0xFE0D     Break Address low Register
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
UNUSEDFFE2            0xFFE2     UNUSED
UNUSEDFFE3            0xFFE3     UNUSED
UNUSEDFFE4            0xFFE4     UNUSED
UNUSEDFFE5            0xFFE5     UNUSED
UNUSEDFFE6            0xFFE6     UNUSED
UNUSEDFFE7            0xFFE7     UNUSED
UNUSEDFFE8            0xFFE8     UNUSED
UNUSEDFFE9            0xFFE9     UNUSED
UNUSEDFFEA            0xFFEA     UNUSED
UNUSEDFFEB            0xFFEB     UNUSED
UNUSEDFFEC            0xFFEC     UNUSED
UNUSEDFFED            0xFFED     UNUSED
UNUSEDFFEE            0xFFEE     UNUSED
UNUSEDFFEF            0xFFEF     UNUSED
UNUSEDFFF0            0xFFF0     UNUSED
UNUSEDFFF1            0xFFF1     UNUSED
UNUSEDFFF8            0xFFF8     UNUSED
UNUSEDFFF9            0xFFF9     UNUSED
COPCTL                0xFFFF     COP Control Register


.68HRC908JL3
; MC68HC908JL3/H  http://
; MC68HC908JL3.pdf

; 4096 bytes of user FLASH for MC68H(R)C908JL3/JK3
; 128 bytes of RAM
; 48 bytes of user-defined vectors
; 960 bytes of Monitor ROM


; MEMORY MAP
area DATA FSR		   0x0000:0x0040
area BSS  RESERVED	   0x0040:0x0080
area DATA RAM		   0x0080:0x0100
area BSS  UNIMPLEMENTED	   0x0100:0xEC00
area DATA FLASH_MEMORY	   0xEC00:0xFC00
area DATA MONITOR_ROM1	   0xFC00:0xFE00
area DATA FSR_1		   0xFE00:0xFE10
area DATA MONITOR_ROM2	   0xFE10:0xFFD0
area DATA USER_VEC	   0xFFD0:0x10000


; Interrupt and reset vector assignments
interrupt __RESET   0xFFFE       Reset Vector
interrupt SWI       0xFFFC       SWI Vector
interrupt IRQ       0xFFFA       IRQ Vector
interrupt TIM_CH0   0xFFF6       TIM Channel 0 Vector
interrupt TIM_CH1   0xFFF4       TIM Channel 1 Vector
interrupt TIM       0xFFF2       TIM Overflow Vector
interrupt KBRD      0xFFE0       Keyboard Vector
interrupt ADC       0xFFDE       ADC Conversion Complete Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
UNUSED0002            0x0002     UNUSED
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bits 7
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
UNUSED0006            0x0006     UNUSED
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bits 7
DDRD.DDRD6             6   Data Direction Register D Bits 6
DDRD.DDRD5             5   Data Direction Register D Bits 5
DDRD.DDRD4             4   Data Direction Register D Bits 4
DDRD.DDRD3             3   Data Direction Register D Bits 3
DDRD.DDRD2             2   Data Direction Register D Bits 2
DDRD.DDRD1             1   Data Direction Register D Bits 1
DDRD.DDRD0             0   Data Direction Register D Bits 0
UNUSED0008            0x0008     UNUSED
UNUSED0009            0x0009     UNUSED
PDCR                  0x000A     Port D Control Register
PDCR.SLOWD7            3   Slow Edge Enable 7
PDCR.SLOWD6            2   Slow Edge Enable 6
PDCR.PTDPU7            1   Pull-up Enable 7
PDCR.PTDPU6            0   Pull-up Enable 6
UNUSED000B            0x000B     UNUSED
UNUSED000C            0x000C     UNUSED
PTAPUE                0x000D     Port A Input Pull-up Enable Register
PTAPUE.PTA6EN          7   Enable PTA6 on OSC2
PTAPUE.PTAPUE6         6   Port A Input Pull-up Enable bits 6
PTAPUE.PTAPUE5         5   Port A Input Pull-up Enable bits 5
PTAPUE.PTAPUE4         4   Port A Input Pull-up Enable bits 4
PTAPUE.PTAPUE3         3   Port A Input Pull-up Enable bits 3
PTAPUE.PTAPUE2         2   Port A Input Pull-up Enable bits 2
PTAPUE.PTAPUE1         1   Port A Input Pull-up Enable bits 1
PTAPUE.PTAPUE0         0   Port A Input Pull-up Enable bits 0
UNUSED000E            0x000E     UNUSED
UNUSED000F            0x000F     UNUSED
UNUSED0010            0x0010     UNUSED
UNUSED0011            0x0011     UNUSED
UNUSED0012            0x0012     UNUSED
UNUSED0013            0x0013     UNUSED
UNUSED0014            0x0014     UNUSED
UNUSED0015            0x0015     UNUSED
UNUSED0016            0x0016     UNUSED
UNUSED0017            0x0017     UNUSED
UNUSED0018            0x0018     UNUSED
UNUSED0019            0x0019     UNUSED
KBSCR                 0x001A     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
KBIER                 0x001B     Keyboard Interrupt Enable Register
KBIER.KBIE6            6   Port-A Keyboard Interrupt Enable Bits 6
KBIER.KBIE5            5   Port-A Keyboard Interrupt Enable Bits 5
KBIER.KBIE4            4   Port-A Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Port-A Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Port-A Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Port-A Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Port-A Keyboard Interrupt Enable Bits 0
UNUSED001C            0x001C     UNUSED
INTSCR                0x001D     IRQ Status and Control Register
INTSCR.IRQF1           3   IRQ1 Flag
INTSCR.ACK1            2   IRQ1 Interrupt Request Acknowledge Bit
INTSCR.IMASK1          1   IRQ1 Interrupt Mask Bit
INTSCR.MODE1           0   IRQ1 Edge/Level Select Bit
CONFIG2               0x001E     Configuration Register 2
CONFIG2.IRQPUD         7   IRQ1 Pin Pull-up control bit
CONFIG2.LVIT1          4   Low Voltage Inhibit trip voltage selection bits 1
CONFIG2.LVIT0          3   Low Voltage Inhibit trip voltage selection bits 0
CONFIG1               0x001F     Configuration Register 1
CONFIG1.COPRS          7   COP reset period selection bit
CONFIG1.LVID           4   Low Voltage Inhibit Disable Bit
CONFIG1.SSREC          2   Short Stop Recovery Bit
CONFIG1.STOP           1   enables the STOP instruction
CONFIG1.COPD           0   COP Disable Bit
TSC                   0x0020     TIM Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
TCNTH                 0x0021     TIM Counter Register High
TCNTL                 0x0022     TIM Counter Register Low
TMODH                 0x0023     TIM Counter Modulo Register High
TMODL                 0x0024     TIM Counter Modulo Register Low
TSC0                  0x0025     TIM Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit
TSC0.MS0B              5   Mode Select Bit B
TSC0.MS0A              4   Mode Select Bit A
TSC0.ELS0B             3   Edge/Level Select Bits
TSC0.ELS0A             2   Edge/Level Select Bits
TSC0.TOV0              1   Toggle-On-Overflow Bit
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0026     TIM Channel 0 Register High
TCH0L                 0x0027     TIM Channel 0 Register Low
TSC1                  0x0028     TIM Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 1 Flag Bit            
TSC1.CH1IE             6   Channel 1 Interrupt Enable Bit
TSC1.MS1A              4   Mode Select Bit A               
TSC1.ELS1B             3   Edge/Level Select Bits          
TSC1.ELS1A             2   Edge/Level Select Bits          
TSC1.TOV1              1   Toggle-On-Overflow Bit          
TSC1.CH1MAX            0   Channel 1 Maximum Duty Cycle Bit
TCH1H                 0x0029     TIM Channel 1 Register High
TCH1L                 0x002A     TIM Channel 1 Register Low
UNUSED002B            0x002B     UNUSED
UNUSED002C            0x002C     UNUSED
UNUSED002D            0x002D     UNUSED
UNUSED002E            0x002E     UNUSED
UNUSED002F            0x002F     UNUSED
UNUSED0030            0x0030     UNUSED
UNUSED0031            0x0031     UNUSED
UNUSED0032            0x0032     UNUSED
UNUSED0033            0x0033     UNUSED
UNUSED0034            0x0034     UNUSED
UNUSED0035            0x0035     UNUSED
UNUSED0036            0x0036     UNUSED
UNUSED0037            0x0037     UNUSED
UNUSED0038            0x0038     UNUSED
UNUSED0039            0x0039     UNUSED
UNUSED003A            0x003A     UNUSED
UNUSED003B            0x003B     UNUSED
ADSCR                 0x003C     ADC Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.CH4              4   ADC Channel Select Bits 4
ADSCR.CH3              3   ADC Channel Select Bits 3
ADSCR.CH2              2   ADC Channel Select Bits 2
ADSCR.CH1              1   ADC Channel Select Bits 1
ADSCR.CH0              0   ADC Channel Select Bits 0
ADR                   0x003D     ADC Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADICLK                0x003E     ADC Input Clock Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bits 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bits 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bits 0
UNUSED003F            0x003F     UNUSED
BSR                   0xFE00     Break Status Register
BSR.SBSW               1   SIM Break Stop/Wait
RSR                   0xFE01     Reset Status Register
RSR.POR                7   Power-On Reset Bit
RSR.PIN                6   External Reset Bit
RSR.COP                5   Computer Operating Properly Reset Bit
RSR.ILOP               4   Illegal Opcode Reset Bit
RSR.ILAD               3   Illegal Address Reset Bit (opcode fetches only)
RSR.MODRST             2   Monitor Mode Entry Module Reset bit
RSR.LVI                1   Low Voltage Inhibit Reset bit
RESERVFE02            0xFE02     RESERVED
BFCR                  0xFE03     Break Flag Control Register
BFCR.BCFE              7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flags 14
INT3                  0xFE06     Interrupt Status Register 3
INT3.IF15              0   Interrupt Flags 15
RESERVFE07            0xFE07     RESERVED
FLCR                  0xFE08     FLASH Control Register
FLCR.HVEN              3   High Voltage Enable Bit
FLCR.MASS              2   Mass Erase Control Bit
FLCR.ERASE             1   Erase Control Bit
FLCR.PGM               0   Program Control Bit
FLBPR                 0xFE09     FLASH Block Protect Register
FLBPR.BPR7             7   FLASH Protection Register Bits 7
FLBPR.BPR6             6   FLASH Protection Register Bits 6
FLBPR.BPR5             5   FLASH Protection Register Bits 5
FLBPR.BPR4             4   FLASH Protection Register Bits 4
FLBPR.BPR3             3   FLASH Protection Register Bits 3
FLBPR.BPR2             2   FLASH Protection Register Bits 2
FLBPR.BPR1             1   FLASH Protection Register Bits 1
RESERVFE0A            0xFE0A     RESERVED
RESERVFE0B            0xFE0B     RESERVED
BRKH                  0xFE0C     Break Address High Register
BRKL                  0xFE0D     Break Address low Register
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
UNUSEDFFE2            0xFFE2     UNUSED
UNUSEDFFE3            0xFFE3     UNUSED
UNUSEDFFE4            0xFFE4     UNUSED
UNUSEDFFE5            0xFFE5     UNUSED
UNUSEDFFE6            0xFFE6     UNUSED
UNUSEDFFE7            0xFFE7     UNUSED
UNUSEDFFE8            0xFFE8     UNUSED
UNUSEDFFE9            0xFFE9     UNUSED
UNUSEDFFEA            0xFFEA     UNUSED
UNUSEDFFEB            0xFFEB     UNUSED
UNUSEDFFEC            0xFFEC     UNUSED
UNUSEDFFED            0xFFED     UNUSED
UNUSEDFFEE            0xFFEE     UNUSED
UNUSEDFFEF            0xFFEF     UNUSED
UNUSEDFFF0            0xFFF0     UNUSED
UNUSEDFFF1            0xFFF1     UNUSED
UNUSEDFFF8            0xFFF8     UNUSED
UNUSEDFFF9            0xFFF9     UNUSED
COPCTL                0xFFFF     COP Control Register


.68HC708AS48
; http://

; MEMORY MAP

; Interrupt and reset vector assignments

; INPUT/ OUTPUT PORTS



.68HC08JK1
; MC68HC08JL3/H  http://
; MC68HC08JL3.pdf


; MEMORY MAP
area DATA FSR		   0x0000:0x0040
area BSS  RESERVED	   0x0040:0x0080
area DATA RAM		   0x0080:0x0100
area BSS  UNIMPLEMENTED	   0x0100:0xF600
area DATA ROM		   0xF600:0xFC00
area DATA MONITOR_ROM_1	   0xFC00:0xFE00
area DATA FSR_1		   0xFE00:0xFE10
area DATA MONITOR_ROM_2	   0xFE10:0xFFD0
area DATA USER_VEC	   0xFFD0:0x10000


; Interrupt and reset vector assignments
interrupt __RESET    0xFFFE       Reset Vector
interrupt SWI        0xFFFC       SWI Vector
interrupt IRQ        0xFFFA       IRQ Vector
interrupt TIM CH_0   0xFFF6       TIM Channel 0 Vector
interrupt TIM CH_1   0xFFF4       TIM Channel 1 Vector
interrupt TIM        0xFFF2       TIM Overflow Vector
interrupt KBRD       0xFFE0       Keyboard Vector
interrupt ADC        0xFFDE       ADC Conversion Complete Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA6               6   Port A Data Bit 6
PTA.PTA5               5   Port A Data Bit 5
PTA.PTA4               4   Port A Data Bit 4
PTA.PTA3               3   Port A Data Bit 3
PTA.PTA2               2   Port A Data Bit 2
PTA.PTA1               1   Port A Data Bit 1
PTA.PTA0               0   Port A Data Bit 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bit 7
PTB.PTB6               6   Port B Data Bit 6
PTB.PTB5               5   Port B Data Bit 5
PTB.PTB4               4   Port B Data Bit 4
PTB.PTB3               3   Port B Data Bit 3
PTB.PTB2               2   Port B Data Bit 2
PTB.PTB1               1   Port B Data Bit 1
PTB.PTB0               0   Port B Data Bit 0
UNUSED0002            0x0002     UNUSED
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bit 7
PTD.PTD6               6   Port D Data Bit 6
PTD.PTD5               5   Port D Data Bit 5
PTD.PTD4               4   Port D Data Bit 4
PTD.PTD3               3   Port D Data Bit 3
PTD.PTD2               2   Port D Data Bit 2
PTD.PTD1               1   Port D Data Bit 1
PTD.PTD0               0   Port D Data Bit 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA6             6   Data Direction Register A Bit 6
DDRA.DDRA5             5   Data Direction Register A Bit 5
DDRA.DDRA4             4   Data Direction Register A Bit 4
DDRA.DDRA3             3   Data Direction Register A Bit 3
DDRA.DDRA2             2   Data Direction Register A Bit 2
DDRA.DDRA1             1   Data Direction Register A Bit 1
DDRA.DDRA0             0   Data Direction Register A Bit 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bit 7
DDRB.DDRB6             6   Data Direction Register B Bit 6
DDRB.DDRB5             5   Data Direction Register B Bit 5
DDRB.DDRB4             4   Data Direction Register B Bit 4
DDRB.DDRB3             3   Data Direction Register B Bit 3
DDRB.DDRB2             2   Data Direction Register B Bit 2
DDRB.DDRB1             1   Data Direction Register B Bit 1
DDRB.DDRB0             0   Data Direction Register B Bit 0
UNUSED0006            0x0006     UNUSED
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bit 7
DDRD.DDRD6             6   Data Direction Register D Bit 6
DDRD.DDRD5             5   Data Direction Register D Bit 5
DDRD.DDRD4             4   Data Direction Register D Bit 4
DDRD.DDRD3             3   Data Direction Register D Bit 3
DDRD.DDRD2             2   Data Direction Register D Bit 2
DDRD.DDRD1             1   Data Direction Register D Bit 1
DDRD.DDRD0             0   Data Direction Register D Bit 0
UNUSED0008            0x0008     UNUSED
UNUSED0009            0x0009     UNUSED
PDCR                  0x000A     Port D Control Register
PDCR.SLOWD7            3   Slow Edge Enable 7
PDCR.SLOWD6            2   Slow Edge Enable 6
PDCR.PTDPU7            1   Pull-up Enable 7
PDCR.PTDPU6            0   Pull-up Enable 6
UNUSED000B            0x000B     UNUSED
UNUSED000C            0x000C     UNUSED
PTAPUE                0x000D     Port A Input Pull-up Enable Register
PTAPUE.PTA6EN          7   Enable PTA6 on OSC2
PTAPUE.PTAPUE6         6   Port A Input Pull-up Enable bits 6
PTAPUE.PTAPUE5         5   Port A Input Pull-up Enable bits 5
PTAPUE.PTAPUE4         4   Port A Input Pull-up Enable bits 4
PTAPUE.PTAPUE3         3   Port A Input Pull-up Enable bits 3
PTAPUE.PTAPUE2         2   Port A Input Pull-up Enable bits 2
PTAPUE.PTAPUE1         1   Port A Input Pull-up Enable bits 1
PTAPUE.PTAPUE0         0   Port A Input Pull-up Enable bits 0
UNUSED000E            0x000E     UNUSED
UNUSED000F            0x000F     UNUSED
UNUSED0010            0x0010     UNUSED
UNUSED0011            0x0011     UNUSED
UNUSED0012            0x0012     UNUSED
UNUSED0013            0x0013     UNUSED
UNUSED0014            0x0014     UNUSED
UNUSED0015            0x0015     UNUSED
UNUSED0016            0x0016     UNUSED
UNUSED0017            0x0017     UNUSED
UNUSED0018            0x0018     UNUSED
UNUSED0019            0x0019     UNUSED
KBSCR                 0x001A     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
KBIER                 0x001B     Keyboard Interrupt Enable Register
KBIER.KBIE6            6   Port-A Keyboard Interrupt Enable Bits 6
KBIER.KBIE5            5   Port-A Keyboard Interrupt Enable Bits 5
KBIER.KBIE4            4   Port-A Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Port-A Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Port-A Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Port-A Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Port-A Keyboard Interrupt Enable Bits 0
UNUSED001C            0x001C     UNUSED
INTSCR                0x001D     IRQ Status and Control Register
INTSCR.IRQF1           3   IRQ1 Flag
INTSCR.ACK1            2   IRQ1 Interrupt Request Acknowledge Bit
INTSCR.IMASK1          1   IRQ1 Interrupt Mask Bit
INTSCR.MODE1           0   IRQ1 Edge/Level Select Bit
CONFIG2               0x001E     Configuration Register 2
CONFIG2.IRQPUD         7   IRQ1 Pin Pull-up control bit
CONFIG2.LVIT1          4   Low Voltage Inhibit trip voltage selection bits 1
CONFIG2.LVIT0          3   Low Voltage Inhibit trip voltage selection bits 0
CONFIG1               0x001F     Configuration Register 1
CONFIG1.COPRS          7   COP reset period selection bit
CONFIG1.LVID           4   Low Voltage Inhibit Disable Bit
CONFIG1.SSREC          2   Short Stop Recovery Bit
CONFIG1.STOP           1   enables the STOP instruction
CONFIG1.COPD           0   COP Disable Bit
TSC                   0x0020     TIM Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
TCNTH                 0x0021     TIM Counter Register High
TCNTL                 0x0022     TIM Counter Register Low
TMODH                 0x0023     TIM Counter Modulo Register High
TMODL                 0x0024     TIM Counter Modulo Register Low
TSC0                  0x0025     TIM Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit
TSC0.MS0B              5   Mode Select Bit B
TSC0.MS0A              4   Mode Select Bit A
TSC0.ELS0B             3   Edge/Level Select Bits
TSC0.ELS0A             2   Edge/Level Select Bits
TSC0.TOV0              1   Toggle-On-Overflow Bit
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0026     TIM Channel 0 Register High
TCH0L                 0x0027     TIM Channel 0 Register Low
TSC1                  0x0028     TIM Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 1 Flag Bit
TSC1.CH1IE             6   Channel 1 Interrupt Enable Bit
TSC1.MS1A              4   Mode Select Bit A
TSC1.ELS1B             3   Edge/Level Select Bits
TSC1.ELS1A             2   Edge/Level Select Bits
TSC1.TOV1              1   Toggle-On-Overflow Bit
TSC1.CH1MAX            0   Channel 1 Maximum Duty Cycle Bit
TCH1H                 0x0029     TIM Channel 1 Register High
TCH1L                 0x002A     TIM Channel 1 Register Low
UNUSED002B            0x002B     UNUSED
UNUSED002C            0x002C     UNUSED
UNUSED002D            0x002D     UNUSED
UNUSED002E            0x002E     UNUSED
UNUSED002F            0x002F     UNUSED
UNUSED0030            0x0030     UNUSED
UNUSED0031            0x0031     UNUSED
UNUSED0032            0x0032     UNUSED
UNUSED0033            0x0033     UNUSED
UNUSED0034            0x0034     UNUSED
UNUSED0035            0x0035     UNUSED
UNUSED0036            0x0036     UNUSED
UNUSED0037            0x0037     UNUSED
UNUSED0038            0x0038     UNUSED
UNUSED0039            0x0039     UNUSED
UNUSED003A            0x003A     UNUSED
UNUSED003B            0x003B     UNUSED
ADSCR                 0x003C     ADC Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.CH4              4   ADC Channel Select Bits 4
ADSCR.CH3              3   ADC Channel Select Bits 3
ADSCR.CH2              2   ADC Channel Select Bits 2
ADSCR.CH1              1   ADC Channel Select Bits 1
ADSCR.CH0              0   ADC Channel Select Bits 0
ADR                   0x003D     ADC Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADICLK                0x003E     ADC Input Clock Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bits 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bits 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bits 0
UNUSED003F            0x003F     UNUSED
BSR                   0xFE00     Break Status Register
BSR.SBSW               1   SIM Break Stop/Wait
RSR                   0xFE01     Reset Status Register
RSR.POR                7   Power-On Reset Bit
RSR.PIN                6   External Reset Bit
RSR.COP                5   Computer Operating Properly Reset Bit
RSR.ILOP               4   Illegal Opcode Reset Bit
RSR.ILAD               3   Illegal Address Reset Bit (opcode fetches only)
RSR.MODRST             2   Monitor Mode Entry Module Reset bit
RSR.LVI                1   Low Voltage Inhibit Reset bit
ReservFE02            0xFE02     Reserved
BFCR                  0xFE03     Break Flag Control Register
BFCR.BCFE              7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flags 14
INT3                  0xFE06     Interrupt Status Register 3
INT3.IF15              0   Interrupt Flags 15
ReservFE07            0xFE07     Reserved
ReservFE08            0xFE08     Reserved
ReservFE09            0xFE09     Reserved
ReservFE0A            0xFE0A     Reserved
ReservFE0B            0xFE0B     Reserved
BRKH                  0xFE0C     Break Address High Register
BRKL                  0xFE0D     Break Address low Register
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
COPCTL                0xFFFF     COP Control Register


.68HRC08JK1
; MC68HC08JL3/H  http://
; MC68HC08JL3.pdf


; MEMORY MAP
area DATA FSR		   0x0000:0x0040
area BSS  RESERVED	   0x0040:0x0080
area DATA RAM		   0x0080:0x0100
area BSS  UNIMPLEMENTED	   0x0100:0xF600
area DATA ROM		   0xF600:0xFC00
area DATA MONITOR_ROM_1	   0xFC00:0xFE00
area DATA FSR_1		   0xFE00:0xFE10
area DATA MONITOR_ROM_2	   0xFE10:0xFFD0
area DATA USER_VEC	   0xFFD0:0x10000


; Interrupt and reset vector assignments
interrupt __RESET    0xFFFE       Reset Vector
interrupt SWI        0xFFFC       SWI Vector
interrupt IRQ        0xFFFA       IRQ Vector
interrupt TIM_CH_0   0xFFF6       TIM Channel 0 Vector
interrupt TIM_CH_1   0xFFF4       TIM Channel 1 Vector
interrupt TIM        0xFFF2       TIM Overflow Vector
interrupt CBRD       0xFFE0       Keyboard Vector
interrupt ADC        0xFFDE       ADC Conversion Complete Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
UNUSED0002            0x0002     UNUSED
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bits 7
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
UNUSED0006            0x0006     UNUSED
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bits 7
DDRD.DDRD6             6   Data Direction Register D Bits 6
DDRD.DDRD5             5   Data Direction Register D Bits 5
DDRD.DDRD4             4   Data Direction Register D Bits 4
DDRD.DDRD3             3   Data Direction Register D Bits 3
DDRD.DDRD2             2   Data Direction Register D Bits 2
DDRD.DDRD1             1   Data Direction Register D Bits 1
DDRD.DDRD0             0   Data Direction Register D Bits 0
UNUSED0008            0x0008     UNUSED
UNUSED0009            0x0009     UNUSED
PDCR                  0x000A     Port D Control Register
PDCR.SLOWD7            3   Slow Edge Enable 7
PDCR.SLOWD6            2   Slow Edge Enable 6
PDCR.PTDPU7            1   Pull-up Enable 7
PDCR.PTDPU6            0   Pull-up Enable 6
UNUSED000B            0x000B     UNUSED
UNUSED000C            0x000C     UNUSED
PTAPUE                0x000D     Port A Input Pull-up Enable Register
PTAPUE.PTA6EN          7   Enable PTA6 on OSC2
PTAPUE.PTAPUE6         6   Port A Input Pull-up Enable bits 6
PTAPUE.PTAPUE5         5   Port A Input Pull-up Enable bits 5
PTAPUE.PTAPUE4         4   Port A Input Pull-up Enable bits 4
PTAPUE.PTAPUE3         3   Port A Input Pull-up Enable bits 3
PTAPUE.PTAPUE2         2   Port A Input Pull-up Enable bits 2
PTAPUE.PTAPUE1         1   Port A Input Pull-up Enable bits 1
PTAPUE.PTAPUE0         0   Port A Input Pull-up Enable bits 0
UNUSED000E            0x000E     UNUSED
UNUSED000F            0x000F     UNUSED
UNUSED0010            0x0010     UNUSED
UNUSED0011            0x0011     UNUSED
UNUSED0012            0x0012     UNUSED
UNUSED0013            0x0013     UNUSED
UNUSED0014            0x0014     UNUSED
UNUSED0015            0x0015     UNUSED
UNUSED0016            0x0016     UNUSED
UNUSED0017            0x0017     UNUSED
UNUSED0018            0x0018     UNUSED
UNUSED0019            0x0019     UNUSED
KBSCR                 0x001A     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
KBIER                 0x001B     Keyboard Interrupt Enable Register
KBIER.KBIE6            6   Port-A Keyboard Interrupt Enable Bits 6
KBIER.KBIE5            5   Port-A Keyboard Interrupt Enable Bits 5
KBIER.KBIE4            4   Port-A Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Port-A Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Port-A Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Port-A Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Port-A Keyboard Interrupt Enable Bits 0
UNUSED001C            0x001C     UNUSED
INTSCR                0x001D     IRQ Status and Control Register
INTSCR.IRQF1           3   IRQ1 Flag
INTSCR.ACK1            2   IRQ1 Interrupt Request Acknowledge Bit
INTSCR.IMASK1          1   IRQ1 Interrupt Mask Bit
INTSCR.MODE1           0   IRQ1 Edge/Level Select Bit
CONFIG2               0x001E     Configuration Register 2
CONFIG2.IRQPUD         7   IRQ1 Pin Pull-up control bit
CONFIG2.LVIT1          4   Low Voltage Inhibit trip voltage selection bits 1
CONFIG2.LVIT0          3   Low Voltage Inhibit trip voltage selection bits 0
CONFIG1               0x001F     Configuration Register 1
CONFIG1.COPRS          7   COP reset period selection bit
CONFIG1.LVID           4   Low Voltage Inhibit Disable Bit
CONFIG1.SSREC          2   Short Stop Recovery Bit
CONFIG1.STOP           1   STOP Instruction Enable Bit
CONFIG1.COPD           0   COP Disable Bit
TSC                   0x0020     TIM Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
TCNTH                 0x0021     TIM Counter Register High
TCNTL                 0x0022     TIM Counter Register Low
TMODH                 0x0023     TIM Counter Modulo Register High
TMODL                 0x0024     TIM Counter Modulo Register Low
TSC0                  0x0025     TIM Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit
TSC0.MS0B              5   Mode Select Bit B
TSC0.MS0A              4   Mode Select Bit A
TSC0.ELS0B             3   Edge/Level Select Bits
TSC0.ELS0A             2   Edge/Level Select Bits
TSC0.TOV0              1   Toggle-On-Overflow Bit
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0026     TIM Channel 0 Register High
TCH0L                 0x0027     TIM Channel 0 Register Low
TSC1                  0x0028     TIM Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 1 Flag Bit
TSC1.CH1IE             6   Channel 1 Interrupt Enable Bit
TSC1.MS1A              4   Mode Select Bit A
TSC1.ELS1B             3   Edge/Level Select Bits
TSC1.ELS1A             2   Edge/Level Select Bits
TSC1.TOV1              1   Toggle-On-Overflow Bit
TSC1.CH1MAX            0   Channel 1 Maximum Duty Cycle Bit
TCH1H                 0x0029     TIM Channel 1 Register High
TCH1L                 0x002A     TIM Channel 1 Register Low
UNUSED002B            0x002B     UNUSED
UNUSED002C            0x002C     UNUSED
UNUSED002D            0x002D     UNUSED
UNUSED002E            0x002E     UNUSED
UNUSED002F            0x002F     UNUSED
UNUSED0030            0x0030     UNUSED
UNUSED0031            0x0031     UNUSED
UNUSED0032            0x0032     UNUSED
UNUSED0033            0x0033     UNUSED
UNUSED0034            0x0034     UNUSED
UNUSED0035            0x0035     UNUSED
UNUSED0036            0x0036     UNUSED
UNUSED0037            0x0037     UNUSED
UNUSED0038            0x0038     UNUSED
UNUSED0039            0x0039     UNUSED
UNUSED003A            0x003A     UNUSED
UNUSED003B            0x003B     UNUSED
ADSCR                 0x003C     ADC Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.CH4              4   ADC Channel Select Bits 4
ADSCR.CH3              3   ADC Channel Select Bits 3
ADSCR.CH2              2   ADC Channel Select Bits 2
ADSCR.CH1              1   ADC Channel Select Bits 1
ADSCR.CH0              0   ADC Channel Select Bits 0
ADR                   0x003D     ADC Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADICLK                0x003E     ADC Input Clock Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bits 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bits 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bits 0
UNUSED003F            0x003F     UNUSED
BSR                   0xFE00     Break Status Register
BSR.SBSW               1   SIM Break Stop/Wait
RSR                   0xFE01     Reset Status Register
RSR.POR                7   Power-On Reset Bit
RSR.PIN                6   External Reset Bit
RSR.COP                5   Computer Operating Properly Reset Bit
RSR.ILOP               4   Illegal Opcode Reset Bit
RSR.ILAD               3   Illegal Address Reset Bit (opcode fetches only)
RSR.MODRST             2   Monitor Mode Entry Module Reset bit
RSR.LVI                1   Low Voltage Inhibit Reset bit
ReservFE02            0xFE02     Reserved
BFCR                  0xFE03     Break Flag Control Register
BFCR.BCFE              7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flags 14
INT3                  0xFE06     Interrupt Status Register 3
INT3.IF15              0   Interrupt Flags 15
ReservFE07            0xFE07     Reserved
ReservFE08            0xFE08     Reserved
ReservFE09            0xFE09     Reserved
ReservFE0A            0xFE0A     Reserved
ReservFE0B            0xFE0B     Reserved
BRKH                  0xFE0C     Break Address High Register
BRKL                  0xFE0D     Break Address low Register
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
COPCTL                0xFFFF     COP Control Register


.68HRC08JK3
; MC68HC08JL3/H  http://
; MC68HC08JL3.pdf


; MEMORY MAP
area DATA FSR		   0x0000:0x0040
area BSS  RESERVED	   0x0040:0x0080
area DATA RAM		   0x0080:0x0100
area BSS  UNIMPLEMENTED	   0x0100:0xEC00
area DATA ROM		   0xEC00:0xFC00
area DATA MONITOR_ROM_1	   0xFC00:0xFE00
area DATA FSR_1		   0xFE00:0xFE10
area DATA MONITOR_ROM_2	   0xFE10:0xFFD0
area DATA USER_VEC	   0xFFD0:0x10000


; Interrupt and reset vector assignments
interrupt __RESET    0xFFFE       Reset Vector
interrupt SWI        0xFFFC       SWI Vector
interrupt IRQ        0xFFFA       IRQ Vector
interrupt TIM_CH_0   0xFFF6       TIM Channel 0 Vector
interrupt TIM_CH_1   0xFFF4       TIM Channel 1 Vector
interrupt TIM        0xFFF2       TIM Overflow Vector
interrupt CBRD       0xFFE0       Keyboard Vector
interrupt ADC        0xFFDE       ADC Conversion Complete Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
UNUSED0002            0x0002     UNUSED
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bits 7
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
UNUSED0006            0x0006     UNUSED
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bits 7
DDRD.DDRD6             6   Data Direction Register D Bits 6
DDRD.DDRD5             5   Data Direction Register D Bits 5
DDRD.DDRD4             4   Data Direction Register D Bits 4
DDRD.DDRD3             3   Data Direction Register D Bits 3
DDRD.DDRD2             2   Data Direction Register D Bits 2
DDRD.DDRD1             1   Data Direction Register D Bits 1
DDRD.DDRD0             0   Data Direction Register D Bits 0
UNUSED0008            0x0008     UNUSED
UNUSED0009            0x0009     UNUSED
PDCR                  0x000A     Port D Control Register
PDCR.SLOWD7            3   Slow Edge Enable 7
PDCR.SLOWD6            2   Slow Edge Enable 6
PDCR.PTDPU7            1   Pull-up Enable 7
PDCR.PTDPU6            0   Pull-up Enable 6
UNUSED000B            0x000B     UNUSED
UNUSED000C            0x000C     UNUSED
PTAPUE                0x000D     Port A Input Pull-up Enable Register
PTAPUE.PTA6EN          7   Enable PTA6 on OSC2
PTAPUE.PTAPUE6         6   Port A Input Pull-up Enable bits 6
PTAPUE.PTAPUE5         5   Port A Input Pull-up Enable bits 5
PTAPUE.PTAPUE4         4   Port A Input Pull-up Enable bits 4
PTAPUE.PTAPUE3         3   Port A Input Pull-up Enable bits 3
PTAPUE.PTAPUE2         2   Port A Input Pull-up Enable bits 2
PTAPUE.PTAPUE1         1   Port A Input Pull-up Enable bits 1
PTAPUE.PTAPUE0         0   Port A Input Pull-up Enable bits 0
UNUSED000E            0x000E     UNUSED
UNUSED000F            0x000F     UNUSED
UNUSED0010            0x0010     UNUSED
UNUSED0011            0x0011     UNUSED
UNUSED0012            0x0012     UNUSED
UNUSED0013            0x0013     UNUSED
UNUSED0014            0x0014     UNUSED
UNUSED0015            0x0015     UNUSED
UNUSED0016            0x0016     UNUSED
UNUSED0017            0x0017     UNUSED
UNUSED0018            0x0018     UNUSED
UNUSED0019            0x0019     UNUSED
KBSCR                 0x001A     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
KBIER                 0x001B     Keyboard Interrupt Enable Register
KBIER.KBIE6            6   Port-A Keyboard Interrupt Enable Bits 6
KBIER.KBIE5            5   Port-A Keyboard Interrupt Enable Bits 5
KBIER.KBIE4            4   Port-A Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Port-A Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Port-A Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Port-A Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Port-A Keyboard Interrupt Enable Bits 0
UNUSED001C            0x001C     UNUSED
INTSCR                0x001D     IRQ Status and Control Register
INTSCR.IRQF1           3   IRQ1 Flag
INTSCR.ACK1            2   IRQ1 Interrupt Request Acknowledge Bit
INTSCR.IMASK1          1   IRQ1 Interrupt Mask Bit
INTSCR.MODE1           0   IRQ1 Edge/Level Select Bit
CONFIG2               0x001E     Configuration Register 2
CONFIG2.IRQPUD         7   IRQ1 Pin Pull-up control bit
CONFIG2.LVIT1          4   Low Voltage Inhibit trip voltage selection bits 1
CONFIG2.LVIT0          3   Low Voltage Inhibit trip voltage selection bits 0
CONFIG1               0x001F     Configuration Register 1
CONFIG1.COPRS          7   COP reset period selection bit
CONFIG1.LVID           4   Low Voltage Inhibit Disable Bit
CONFIG1.SSREC          2   Short Stop Recovery Bit
CONFIG1.STOP           1   STOP Instruction Enable Bit
CONFIG1.COPD           0   COP Disable Bit
TSC                   0x0020     TIM Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
TCNTH                 0x0021     TIM Counter Register High
TCNTL                 0x0022     TIM Counter Register Low
TMODH                 0x0023     TIM Counter Modulo Register High
TMODL                 0x0024     TIM Counter Modulo Register Low
TSC0                  0x0025     TIM Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit
TSC0.MS0B              5   Mode Select Bit B
TSC0.MS0A              4   Mode Select Bit A
TSC0.ELS0B             3   Edge/Level Select Bits
TSC0.ELS0A             2   Edge/Level Select Bits
TSC0.TOV0              1   Toggle-On-Overflow Bit
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0026     TIM Channel 0 Register High
TCH0L                 0x0027     TIM Channel 0 Register Low
TSC1                  0x0028     TIM Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 1 Flag Bit
TSC1.CH1IE             6   Channel 1 Interrupt Enable Bit
TSC1.MS1A              4   Mode Select Bit A
TSC1.ELS1B             3   Edge/Level Select Bits
TSC1.ELS1A             2   Edge/Level Select Bits
TSC1.TOV1              1   Toggle-On-Overflow Bit
TSC1.CH1MAX            0   Channel 1 Maximum Duty Cycle Bit
TCH1H                 0x0029     TIM Channel 1 Register High
TCH1L                 0x002A     TIM Channel 1 Register Low
UNUSED002B            0x002B     UNUSED
UNUSED002C            0x002C     UNUSED
UNUSED002D            0x002D     UNUSED
UNUSED002E            0x002E     UNUSED
UNUSED002F            0x002F     UNUSED
UNUSED0030            0x0030     UNUSED
UNUSED0031            0x0031     UNUSED
UNUSED0032            0x0032     UNUSED
UNUSED0033            0x0033     UNUSED
UNUSED0034            0x0034     UNUSED
UNUSED0035            0x0035     UNUSED
UNUSED0036            0x0036     UNUSED
UNUSED0037            0x0037     UNUSED
UNUSED0038            0x0038     UNUSED
UNUSED0039            0x0039     UNUSED
UNUSED003A            0x003A     UNUSED
UNUSED003B            0x003B     UNUSED
ADSCR                 0x003C     ADC Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.CH4              4   ADC Channel Select Bits 4
ADSCR.CH3              3   ADC Channel Select Bits 3
ADSCR.CH2              2   ADC Channel Select Bits 2
ADSCR.CH1              1   ADC Channel Select Bits 1
ADSCR.CH0              0   ADC Channel Select Bits 0
ADR                   0x003D     ADC Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADICLK                0x003E     ADC Input Clock Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bits 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bits 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bits 0
UNUSED003F            0x003F     UNUSED
BSR                   0xFE00     Break Status Register
BSR.SBSW               1   SIM Break Stop/Wait
RSR                   0xFE01     Reset Status Register
RSR.POR                7   Power-On Reset Bit
RSR.PIN                6   External Reset Bit
RSR.COP                5   Computer Operating Properly Reset Bit
RSR.ILOP               4   Illegal Opcode Reset Bit
RSR.ILAD               3   Illegal Address Reset Bit (opcode fetches only)
RSR.MODRST             2   Monitor Mode Entry Module Reset bit
RSR.LVI                1   Low Voltage Inhibit Reset bit
ReservFE02            0xFE02     Reserved
BFCR                  0xFE03     Break Flag Control Register
BFCR.BCFE              7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flags 14
INT3                  0xFE06     Interrupt Status Register 3
INT3.IF15              0   Interrupt Flags 15
ReservFE07            0xFE07     Reserved
ReservFE08            0xFE08     Reserved
ReservFE09            0xFE09     Reserved
ReservFE0A            0xFE0A     Reserved
ReservFE0B            0xFE0B     Reserved
BRKH                  0xFE0C     Break Address High Register
BRKL                  0xFE0D     Break Address low Register
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
COPCTL                0xFFFF     COP Control Register


.68HRC08JL3
; MC68HC08JL3/H  http://
; MC68HC08JL3.pdf


; MEMORY MAP
area DATA FSR		   0x0000:0x0040
area BSS  RESERVED	   0x0040:0x0080
area DATA RAM		   0x0080:0x0100
area BSS  UNIMPLEMENTED	   0x0100:0xEC00
area DATA ROM		   0xEC00:0xFC00
area DATA MONITOR_ROM_1	   0xFC00:0xFE00
area DATA FSR_1		   0xFE00:0xFE10
area DATA MONITOR_ROM_2	   0xFE10:0xFFD0
area DATA USER_VEC	   0xFFD0:0x10000


; Interrupt and reset vector assignments
interrupt __RESET    0xFFFE       Reset Vector
interrupt SWI        0xFFFC       SWI Vector
interrupt IRQ        0xFFFA       IRQ Vector
interrupt TIM_CH_0   0xFFF6       TIM Channel 0 Vector
interrupt TIM_CH_1   0xFFF4       TIM Channel 1 Vector
interrupt TIM        0xFFF2       TIM Overflow Vector
interrupt CBRD       0xFFE0       Keyboard Vector
interrupt ADC        0xFFDE       ADC Conversion Complete Vector


; INPUT/ OUTPUT PORTS
PTA                   0x0000     Port A Data Register
PTA.PTA6               6   Port A Data Bits 6
PTA.PTA5               5   Port A Data Bits 5
PTA.PTA4               4   Port A Data Bits 4
PTA.PTA3               3   Port A Data Bits 3
PTA.PTA2               2   Port A Data Bits 2
PTA.PTA1               1   Port A Data Bits 1
PTA.PTA0               0   Port A Data Bits 0
PTB                   0x0001     Port B Data Register
PTB.PTB7               7   Port B Data Bits 7
PTB.PTB6               6   Port B Data Bits 6
PTB.PTB5               5   Port B Data Bits 5
PTB.PTB4               4   Port B Data Bits 4
PTB.PTB3               3   Port B Data Bits 3
PTB.PTB2               2   Port B Data Bits 2
PTB.PTB1               1   Port B Data Bits 1
PTB.PTB0               0   Port B Data Bits 0
UNUSED0002            0x0002     UNUSED
PTD                   0x0003     Port D Data Register
PTD.PTD7               7   Port D Data Bits 7
PTD.PTD6               6   Port D Data Bits 6
PTD.PTD5               5   Port D Data Bits 5
PTD.PTD4               4   Port D Data Bits 4
PTD.PTD3               3   Port D Data Bits 3
PTD.PTD2               2   Port D Data Bits 2
PTD.PTD1               1   Port D Data Bits 1
PTD.PTD0               0   Port D Data Bits 0
DDRA                  0x0004     Data Direction Register A
DDRA.DDRA6             6   Data Direction Register A Bits 6
DDRA.DDRA5             5   Data Direction Register A Bits 5
DDRA.DDRA4             4   Data Direction Register A Bits 4
DDRA.DDRA3             3   Data Direction Register A Bits 3
DDRA.DDRA2             2   Data Direction Register A Bits 2
DDRA.DDRA1             1   Data Direction Register A Bits 1
DDRA.DDRA0             0   Data Direction Register A Bits 0
DDRB                  0x0005     Data Direction Register B
DDRB.DDRB7             7   Data Direction Register B Bits 7
DDRB.DDRB6             6   Data Direction Register B Bits 6
DDRB.DDRB5             5   Data Direction Register B Bits 5
DDRB.DDRB4             4   Data Direction Register B Bits 4
DDRB.DDRB3             3   Data Direction Register B Bits 3
DDRB.DDRB2             2   Data Direction Register B Bits 2
DDRB.DDRB1             1   Data Direction Register B Bits 1
DDRB.DDRB0             0   Data Direction Register B Bits 0
UNUSED0006            0x0006     UNUSED
DDRD                  0x0007     Data Direction Register D
DDRD.DDRD7             7   Data Direction Register D Bits 7
DDRD.DDRD6             6   Data Direction Register D Bits 6
DDRD.DDRD5             5   Data Direction Register D Bits 5
DDRD.DDRD4             4   Data Direction Register D Bits 4
DDRD.DDRD3             3   Data Direction Register D Bits 3
DDRD.DDRD2             2   Data Direction Register D Bits 2
DDRD.DDRD1             1   Data Direction Register D Bits 1
DDRD.DDRD0             0   Data Direction Register D Bits 0
UNUSED0008            0x0008     UNUSED
UNUSED0009            0x0009     UNUSED
PDCR                  0x000A     Port D Control Register
PDCR.SLOWD7            3   Slow Edge Enable 7
PDCR.SLOWD6            2   Slow Edge Enable 6
PDCR.PTDPU7            1   Pull-up Enable 7
PDCR.PTDPU6            0   Pull-up Enable 6
UNUSED000B            0x000B     UNUSED
UNUSED000C            0x000C     UNUSED
PTAPUE                0x000D     Port A Input Pull-up Enable Register
PTAPUE.PTA6EN          7   Enable PTA6 on OSC2
PTAPUE.PTAPUE6         6   Port A Input Pull-up Enable bits 6
PTAPUE.PTAPUE5         5   Port A Input Pull-up Enable bits 5
PTAPUE.PTAPUE4         4   Port A Input Pull-up Enable bits 4
PTAPUE.PTAPUE3         3   Port A Input Pull-up Enable bits 3
PTAPUE.PTAPUE2         2   Port A Input Pull-up Enable bits 2
PTAPUE.PTAPUE1         1   Port A Input Pull-up Enable bits 1
PTAPUE.PTAPUE0         0   Port A Input Pull-up Enable bits 0
UNUSED000E            0x000E     UNUSED
UNUSED000F            0x000F     UNUSED
UNUSED0010            0x0010     UNUSED
UNUSED0011            0x0011     UNUSED
UNUSED0012            0x0012     UNUSED
UNUSED0013            0x0013     UNUSED
UNUSED0014            0x0014     UNUSED
UNUSED0015            0x0015     UNUSED
UNUSED0016            0x0016     UNUSED
UNUSED0017            0x0017     UNUSED
UNUSED0018            0x0018     UNUSED
UNUSED0019            0x0019     UNUSED
KBSCR                 0x001A     Keyboard Status and Control Register
KBSCR.KEYF             3   Keyboard Flag Bit
KBSCR.ACKK             2   Keyboard Acknowledge Bit
KBSCR.IMASKK           1   Keyboard Interrupt Mask Bit
KBSCR.MODEK            0   Keyboard Triggering Sensitivity Bit
KBIER                 0x001B     Keyboard Interrupt Enable Register
KBIER.KBIE6            6   Port-A Keyboard Interrupt Enable Bits 6
KBIER.KBIE5            5   Port-A Keyboard Interrupt Enable Bits 5
KBIER.KBIE4            4   Port-A Keyboard Interrupt Enable Bits 4
KBIER.KBIE3            3   Port-A Keyboard Interrupt Enable Bits 3
KBIER.KBIE2            2   Port-A Keyboard Interrupt Enable Bits 2
KBIER.KBIE1            1   Port-A Keyboard Interrupt Enable Bits 1
KBIER.KBIE0            0   Port-A Keyboard Interrupt Enable Bits 0
UNUSED001C            0x001C     UNUSED
INTSCR                0x001D     IRQ Status and Control Register
INTSCR.IRQF1           3   IRQ1 Flag
INTSCR.ACK1            2   IRQ1 Interrupt Request Acknowledge Bit
INTSCR.IMASK1          1   IRQ1 Interrupt Mask Bit
INTSCR.MODE1           0   IRQ1 Edge/Level Select Bit
CONFIG2               0x001E     Configuration Register 2
CONFIG2.IRQPUD         7   IRQ1 Pin Pull-up control bit
CONFIG2.LVIT1          4   Low Voltage Inhibit trip voltage selection bits 1
CONFIG2.LVIT0          3   Low Voltage Inhibit trip voltage selection bits 0
CONFIG1               0x001F     Configuration Register 1
CONFIG1.COPRS          7   COP reset period selection bit
CONFIG1.LVID           4   Low Voltage Inhibit Disable Bit
CONFIG1.SSREC          2   Short Stop Recovery Bit
CONFIG1.STOP           1   STOP Instruction Enable Bit
CONFIG1.COPD           0   COP Disable Bit
TSC                   0x0020     TIM Status and Control Register
TSC.TOF                7   TIM Overflow Flag Bit
TSC.TOIE               6   TIM Overflow Interrupt Enable Bit
TSC.TSTOP              5   TIM Stop Bit
TSC.TRST               4   TIM Reset Bit
TSC.PS2                2   Prescaler Select Bits 2
TSC.PS1                1   Prescaler Select Bits 1
TSC.PS0                0   Prescaler Select Bits 0
TCNTH                 0x0021     TIM Counter Register High
TCNTL                 0x0022     TIM Counter Register Low
TMODH                 0x0023     TIM Counter Modulo Register High
TMODL                 0x0024     TIM Counter Modulo Register Low
TSC0                  0x0025     TIM Channel 0 Status and Control Register
TSC0.CH0F              7   Channel 0 Flag Bit
TSC0.CH0IE             6   Channel 0 Interrupt Enable Bit
TSC0.MS0B              5   Mode Select Bit B
TSC0.MS0A              4   Mode Select Bit A
TSC0.ELS0B             3   Edge/Level Select Bits
TSC0.ELS0A             2   Edge/Level Select Bits
TSC0.TOV0              1   Toggle-On-Overflow Bit
TSC0.CH0MAX            0   Channel 0 Maximum Duty Cycle Bit
TCH0H                 0x0026     TIM Channel 0 Register High
TCH0L                 0x0027     TIM Channel 0 Register Low
TSC1                  0x0028     TIM Channel 1 Status and Control Register
TSC1.CH1F              7   Channel 1 Flag Bit
TSC1.CH1IE             6   Channel 1 Interrupt Enable Bit
TSC1.MS1A              4   Mode Select Bit A
TSC1.ELS1B             3   Edge/Level Select Bits
TSC1.ELS1A             2   Edge/Level Select Bits
TSC1.TOV1              1   Toggle-On-Overflow Bit
TSC1.CH1MAX            0   Channel 1 Maximum Duty Cycle Bit
TCH1H                 0x0029     TIM Channel 1 Register High
TCH1L                 0x002A     TIM Channel 1 Register Low
UNUSED002B            0x002B     UNUSED
UNUSED002C            0x002C     UNUSED
UNUSED002D            0x002D     UNUSED
UNUSED002E            0x002E     UNUSED
UNUSED002F            0x002F     UNUSED
UNUSED0030            0x0030     UNUSED
UNUSED0031            0x0031     UNUSED
UNUSED0032            0x0032     UNUSED
UNUSED0033            0x0033     UNUSED
UNUSED0034            0x0034     UNUSED
UNUSED0035            0x0035     UNUSED
UNUSED0036            0x0036     UNUSED
UNUSED0037            0x0037     UNUSED
UNUSED0038            0x0038     UNUSED
UNUSED0039            0x0039     UNUSED
UNUSED003A            0x003A     UNUSED
UNUSED003B            0x003B     UNUSED
ADSCR                 0x003C     ADC Status and Control Register
ADSCR.COCO             7   Conversions Complete Bit
ADSCR.AIEN             6   ADC Interrupt Enable Bit
ADSCR.ADCO             5   ADC Continuous Conversion Bit
ADSCR.CH4              4   ADC Channel Select Bits 4
ADSCR.CH3              3   ADC Channel Select Bits 3
ADSCR.CH2              2   ADC Channel Select Bits 2
ADSCR.CH1              1   ADC Channel Select Bits 1
ADSCR.CH0              0   ADC Channel Select Bits 0
ADR                   0x003D     ADC Data Register
ADR.AD7                7
ADR.AD6                6
ADR.AD5                5
ADR.AD4                4
ADR.AD3                3
ADR.AD2                2
ADR.AD1                1
ADR.AD0                0
ADICLK                0x003E     ADC Input Clock Register
ADICLK.ADIV2           7   ADC Clock Prescaler Bits 2
ADICLK.ADIV1           6   ADC Clock Prescaler Bits 1
ADICLK.ADIV0           5   ADC Clock Prescaler Bits 0
UNUSED003F            0x003F     UNUSED
BSR                   0xFE00     Break Status Register
BSR.SBSW               1   SIM Break Stop/Wait
RSR                   0xFE01     Reset Status Register
RSR.POR                7   Power-On Reset Bit
RSR.PIN                6   External Reset Bit
RSR.COP                5   Computer Operating Properly Reset Bit
RSR.ILOP               4   Illegal Opcode Reset Bit
RSR.ILAD               3   Illegal Address Reset Bit (opcode fetches only)
RSR.MODRST             2   Monitor Mode Entry Module Reset bit
RSR.LVI                1   Low Voltage Inhibit Reset bit
RESERVFE02            0xFE02     RESERVED
BFCR                  0xFE03     Break Flag Control Register
BFCR.BCFE              7   Break Clear Flag Enable Bit
INT1                  0xFE04     Interrupt Status Register 1
INT1.IF5               6   Interrupt Flags 5
INT1.IF4               5   Interrupt Flags 4
INT1.IF3               4   Interrupt Flags 3
INT1.IF1               2   Interrupt Flags 1
INT2                  0xFE05     Interrupt Status Register 2
INT2.IF14              7   Interrupt Flags 14
INT3                  0xFE06     Interrupt Status Register 3
INT3.IF15              0   Interrupt Flags 15
RESERVFE07            0xFE07     RESERVED
RESERVFE08            0xFE08     RESERVED
RESERVFE09            0xFE09     RESERVED
RESERVFE0A            0xFE0A     RESERVED
RESERVFE0B            0xFE0B     RESERVED
BRKH                  0xFE0C     Break Address High Register
BRKL                  0xFE0D     Break Address low Register
BRKSCR                0xFE0E     Break Status and Control Register
BRKSCR.BRKE            7   Break Enable Bit
BRKSCR.BRKA            6   Break Active Bit
COPCTL                0xFFFF     COP Control Register


